Change Details
fw/spi.c |
24 | 24 | #define SCLK B, 8 |
25 | 25 | |
26 | 26 | |
| 27 | /* |
| 28 | * According to simulation, signals from MCU to transceiver should already |
| 29 | * suffer severe degradation * at fosc/4 = 2 MHz due to parasitic capacitance |
| 30 | * (assumed to be 10 pF) and the series resistors (10 kOhm) of the voltage |
| 31 | * dividers. |
| 32 | * |
| 33 | * fosc/2 = 4 MHz looks horrible in simulation and does not work reliably in |
| 34 | * practice either. |
| 35 | */ |
| 36 | |
27 | 37 | void spi_init(void) |
28 | 38 | { |
29 | 39 | /* SPI mode 0, MSB first, fosc/4 */ |
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