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| Source at commit ce9caf0f3baa50d46a52d28b7afc215770b24158 created 11 years 17 days ago. By Werner Almesberger, tornado/fw/sim/alg.c: tune EWMA weights; correct sample rate for simulation | |
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| 1 | /* |
| 2 | * fw/spi.c - SPI I/O |
| 3 | * |
| 4 | * Written 2012 by Werner Almesberger |
| 5 | * Copyright 2012 Werner Almesberger |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | |
| 14 | #include <stdint.h> |
| 15 | #include <avr/io.h> |
| 16 | |
| 17 | #include "io.h" |
| 18 | #include "spi.h" |
| 19 | |
| 20 | |
| 21 | #define nSS B, 2 |
| 22 | #define MOSI B, 3 |
| 23 | #define MISO B, 4 |
| 24 | #define SCLK B, 8 |
| 25 | |
| 26 | |
| 27 | /* |
| 28 | * According to simulation, signals from MCU to transceiver should already |
| 29 | * suffer severe degradation * at fosc/4 = 2 MHz due to parasitic capacitance |
| 30 | * (assumed to be 10 pF) and the series resistors (10 kOhm) of the voltage |
| 31 | * dividers. |
| 32 | * |
| 33 | * fosc/2 = 4 MHz looks horrible in simulation and does not work reliably in |
| 34 | * practice either. |
| 35 | */ |
| 36 | |
| 37 | void spi_init(void) |
| 38 | { |
| 39 | /* SPI mode 0, MSB first, fosc/4 */ |
| 40 | SPCR = |
| 41 | 1 << SPE | /* enable SPI */ |
| 42 | 1 << MSTR; /* master */ |
| 43 | // SPSR = 1 << SPI2X; /* enable for fosc/2 */ |
| 44 | } |
| 45 | |
| 46 | |
| 47 | void spi_begin(void) |
| 48 | { |
| 49 | CLR(nSS); |
| 50 | } |
| 51 | |
| 52 | |
| 53 | uint8_t spi_io(uint8_t v) |
| 54 | { |
| 55 | SPDR = v; |
| 56 | while (!(SPSR & (1 << SPIF))); |
| 57 | return SPDR; |
| 58 | } |
| 59 | |
| 60 | |
| 61 | void spi_end(void) |
| 62 | { |
| 63 | SET(nSS); |
| 64 | } |
| 65 | |
Branches:
master
tornado-v1
