IEEE 802.15.4 subsystem
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IEEE 802.15.4 subsystem Commit Details
Date: | 2011-02-08 23:32:15 (13 years 1 month ago) |
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Author: | Werner Almesberger |
Commit: | 259400fdb8674b0134597faea68fb20fd42bde9f |
Message: | atusb/fw2: firmware for the AVR-based atusb (in progress) - ./: basic framework to build a firmware that can enumerate - usb/patches/: patches to make FreakUSB 0.7 compile cleanly and to make it work in our context |
Files: |
atusb/fw2/Makefile (1 diff) atusb/fw2/README (1 diff) atusb/fw2/atusb.c (1 diff) atusb/fw2/descr.c (1 diff) atusb/fw2/io.h (1 diff) atusb/fw2/usb/patches/cleanup.patch (1 diff) atusb/fw2/usb/patches/no-cdc.patch (1 diff) atusb/fw2/usb/patches/no-vbus-detect.patch (1 diff) atusb/fw2/usb/patches/series (1 diff) |
Change Details
atusb/fw2/Makefile | ||
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1 | NAME = atusb | |
2 | CFLAGS = -g -Wall -Wextra -Wshadow -Werror -Wno-unused \ | |
3 | -Wmissing-prototypes -Wmissing-declarations -Wstrict-prototypes | |
4 | ||
5 | CHIP=atmega32u2 | |
6 | CHIP_AVRDUDE=at90usb162 # @@@ fix this when support for the ATmega32U2 becomes | |
7 | # available | |
8 | ||
9 | AVR_PREFIX = $(BIN_PATH) avr- | |
10 | CC = $(AVR_PREFIX)gcc | |
11 | OBJCOPY = $(AVR_PREFIX)objcopy | |
12 | #OBJDUMP = $(AVR_PREFIX)objdump | |
13 | ||
14 | FreakUSB = usb | |
15 | USB_OBJS = $(FreakUSB)/usb/usb.o $(FreakUSB)/usb/ctrl.o \ | |
16 | $(FreakUSB)/usb/usb_buf.o \ | |
17 | $(FreakUSB)/hw/at90usbxx2/ep.o $(FreakUSB)/hw/at90usbxx2/hw.o \ | |
18 | $(FreakUSB)/hw/at90usbxx2/isr.o | |
19 | OBJS = atusb.o descr.o $(USB_OBJS) | |
20 | ||
21 | CFLAGS += -I../fw/include \ | |
22 | -I$(FreakUSB)/usb -I$(FreakUSB)/hw/at90usbxx2 \ | |
23 | -DNUM_EPS=1 | |
24 | ||
25 | .PHONY: all clean upload prog | |
26 | ||
27 | all: $(NAME).bin | |
28 | ||
29 | %.o: %.c | |
30 | $(CC) $(CFLAGS) -mmcu=$(CHIP) -Os -c $< | |
31 | ||
32 | $(NAME).elf: $(OBJS) | |
33 | $(CC) $(CFLAGS) -mmcu=$(CHIP) -o $@ $(notdir $(OBJS)) | |
34 | ||
35 | %.bin: %.elf | |
36 | $(OBJCOPY) -j .text -j .data -O binary $< $@ | |
37 | ||
38 | clean: | |
39 | rm -f $(NAME).bin $(NAME).elf $(notdir $(OBJS)) | |
40 | ||
41 | upload: $(NAME).bin | |
42 | scp $(NAME).bin jlime: | |
43 | ||
44 | prog: | |
45 | ssh jlime avrdude -F -p $(CHIP_AVRDUDE) -c nanonote_atusb -e \ | |
46 | -U flash:w:$(NAME).bin:r \ | |
47 | -U lfuse:w:0x60:m # external clock, slow start-up | |
48 | ||
49 | on: | |
50 | ssh jlime poke 0x10010318 4 | |
51 | ||
52 | off: | |
53 | ssh jlime poke 0x10010314 4 |
atusb/fw2/README | ||
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1 | cd usb | |
2 | ||
3 | wget http://freaklabs.org/freakusb/FreakUSB%20v0.70.zip | |
4 | unzip -a FreakUSB?v0.70.zip | |
5 | quilt push -a | |
6 | ||
7 | cd .. | |
8 | ||
9 | make | |
10 | make upload prog |
atusb/fw2/atusb.c | ||
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1 | #include <stdint.h> | |
2 | ||
3 | #include <avr/io.h> | |
4 | ||
5 | #define F_CPU 8000000UL | |
6 | #include <util/delay.h> | |
7 | ||
8 | #include "freakusb.h" | |
9 | ||
10 | #include "io.h" | |
11 | #include "at86rf230.h" | |
12 | ||
13 | ||
14 | static void spi_begin(void) | |
15 | { | |
16 | CLR(nSS); | |
17 | } | |
18 | ||
19 | ||
20 | static uint8_t spi(uint8_t v) | |
21 | { | |
22 | // while (!(UCSR1A & 1 << UDRE1)); | |
23 | UDR1 = v; | |
24 | while (!(UCSR1A & 1 << RXC1)); | |
25 | return UDR1; | |
26 | } | |
27 | ||
28 | ||
29 | static void spi_end(void) | |
30 | { | |
31 | // while (!(UCSR1A & 1 << TXC1)); | |
32 | SET(nSS); | |
33 | } | |
34 | ||
35 | ||
36 | int main(void) | |
37 | { | |
38 | /* We start with a 1 MHz/8 clock. Disable the prescaler. */ | |
39 | ||
40 | CLKPR = 1 << CLKPCE; | |
41 | CLKPR = 0; | |
42 | ||
43 | /* set up all the outputs; default port value is 0 */ | |
44 | ||
45 | OUT(LED); | |
46 | OUT(nRST_RF); /* reset the transceiver */ | |
47 | OUT(SLP_TR); | |
48 | OUT(SCLK); | |
49 | OUT(MOSI); | |
50 | OUT(nSS); | |
51 | ||
52 | /* set up UART-SPI */ | |
53 | ||
54 | UCSR1C = 1 << UMSEL11 | 1 << UMSEL10; | |
55 | /* set MSPI, MSB first, SPI data mode 0 */ | |
56 | UCSR1B = 1 << RXEN1 | 1 << TXEN1; | |
57 | /* enable receiver and transmitter */ | |
58 | UBRR1 = 0; /* reconfirm the bit rate */ | |
59 | ||
60 | /* bring the transceiver out of reset */ | |
61 | ||
62 | /* | |
63 | * AT86RF231 data sheet, 12.4.13, reset pulse with: 625 ns (min). | |
64 | * We spend a lot more time getting here, so no extra wait is needed. | |
65 | */ | |
66 | SET(nRST_RF); | |
67 | ||
68 | /* | |
69 | * 12.4.14: SPI access latency after reset: 625 ns | |
70 | */ | |
71 | _delay_us(1); | |
72 | ||
73 | /* switch CLKM to 8 MHz */ | |
74 | ||
75 | /* | |
76 | * @@@ Note: Atmel advise against changing the external clock in | |
77 | * mid-flight. We should therefore switch to the RC clock first, then | |
78 | * crank up the external clock, and finally switch back to the external | |
79 | * clock. The clock switching procedure is described in the ATmega32U2 | |
80 | * data sheet in secton 8.2.2. | |
81 | */ | |
82 | ||
83 | spi_begin(); | |
84 | spi(AT86RF230_REG_WRITE | REG_TRX_CTRL_0); | |
85 | spi(CLKM_CTRL_8MHz); | |
86 | spi_end(); | |
87 | ||
88 | /* now we should be at 8 MHz */ | |
89 | ||
90 | SET(LED); | |
91 | _delay_ms(100); | |
92 | CLR(LED); | |
93 | ||
94 | usb_init(); | |
95 | hw_init(); | |
96 | ||
97 | while (1) | |
98 | usb_poll(); | |
99 | } |
atusb/fw2/descr.c | ||
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1 | /* | |
2 | * atspi/descr.c - USB descriptors | |
3 | * | |
4 | * Written 2008-2011 by Werner Almesberger | |
5 | * Copyright 2008-2011 Werner Almesberger | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | ||
13 | ||
14 | #include "freakusb.h" | |
15 | #include <avr/pgmspace.h> | |
16 | ||
17 | ||
18 | #if 0 | |
19 | /* f32xbase/fw/common/usb.h */ | |
20 | ||
21 | #define USB_DT_DEVICE 1 | |
22 | #define USB_DT_CONFIG 2 | |
23 | #define USB_DT_STRING 3 | |
24 | #define USB_DT_INTERFACE 4 | |
25 | #define USB_DT_ENDPOINT 5 | |
26 | ||
27 | #endif | |
28 | ||
29 | #define USB_CLASS_VENDOR_SPEC 0xff | |
30 | ||
31 | #define USB_ATTR_BUS_POWERED 0x80 | |
32 | ||
33 | #define USB_DT_DEVICE DEV_DESCR | |
34 | #define USB_DT_CONFIG CFG_DESCR | |
35 | #define USB_DT_INTERFACE INTF_DESCR | |
36 | #define USB_DT_ENDPOINT EP_DESCR | |
37 | ||
38 | #define EP0_SIZE MAX_BUF_SZ | |
39 | #define EP1_SIZE MAX_BUF_SZ | |
40 | #define USB_VENDOR 0x20b7 /* Qi Hardware */ | |
41 | #define USB_PRODUCT 0x1540 /* ben-wpan atusb */ | |
42 | ||
43 | #define LE(x) ((uint16_t) (x) & 0xff), ((uint16_t) (x) >> 8) | |
44 | ||
45 | /* | |
46 | * Device descriptor | |
47 | */ | |
48 | ||
49 | uint8_t device_descriptor[18] PROGMEM = { | |
50 | 18, /* bLength */ | |
51 | USB_DT_DEVICE, /* bDescriptorType */ | |
52 | LE(0x200), /* bcdUSB */ | |
53 | USB_CLASS_VENDOR_SPEC, /* bDeviceClass */ | |
54 | 0x00, /* bDeviceSubClass */ | |
55 | 0x00, /* bDeviceProtocol */ | |
56 | EP0_SIZE, /* bMaxPacketSize */ | |
57 | LE(USB_VENDOR), /* idVendor */ | |
58 | LE(USB_PRODUCT), /* idProduct */ | |
59 | LE(0x0001), /* bcdDevice */ | |
60 | 0, /* iManufacturer */ | |
61 | 0, /* iProduct */ | |
62 | 0, /* iSerialNumber */ | |
63 | 1 /* bNumConfigurations */ | |
64 | }; | |
65 | ||
66 | ||
67 | /* | |
68 | * Our configuration | |
69 | * | |
70 | * We're always bus-powered. | |
71 | */ | |
72 | ||
73 | uint8_t config_descriptor[] PROGMEM = { | |
74 | 9, /* bLength */ | |
75 | USB_DT_CONFIG, /* bDescriptorType */ | |
76 | #if 0 | |
77 | LE(9+9+7+7), /* wTotalLength */ | |
78 | #else | |
79 | LE(9+9), /* wTotalLength */ | |
80 | #endif | |
81 | 1, /* bNumInterfaces */ | |
82 | 1, /* bConfigurationValue (> 0 !) */ | |
83 | 0, /* iConfiguration */ | |
84 | USB_ATTR_BUS_POWERED, /* bmAttributes */ | |
85 | 50/2, /* bMaxPower (50 mA) */ | |
86 | ||
87 | /* Interface #0 */ | |
88 | ||
89 | 9, /* bLength */ | |
90 | USB_DT_INTERFACE, /* bDescriptorType */ | |
91 | 0, /* bInterfaceNumber */ | |
92 | 0, /* bAlternateSetting */ | |
93 | #if 0 | |
94 | 2, /* bNumEndpoints */ | |
95 | #else | |
96 | 0, | |
97 | #endif | |
98 | USB_CLASS_VENDOR_SPEC, /* bInterfaceClass */ | |
99 | 0, /* bInterfaceSubClass */ | |
100 | 0, /* bInterfaceProtocol */ | |
101 | 0, /* iInterface */ | |
102 | ||
103 | #if 0 | |
104 | /* EP OUT */ | |
105 | ||
106 | 7, /* bLength */ | |
107 | USB_DT_ENDPOINT, /* bDescriptorType */ | |
108 | 0x01, /* bEndPointAddress */ | |
109 | 0x02, /* bmAttributes (bulk) */ | |
110 | LE(EP1_SIZE), /* wMaxPacketSize */ | |
111 | 0, /* bInterval */ | |
112 | ||
113 | /* EP IN */ | |
114 | ||
115 | 7, /* bLength */ | |
116 | USB_DT_ENDPOINT, /* bDescriptorType */ | |
117 | 0x81, /* bEndPointAddress */ | |
118 | 0x02, /* bmAttributes (bulk) */ | |
119 | LE(EP1_SIZE), /* wMaxPacketSize */ | |
120 | 0, /* bInterval */ | |
121 | #endif | |
122 | }; | |
123 | ||
124 | ||
125 | #define dev_desc device_descriptor | |
126 | #define cfg_desc config_descriptor | |
127 | ||
128 | U8 *desc_dev_get() | |
129 | { | |
130 | return dev_desc; | |
131 | } | |
132 | U8 desc_dev_get_len() | |
133 | { | |
134 | return pgm_read_byte(dev_desc); | |
135 | } | |
136 | U8 *desc_cfg_get() | |
137 | { | |
138 | return cfg_desc; | |
139 | } | |
140 | U8 desc_cfg_get_len() | |
141 | { | |
142 | return pgm_read_byte(cfg_desc + 2); | |
143 | } | |
144 | U8 *desc_dev_qual_get() | |
145 | { | |
146 | return NULL; | |
147 | } | |
148 | U8 desc_dev_qual_get_len() | |
149 | { | |
150 | return 0; | |
151 | } | |
152 | U8 *desc_str_get(U8 index) | |
153 | { | |
154 | return NULL; | |
155 | } | |
156 | U8 desc_str_get_len(U8 index) | |
157 | { | |
158 | return 0; | |
159 | } |
atusb/fw2/io.h | ||
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1 | #ifndef IO_H | |
2 | #define IO_H | |
3 | ||
4 | #define LED_PORT B | |
5 | #define LED_BIT 6 | |
6 | #define nRST_RF_PORT C | |
7 | #define nRST_RF_BIT 7 | |
8 | #define SLP_TR_PORT B | |
9 | #define SLP_TR_BIT 4 | |
10 | ||
11 | #define SCLK_PORT D | |
12 | #define SCLK_BIT 5 | |
13 | #define MOSI_PORT D | |
14 | #define MOSI_BIT 3 | |
15 | ||
16 | #define MISO_PORT D | |
17 | #define MISO_BIT 2 | |
18 | #define nSS_PORT D | |
19 | #define nSS_BIT 1 | |
20 | #define IRQ_RF_PORT D | |
21 | #define IRQ_RF_BIT 0 | |
22 | ||
23 | ||
24 | #define SET_2(p, b) PORT##p |= 1 << (b) | |
25 | #define CLR_2(p, b) PORT##p &= ~(1 << (b)) | |
26 | #define IN_2(p, b) DDR##p &= ~(1 << (b)) | |
27 | #define OUT_2(p, b) DDR##p |= 1 << (b) | |
28 | ||
29 | #define SET_1(p, b) SET_2(p, b) | |
30 | #define CLR_1(p, b) CLR_2(p, b) | |
31 | #define IN_1(p, b) IN_2(p, b) | |
32 | #define OUT_1(p, b) OUT_2(p, b) | |
33 | ||
34 | #define SET(n) SET_1(n##_PORT, n##_BIT) | |
35 | #define CLR(n) CLR_1(n##_PORT, n##_BIT) | |
36 | #define IN(n) IN_1(n##_PORT, n##_BIT) | |
37 | #define OUT(n) OUT_1(n##_PORT, n##_BIT) | |
38 | ||
39 | #endif /* !IO_H */ |
atusb/fw2/usb/patches/cleanup.patch | ||
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1 | Index: fw4/hw/at90usbxx2/ep.c | |
2 | =================================================================== | |
3 | --- fw4.orig/hw/at90usbxx2/ep.c 2011-02-08 17:13:41.000000000 -0300 | |
4 | @@ -56,7 +56,7 @@ | |
5 | Get the max packet size of the endpoint. | |
6 | */ | |
7 | /**************************************************************************/ | |
8 | -U8 ep_size_get() | |
9 | +static U8 ep_size_get(void) | |
10 | { | |
11 | U8 tmp = (UECFG1X &= (7<<EPSIZE0)); | |
12 | tmp >>= EPSIZE0; | |
13 | @@ -68,7 +68,7 @@ | |
14 | Get the direction of the endpoint. | |
15 | */ | |
16 | /**************************************************************************/ | |
17 | -U8 ep_dir_get() | |
18 | +static U8 ep_dir_get(void) | |
19 | { | |
20 | return (UECFG0X & 0x1); | |
21 | } | |
22 | @@ -78,7 +78,7 @@ | |
23 | Get the endpoint type: BULK, CONTROL, INTERRUPT, ISOCHRONOUS | |
24 | */ | |
25 | /**************************************************************************/ | |
26 | -U8 ep_type_get() | |
27 | +static U8 ep_type_get(void) | |
28 | { | |
29 | return ((UECFG0X & (0x3 << EPTYPE0)) >> EPTYPE0); | |
30 | } | |
31 | @@ -88,8 +88,9 @@ | |
32 | Clear the endpoint configuration registers | |
33 | */ | |
34 | /**************************************************************************/ | |
35 | -void ep_cfg_clear() | |
36 | +static void ep_cfg_clear(U8 ep_num) | |
37 | { | |
38 | + ep_select(ep_num); | |
39 | UECFG0X = 0; | |
40 | UECFG1X = 0; | |
41 | } | |
42 | @@ -99,8 +100,9 @@ | |
43 | Clear the specified endpoint's enable bit. | |
44 | */ | |
45 | /**************************************************************************/ | |
46 | -void ep_disable() | |
47 | +static void ep_disable(U8 ep_num) | |
48 | { | |
49 | + ep_select(ep_num); | |
50 | UECONX &= ~(1 << EPEN); | |
51 | } | |
52 | ||
53 | @@ -279,7 +281,7 @@ | |
54 | Clear all endpoints and initialize ep0 for control transfers. | |
55 | */ | |
56 | /**************************************************************************/ | |
57 | -void ep_init() | |
58 | +void ep_init(void) | |
59 | { | |
60 | U8 i; | |
61 | ||
62 | @@ -328,7 +330,7 @@ | |
63 | Return the ep where an intp occurred. If no intp occurred, then return 0xff. | |
64 | */ | |
65 | /**************************************************************************/ | |
66 | -U8 ep_intp_get_num() | |
67 | +U8 ep_intp_get_num(void) | |
68 | { | |
69 | U8 i; | |
70 | ||
71 | @@ -348,7 +350,7 @@ | |
72 | is found, return 0xFF. | |
73 | */ | |
74 | /**************************************************************************/ | |
75 | -U8 ep_intp_get_src() | |
76 | +U8 ep_intp_get_src(void) | |
77 | { | |
78 | U8 i; | |
79 | ||
80 | Index: fw4/hw/at90usbxx2/hw.c | |
81 | =================================================================== | |
82 | --- fw4.orig/hw/at90usbxx2/hw.c 2011-02-08 17:13:41.000000000 -0300 | |
83 | @@ -53,7 +53,7 @@ | |
84 | 4) Enable the global interrupt. | |
85 | */ | |
86 | /**************************************************************************/ | |
87 | -void hw_init() | |
88 | +void hw_init(void) | |
89 | { | |
90 | usb_pcb_t *pcb = usb_pcb_get(); | |
91 | ||
92 | @@ -126,7 +126,7 @@ | |
93 | Disable global interrupts | |
94 | */ | |
95 | /**************************************************************************/ | |
96 | -void hw_intp_disable() | |
97 | +void hw_intp_disable(void) | |
98 | { | |
99 | cli(); | |
100 | } | |
101 | @@ -136,7 +136,7 @@ | |
102 | Enable global interrupts | |
103 | */ | |
104 | /**************************************************************************/ | |
105 | -void hw_intp_enable() | |
106 | +void hw_intp_enable(void) | |
107 | { | |
108 | sei(); | |
109 | } | |
110 | Index: fw4/hw/at90usbxx2/hw.h | |
111 | =================================================================== | |
112 | --- fw4.orig/hw/at90usbxx2/hw.h 2011-02-08 17:13:41.000000000 -0300 | |
113 | @@ -38,9 +38,9 @@ | |
114 | #ifndef HW_H | |
115 | #define HW_H | |
116 | ||
117 | -void hw_init(); | |
118 | -void hw_intp_disable(); | |
119 | -void hw_intp_enable(); | |
120 | +void hw_init(void); | |
121 | +void hw_intp_disable(void); | |
122 | +void hw_intp_enable(void); | |
123 | U8 hw_flash_get_byte(U8 *addr); | |
124 | ||
125 | #endif | |
126 | Index: fw4/usb/ctrl.c | |
127 | =================================================================== | |
128 | --- fw4.orig/usb/ctrl.c 2011-02-08 17:13:41.000000000 -0300 | |
129 | @@ -48,7 +48,7 @@ | |
130 | returning the relevant descriptor stored in flash. | |
131 | */ | |
132 | /**************************************************************************/ | |
133 | -void ctrl_get_desc(req_t *req) | |
134 | +static void ctrl_get_desc(req_t *req) | |
135 | { | |
136 | U8 i = 0, desc_len = 0, desc_type, desc_idx; | |
137 | U8 *desc = NULL; | |
138 | @@ -117,7 +117,7 @@ | |
139 | Return the device configuration number to the host. | |
140 | */ | |
141 | /**************************************************************************/ | |
142 | -void ctrl_get_config() | |
143 | +static void ctrl_get_config(void) | |
144 | { | |
145 | usb_pcb_t *pcb = usb_pcb_get(); | |
146 | ||
147 | @@ -130,7 +130,7 @@ | |
148 | Return the status of the device or endpoint to the host. | |
149 | */ | |
150 | /**************************************************************************/ | |
151 | -void ctrl_get_status(req_t *req) | |
152 | +static void ctrl_get_status(req_t *req) | |
153 | { | |
154 | U8 i, rem_wake_enb = 0; | |
155 | U8 status[2]; | |
156 | @@ -174,7 +174,7 @@ | |
157 | which will setup the endpoints according to the device class. | |
158 | */ | |
159 | /**************************************************************************/ | |
160 | -void ctrl_set_config(req_t *req) | |
161 | +static void ctrl_set_config(req_t *req) | |
162 | { | |
163 | usb_pcb_t *pcb; | |
164 | ||
165 | @@ -201,7 +201,7 @@ | |
166 | stall the specified endpoint. | |
167 | */ | |
168 | /**************************************************************************/ | |
169 | -void ctrl_set_feat(req_t *req) | |
170 | +static void ctrl_set_feat(req_t *req) | |
171 | { | |
172 | usb_pcb_t *pcb = usb_pcb_get(); | |
173 | ||
174 | @@ -230,7 +230,7 @@ | |
175 | don't do anything with the flag. | |
176 | */ | |
177 | /**************************************************************************/ | |
178 | -void ctrl_clear_feat(req_t *req) | |
179 | +static void ctrl_clear_feat(req_t *req) | |
180 | { | |
181 | usb_pcb_t *pcb = usb_pcb_get(); | |
182 | ||
183 | @@ -261,7 +261,7 @@ | |
184 | then we'll stall the endpoint. | |
185 | */ | |
186 | /**************************************************************************/ | |
187 | -void ctrl_handler() | |
188 | +void ctrl_handler(void) | |
189 | { | |
190 | usb_pcb_t *pcb = usb_pcb_get(); | |
191 | U8 i, req[CTRL_IN_REQ_SZ]; | |
192 | Index: fw4/usb/freakusb.h | |
193 | =================================================================== | |
194 | --- fw4.orig/usb/freakusb.h 2011-02-08 17:13:41.000000000 -0300 | |
195 | @@ -213,35 +213,35 @@ | |
196 | U8 pending_data; | |
197 | U8 test; | |
198 | usb_buffer_t fifo[NUM_EPS]; | |
199 | - void (*class_init)(); | |
200 | + void (*class_init)(void); | |
201 | void (*class_req_handler)(req_t *req); | |
202 | - void (*class_rx_handler)(); | |
203 | + void (*class_rx_handler)(void); | |
204 | } usb_pcb_t; | |
205 | ||
206 | // prototypes | |
207 | ||
208 | // usb.c | |
209 | -void usb_init(); | |
210 | -usb_pcb_t *usb_pcb_get(); | |
211 | -void usb_reg_class_drvr(void (*class_cfg_init)(), | |
212 | - void (*class_req_handler)(), | |
213 | - void (*class_rx_handler)()); | |
214 | -void usb_poll(); | |
215 | -bool usb_ready(); | |
216 | +void usb_init(void); | |
217 | +usb_pcb_t *usb_pcb_get(void); | |
218 | +void usb_reg_class_drvr(void (*class_cfg_init)(void), | |
219 | + void (*class_req_handler)(req_t *req), | |
220 | + void (*class_rx_handler)(void)); | |
221 | +void usb_poll(void); | |
222 | +bool usb_ready(void); | |
223 | ||
224 | // req.c | |
225 | -void ctrl_handler(); | |
226 | +void ctrl_handler(void); | |
227 | ||
228 | // ep.c | |
229 | -void ep_init(); | |
230 | +void ep_init(void); | |
231 | void ep_select(U8 ep_num); | |
232 | void ep_write_from_flash(U8 ep_num, U8 *data, U8 len); | |
233 | void ep_write(U8 ep_num); | |
234 | void ep_write_ctrl(U8 *data, U8 len, bool read_from_flash); | |
235 | void ep_read(U8 ep_num); | |
236 | void ep_set_addr(U8 addr); | |
237 | -U8 ep_intp_get_num(); | |
238 | -U8 ep_intp_get_src(); | |
239 | +U8 ep_intp_get_num(void); | |
240 | +U8 ep_intp_get_src(void); | |
241 | void ep_set_stall(U8 ep_num); | |
242 | void ep_clear_stall(U8 ep_num); | |
243 | void ep_reset_toggle(U8 ep_num); | |
244 | @@ -250,12 +250,12 @@ | |
245 | void ep_drain_fifo(U8 ep); | |
246 | ||
247 | // desc.c | |
248 | -U8 *desc_dev_get(); | |
249 | -U8 desc_dev_get_len(); | |
250 | -U8 *desc_cfg_get(); | |
251 | -U8 desc_cfg_get_len(); | |
252 | -U8 *desc_dev_qual_get(); | |
253 | -U8 desc_dev_qual_get_len(); | |
254 | +U8 *desc_dev_get(void); | |
255 | +U8 desc_dev_get_len(void); | |
256 | +U8 *desc_cfg_get(void); | |
257 | +U8 desc_cfg_get_len(void); | |
258 | +U8 *desc_dev_qual_get(void); | |
259 | +U8 desc_dev_qual_get_len(void); | |
260 | U8 *desc_str_get(U8 index); | |
261 | U8 desc_str_get_len(U8 index); | |
262 | ||
263 | Index: fw4/usb/usb.c | |
264 | =================================================================== | |
265 | --- fw4.orig/usb/usb.c 2011-02-08 17:13:41.000000000 -0300 | |
266 | @@ -47,7 +47,7 @@ | |
267 | block for now. | |
268 | */ | |
269 | /**************************************************************************/ | |
270 | -void usb_init() | |
271 | +void usb_init(void) | |
272 | { | |
273 | memset(&pcb, 0, sizeof(usb_pcb_t)); | |
274 | } | |
275 | @@ -57,7 +57,7 @@ | |
276 | Get a pointer to the USB stack's protocol control block. | |
277 | */ | |
278 | /**************************************************************************/ | |
279 | -usb_pcb_t *usb_pcb_get() | |
280 | +usb_pcb_t *usb_pcb_get(void) | |
281 | { | |
282 | return &pcb; | |
283 | } | |
284 | @@ -67,9 +67,9 @@ | |
285 | Register the class driver | |
286 | */ | |
287 | /**************************************************************************/ | |
288 | -void usb_reg_class_drvr(void (*class_init)(), | |
289 | +void usb_reg_class_drvr(void (*class_init)(void), | |
290 | void (*class_req_handler)(req_t *req), | |
291 | - void (*class_rx_handler)()) | |
292 | + void (*class_rx_handler)(void)) | |
293 | { | |
294 | pcb.class_req_handler = class_req_handler; | |
295 | pcb.class_init = class_init; | |
296 | @@ -83,7 +83,7 @@ | |
297 | there are any pending CONTROL transfers. | |
298 | */ | |
299 | /**************************************************************************/ | |
300 | -void usb_poll() | |
301 | +void usb_poll(void) | |
302 | { | |
303 | U8 i, ep_num; | |
304 | ||
305 | Index: fw4/hw/at90usbxx2/isr.c | |
306 | =================================================================== | |
307 | --- fw4.orig/hw/at90usbxx2/isr.c 2011-02-08 17:13:41.000000000 -0300 | |
308 | @@ -44,7 +44,7 @@ | |
309 | Clear all USB related interrupts. | |
310 | */ | |
311 | /**************************************************************************/ | |
312 | -void intp_clear_all() | |
313 | +static void intp_clear_all(void) | |
314 | { | |
315 | U8 i; | |
316 | ||
317 | @@ -62,7 +62,7 @@ | |
318 | Suspend interrupt handler. | |
319 | */ | |
320 | /**************************************************************************/ | |
321 | -void intp_suspend() | |
322 | +static void intp_suspend(void) | |
323 | { | |
324 | SUSP_INT_CLR(); | |
325 | WAKEUP_INT_ENB(); | |
326 | @@ -77,7 +77,7 @@ | |
327 | Resume interrupt handler. | |
328 | */ | |
329 | /**************************************************************************/ | |
330 | -void intp_resume() | |
331 | +static void intp_resume(void) | |
332 | { | |
333 | WAKEUP_INT_DIS(); | |
334 | RESM_INT_CLR(); | |
335 | @@ -89,7 +89,7 @@ | |
336 | Wakeup interrupt handler. | |
337 | */ | |
338 | /**************************************************************************/ | |
339 | -void intp_wakeup() | |
340 | +static void intp_wakeup(void) | |
341 | { | |
342 | // unfreeze the clock | |
343 | USBCON &= ~(1 << FRZCLK); | |
344 | @@ -106,7 +106,7 @@ | |
345 | End of Reset interrupt handler. Gets triggered at the end of a bus reset. | |
346 | */ | |
347 | /**************************************************************************/ | |
348 | -void intp_eor() | |
349 | +static void intp_eor(void) | |
350 | { | |
351 | EOR_INT_CLR(); | |
352 | ep_init(); | |
353 | Index: fw4/class/CDC/cdc.c | |
354 | =================================================================== | |
355 | --- fw4.orig/class/CDC/cdc.c 2011-02-08 17:18:36.000000000 -0300 | |
356 | @@ -63,7 +63,7 @@ | |
357 | ||
358 | // this is the rx handler callback function. it gets registered by the application program | |
359 | // and will handle any incoming data. | |
360 | -static void (*rx_handler)(); | |
361 | +static void (*rx_handler)(void); | |
362 | ||
363 | /**************************************************************************/ | |
364 | /*! | |
365 | @@ -139,7 +139,7 @@ | |
366 | virtual COM data. | |
367 | */ | |
368 | /**************************************************************************/ | |
369 | -void cdc_rx_handler() | |
370 | +void cdc_rx_handler(void) | |
371 | { | |
372 | if (rx_handler) | |
373 | { | |
374 | @@ -154,7 +154,7 @@ | |
375 | usually set this after the host issues the set_configuration request. | |
376 | */ | |
377 | /**************************************************************************/ | |
378 | -void cdc_ep_init() | |
379 | +void cdc_ep_init(void) | |
380 | { | |
381 | // setup the endpoints | |
382 | ep_config(EP_1, BULK, DIR_IN, MAX_PACKET_SZ); | |
383 | @@ -168,7 +168,7 @@ | |
384 | function here since the CDC doesn't know what to do with received data. | |
385 | */ | |
386 | /**************************************************************************/ | |
387 | -void cdc_reg_rx_handler(void (*rx)()) | |
388 | +void cdc_reg_rx_handler(void (*rx)(void)) | |
389 | { | |
390 | if (rx) | |
391 | { | |
392 | @@ -212,7 +212,7 @@ | |
393 | and rx data handler with the USB core. | |
394 | */ | |
395 | /**************************************************************************/ | |
396 | -void cdc_init() | |
397 | +void cdc_init(void) | |
398 | { | |
399 | // hook the putchar function into the printf stdout filestream. This is needed | |
400 | // for printf to work. |
atusb/fw2/usb/patches/no-cdc.patch | ||
---|---|---|
1 | Index: fw4/usb/freakusb.h | |
2 | =================================================================== | |
3 | --- fw4.orig/usb/freakusb.h 2011-02-08 16:40:04.000000000 -0300 | |
4 | @@ -43,9 +43,6 @@ | |
5 | #include <stdio.h> | |
6 | #include "types.h" | |
7 | ||
8 | -// class specific | |
9 | -#include "cdc.h" | |
10 | - | |
11 | // hw specific | |
12 | #include "hw.h" | |
13 |
atusb/fw2/usb/patches/no-vbus-detect.patch | ||
---|---|---|
1 | Index: fw4/hw/at90usbxx2/at90usb.h | |
2 | =================================================================== | |
3 | --- fw4.orig/hw/at90usbxx2/at90usb.h 2011-02-08 15:58:49.000000000 -0300 | |
4 | @@ -42,14 +42,6 @@ | |
5 | ||
6 | #define AT90USB16 | |
7 | ||
8 | -#define VBUS_SENSE_DDR DDRB | |
9 | -#define VBUS_SENSE_PORT PORTB | |
10 | -#define VBUS_SENSE_PIN PINB | |
11 | -#define VBUS_SENSE_IO 5 | |
12 | - | |
13 | -// test if vbus is present | |
14 | -#define is_vbus_on() ((VBUS_SENSE_PIN & (1<<VBUS_SENSE_IO)) != 0) | |
15 | - | |
16 | // banks | |
17 | #define SINGLE 0 | |
18 | #define DUAL 1 | |
19 | Index: fw4/hw/at90usbxx2/hw.c | |
20 | =================================================================== | |
21 | --- fw4.orig/hw/at90usbxx2/hw.c 2011-02-08 15:57:56.000000000 -0300 | |
22 | @@ -85,26 +85,14 @@ | |
23 | // set the interrupts: vbus, suspend, and end of reset | |
24 | UDIEN |= (_BV(SUSPE) | _BV(EORSTE)); | |
25 | ||
26 | - // enable vbus sense pin | |
27 | - VBUS_SENSE_DDR &= ~_BV(VBUS_SENSE_IO); | |
28 | - VBUS_SENSE_PORT &= ~_BV(VBUS_SENSE_IO); | |
29 | - | |
30 | - // enable the vbus sense interrupt | |
31 | - PCICR |= _BV(PCIE0); | |
32 | - PCMSK0 |= _BV(PCINT5); | |
33 | - | |
34 | - // do an initial check to see if bus power is available. we | |
35 | - // need this because we'll miss the first transition to vbus on | |
36 | - if (is_vbus_on()) | |
37 | - { | |
38 | - pcb->connected = true; | |
39 | + /* we're bus-powered, so VBUS is on by definition */ | |
40 | + pcb->connected = true; | |
41 | ||
42 | - // attach USB | |
43 | - UDCON &= ~_BV(DETACH); | |
44 | + // attach USB | |
45 | + UDCON &= ~_BV(DETACH); | |
46 | ||
47 | - // reset CPU | |
48 | - //UDCON |= _BV(RSTCPU); | |
49 | - } | |
50 | + // reset CPU | |
51 | + //UDCON |= _BV(RSTCPU); | |
52 | ||
53 | // turn on the global interrupts | |
54 | sei(); | |
55 | Index: fw4/hw/at90usbxx2/isr.c | |
56 | =================================================================== | |
57 | --- fw4.orig/hw/at90usbxx2/isr.c 2011-02-08 16:00:34.000000000 -0300 | |
58 | @@ -249,60 +249,3 @@ | |
59 | ||
60 | sei(); | |
61 | } | |
62 | - | |
63 | -/**************************************************************************/ | |
64 | -/*! | |
65 | - This ISR is only for the AT90USB16 since we need to use an IO as the VBUS sense | |
66 | -*/ | |
67 | -/**************************************************************************/ | |
68 | -ISR(PCINT0_vect) | |
69 | -{ | |
70 | - usb_pcb_t *pcb = usb_pcb_get(); | |
71 | - | |
72 | - cli(); | |
73 | - | |
74 | - if (is_vbus_on()) | |
75 | - { | |
76 | - pcb->connected = true; | |
77 | - | |
78 | - // enable the 3.3V regulator for the USB pads | |
79 | - REGCR &= ~_BV(REGDIS); | |
80 | - | |
81 | - // freeze the clock | |
82 | - USBCON |= _BV(FRZCLK); | |
83 | - | |
84 | - // enable the 48 MHz PLL | |
85 | - PLLCSR &= ~(_BV(PLLP2) | _BV(PLLP1) | _BV(PLLP0)); | |
86 | - PLLCSR |= _BV(1<<PLLE); | |
87 | - | |
88 | - // busy wait until the PLL is locked | |
89 | - while (!(PLLCSR & _BV(PLOCK))); | |
90 | - | |
91 | - // unfreeze clock | |
92 | - USBCON &= ~_BV(FRZCLK); | |
93 | - | |
94 | - // attach USB | |
95 | - UDCON &= ~_BV(DETACH); | |
96 | - | |
97 | - // reset CPU | |
98 | - UDCON |= _BV(RSTCPU); | |
99 | - } | |
100 | - else | |
101 | - { | |
102 | - // if we're connected, but VBUS is gone, then detach | |
103 | - | |
104 | - // detach from the bus | |
105 | - UDCON |= _BV(DETACH); | |
106 | - | |
107 | - // freeze the clock and turn off the USB PLL | |
108 | - USBCON |= _BV(FRZCLK); | |
109 | - PLLCSR &= ~_BV(PLLE); | |
110 | - | |
111 | - // disable the USB voltage regulator | |
112 | - REGCR |= _BV(REGDIS); | |
113 | - | |
114 | - pcb->connected = false; | |
115 | - pcb->flags = 0; | |
116 | - } | |
117 | - sei(); | |
118 | -} |
atusb/fw2/usb/patches/series | ||
---|---|---|
1 | cleanup.patch | |
2 | no-cdc.patch | |
3 | no-vbus-detect.patch |