IEEE 802.15.4 subsystem
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IEEE 802.15.4 subsystem Commit Details
Date: | 2011-04-10 15:24:24 (12 years 11 months ago) |
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Author: | Werner Almesberger |
Commit: | 4b07e5c8946b84aa30a6f1b6be35e49ba6165e84 |
Message: | tools/: moved constant wave test mode code to libatrf (for sharing) - lib/Makefile (OBJS), include/cwtest.h (cw_test_begin, cw_test_end), lib/cwtest.c (enter_test_mode_230, enter_test_mode_231, cw_test_begin, cw_test_end): moved constant wave test mode setup over from atrf-txrx.c - atrf-txrx/atrf-txrx.c (transmit_pattern): use functions from cwtest.o |
Files: |
tools/atrf-txrx/atrf-txrx.c (4 diffs) tools/include/cwtest.h (1 diff) tools/lib/Makefile (1 diff) tools/lib/cwtest.c (1 diff) |
Change Details
tools/atrf-txrx/atrf-txrx.c | ||
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24 | 24 | #include "at86rf230.h" |
25 | 25 | #include "atrf.h" |
26 | 26 | #include "misctxrx.h" |
27 | #include "cwtest.h" | |
27 | 28 | |
28 | 29 | #include "pcap.h" |
29 | 30 | |
... | ... | |
341 | 342 | } |
342 | 343 | |
343 | 344 | |
344 | static void enter_test_mode_230(struct atrf_dsc *dsc, uint8_t cont_tx) | |
345 | { | |
346 | atrf_buf_write(dsc, "", 1); | |
347 | atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC); | |
348 | atrf_reg_write(dsc, REG_CONT_TX_1, cont_tx); | |
349 | ||
350 | if (!atrf_test_mode(dsc)) { | |
351 | atrf_reset_rf(dsc); | |
352 | fprintf(stderr, "device does not support test mode\n"); | |
353 | exit(1); | |
354 | } | |
355 | ||
356 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON); | |
357 | wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 20); | |
358 | ||
359 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START); | |
360 | } | |
361 | ||
362 | ||
363 | static void enter_test_mode_231(struct atrf_dsc *dsc, uint8_t cont_tx) | |
364 | { | |
365 | uint8_t buf[127]; | |
366 | uint8_t status; | |
367 | ||
368 | switch (cont_tx) { | |
369 | case CONT_TX_M2M: | |
370 | fprintf(stderr, | |
371 | "-2 MHz mode is not supported by the AT86RF231\n"); | |
372 | atrf_close(dsc); | |
373 | exit(1); | |
374 | case CONT_TX_M500K: | |
375 | memset(buf, 0, sizeof(buf)); | |
376 | break; | |
377 | case CONT_TX_P500K: | |
378 | memset(buf, 0xff, sizeof(buf)); | |
379 | break; | |
380 | default: | |
381 | abort(); | |
382 | } | |
383 | ||
384 | atrf_reg_write(dsc, REG_IRQ_MASK, IRQ_PLL_LOCK); /* 2 */ | |
385 | atrf_reg_write(dsc, REG_TRX_CTRL_1, 0); /* 3 */ | |
386 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF); /* 4 */ | |
387 | /* deleted step 5 - we don't need to enable CLKM */ | |
388 | ||
389 | status = atrf_reg_read(dsc, REG_TRX_STATUS) & TRX_STATUS_MASK; /* 8 */ | |
390 | if (status != TRX_STATUS_TRX_OFF) { | |
391 | fprintf(stderr, "expected status 0x%02x, got 0x%02x\n", | |
392 | TRX_STATUS_TRX_OFF, status); | |
393 | exit(1); | |
394 | } | |
395 | ||
396 | atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC); /* 9 */ | |
397 | atrf_reg_write(dsc, REG_TRX_CTRL_2, OQPSK_DATA_RATE_2000); /*10 */ | |
398 | atrf_reg_write(dsc, REG_RX_CTRL, 0xa7); /*11 */ | |
399 | ||
400 | atrf_buf_write(dsc, buf, sizeof(buf)); /*12 */ | |
401 | ||
402 | atrf_reg_write(dsc, REG_PART_NUM, 0x54); /*13 */ | |
403 | atrf_reg_write(dsc, REG_PART_NUM, 0x46); /*14 */ | |
404 | ||
405 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON); /*15 */ | |
406 | wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 0); /*16 */ | |
407 | ||
408 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START); /*17 */ | |
409 | } | |
410 | ||
411 | ||
412 | 345 | static void transmit_pattern(struct atrf_dsc *dsc, double pause_s, int times) |
413 | 346 | { |
414 | 347 | uint8_t buf[MAX_PSDU]; |
... | ... | |
534 | 467 | { |
535 | 468 | int status = 0; |
536 | 469 | |
537 | switch (atrf_identify(dsc)) { | |
538 | case artf_at86rf230: | |
539 | enter_test_mode_230(dsc, cont_tx); | |
540 | break; | |
541 | case artf_at86rf231: | |
542 | enter_test_mode_231(dsc, cont_tx); | |
543 | break; | |
544 | default: | |
545 | abort(); | |
546 | } | |
470 | cw_test_begin(dsc, cont_tx); | |
547 | 471 | |
548 | 472 | if (cmd) |
549 | 473 | status = system(cmd); |
... | ... | |
552 | 476 | sleep(1); |
553 | 477 | } |
554 | 478 | |
555 | if (atrf_identify(dsc) == artf_at86rf231) | |
556 | atrf_reg_write(dsc, REG_PART_NUM, 0); | |
557 | ||
558 | atrf_reset_rf(dsc); | |
479 | cw_test_end(dsc); | |
559 | 480 | |
560 | 481 | return status; |
561 | 482 | } |
tools/include/cwtest.h | ||
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1 | /* | |
2 | * include/cwtest.h - AT86RF230/231 constant wave test mode | |
3 | * | |
4 | * Written 2011 by Werner Almesberger | |
5 | * Copyright 2011 Werner Almesberger | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | ||
13 | ||
14 | #ifndef CWTEST_H | |
15 | #define CWTEST_H | |
16 | ||
17 | #include <stdint.h> | |
18 | ||
19 | #include "atrf.h" | |
20 | ||
21 | ||
22 | void cw_test_begin(struct atrf_dsc *dsc, uint8_t cont_tx); | |
23 | void cw_test_end(struct atrf_dsc *dsc); | |
24 | ||
25 | #endif /* !CW_TEST_H */ |
tools/lib/Makefile | ||
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19 | 19 | OBJS_ben_jlime = atben.o |
20 | 20 | OBJS_ben_openwrt = atben.o |
21 | 21 | |
22 | OBJS = atrf.o misctxrx.o $(OBJS_$(TARGET)) | |
22 | OBJS = atrf.o misctxrx.o cwtest.o $(OBJS_$(TARGET)) | |
23 | 23 | |
24 | 24 | .PHONY: all clean spotless |
25 | 25 |
tools/lib/cwtest.c | ||
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1 | /* | |
2 | * lib/cwtest.c - Set up AT86RF230/231 constant wave test mode | |
3 | * | |
4 | * Written 2010-2011 by Werner Almesberger | |
5 | * Copyright 2010-2011 Werner Almesberger | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | ||
13 | ||
14 | #include <stdint.h> | |
15 | #include <stdlib.h> | |
16 | #include <stdio.h> | |
17 | #include <string.h> | |
18 | ||
19 | #include "at86rf230.h" | |
20 | #include "atrf.h" | |
21 | #include "misctxrx.h" | |
22 | ||
23 | #include "cwtest.h" | |
24 | ||
25 | ||
26 | static void enter_test_mode_230(struct atrf_dsc *dsc, uint8_t cont_tx) | |
27 | { | |
28 | atrf_buf_write(dsc, "", 1); | |
29 | atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC); | |
30 | atrf_reg_write(dsc, REG_CONT_TX_1, cont_tx); | |
31 | ||
32 | if (!atrf_test_mode(dsc)) { | |
33 | atrf_reset_rf(dsc); | |
34 | fprintf(stderr, "device does not support test mode\n"); | |
35 | exit(1); | |
36 | } | |
37 | ||
38 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON); | |
39 | wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 20); | |
40 | ||
41 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START); | |
42 | } | |
43 | ||
44 | ||
45 | static void enter_test_mode_231(struct atrf_dsc *dsc, uint8_t cont_tx) | |
46 | { | |
47 | uint8_t buf[127]; | |
48 | uint8_t status; | |
49 | ||
50 | switch (cont_tx) { | |
51 | case CONT_TX_M2M: | |
52 | fprintf(stderr, | |
53 | "-2 MHz mode is not supported by the AT86RF231\n"); | |
54 | atrf_close(dsc); | |
55 | exit(1); | |
56 | case CONT_TX_M500K: | |
57 | memset(buf, 0, sizeof(buf)); | |
58 | break; | |
59 | case CONT_TX_P500K: | |
60 | memset(buf, 0xff, sizeof(buf)); | |
61 | break; | |
62 | default: | |
63 | abort(); | |
64 | } | |
65 | ||
66 | atrf_reg_write(dsc, REG_IRQ_MASK, IRQ_PLL_LOCK); /* 2 */ | |
67 | atrf_reg_write(dsc, REG_TRX_CTRL_1, 0); /* 3 */ | |
68 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF); /* 4 */ | |
69 | /* deleted step 5 - we don't need to enable CLKM */ | |
70 | ||
71 | status = atrf_reg_read(dsc, REG_TRX_STATUS) & TRX_STATUS_MASK; /* 8 */ | |
72 | if (status != TRX_STATUS_TRX_OFF) { | |
73 | fprintf(stderr, "expected status 0x%02x, got 0x%02x\n", | |
74 | TRX_STATUS_TRX_OFF, status); | |
75 | exit(1); | |
76 | } | |
77 | ||
78 | atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC); /* 9 */ | |
79 | atrf_reg_write(dsc, REG_TRX_CTRL_2, OQPSK_DATA_RATE_2000); /*10 */ | |
80 | atrf_reg_write(dsc, REG_RX_CTRL, 0xa7); /*11 */ | |
81 | ||
82 | atrf_buf_write(dsc, buf, sizeof(buf)); /*12 */ | |
83 | ||
84 | atrf_reg_write(dsc, REG_PART_NUM, 0x54); /*13 */ | |
85 | atrf_reg_write(dsc, REG_PART_NUM, 0x46); /*14 */ | |
86 | ||
87 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON); /*15 */ | |
88 | wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 0); /*16 */ | |
89 | ||
90 | atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START); /*17 */ | |
91 | } | |
92 | ||
93 | ||
94 | void cw_test_begin(struct atrf_dsc *dsc, uint8_t cont_tx) | |
95 | { | |
96 | switch (atrf_identify(dsc)) { | |
97 | case artf_at86rf230: | |
98 | enter_test_mode_230(dsc, cont_tx); | |
99 | break; | |
100 | case artf_at86rf231: | |
101 | enter_test_mode_231(dsc, cont_tx); | |
102 | break; | |
103 | default: | |
104 | abort(); | |
105 | } | |
106 | } | |
107 | ||
108 | ||
109 | void cw_test_end(struct atrf_dsc *dsc) | |
110 | { | |
111 | if (atrf_identify(dsc) == artf_at86rf231) | |
112 | atrf_reg_write(dsc, REG_PART_NUM, 0); | |
113 | ||
114 | atrf_reset_rf(dsc); | |
115 | } |