Date:2015-05-24 14:37:38 (4 years 3 months ago)
Author:Alexander Aring
Commit:5129029d3bcffb21aabf38f522f4f1e5426e4919
Message:atusb: fw: add support for rzusbstick

This patch adds support for the rzusbstick for the atusb firmware.
More detailed information about this usb stick:

http://www.atmel.com/tools/rzusbstick.aspx

Original I have the rzraven kit:

http://www.atmel.com/tools/rzraven.aspx

Which comes with a special cable and avr dragon programmer. You need
some programmer and wires to the programmers pins. To lookup how to
connect the programmer to the rzusbstick pinout, see:

http://www.atmel.com/Images/doc8117.pdf

page 22 (schematics of the rzusbstick).

Difference between atusb and rzusbstick(rzusb) is mainly the at86rf231
vs at86rf230 one. The rzusb contains the at86rf230 which is a little bit
hard to deal with it (and has a huge errata inside the datasheet).
Nevertheless with small schanges the atusb firmware can run now on the
rzusb. The rzusb contains also a bigger mcu, so we can maybe cache more
pdus for receive handling.

To compile the rzusb firmware call:
make NAME=rzusb

this will generate the rzusb.bin

then call the programmer (in my case avrdude):
avrdude -P usb -c dragon_jtag -p usb1287 -U flash:w:rzusb.bin

NOTE: currently there is no chance (I suppose) to ensure that the atusb
receive the correct firmware, so don't try to flash the atusb with the
rzusb firmware! Also the vendor and product id is the same.

This currently a RFC, it's a quick hack and I think we should update
more the documentation to support the rzusb.

Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Cc: Stefan Schmidt <stefan@osg.samsung.com>
Cc: Werner Almesberger <werner@almesberger.net>
Files: atusb/fw/Makefile (1 diff)
atusb/fw/atusb.c (1 diff)
atusb/fw/board.c (2 diffs)
atusb/fw/board.h (2 diffs)
atusb/fw/board_app.c (2 diffs)
atusb/fw/mac.c (5 diffs)
atusb/fw/spi.c (3 diffs)
atusb/fw/usb/atu2.c (1 diff)

Change Details

atusb/fw/Makefile
1818     -Wall -Wextra -Wshadow -Werror -Wno-unused-parameter \
1919     -Wmissing-prototypes -Wmissing-declarations -Wstrict-prototypes
2020
21ifeq ($(NAME),rzusb)
22CHIP=at90usb1287
23CFLAGS += -DRZUSB
24else
2125CHIP=atmega32u2
26CFLAGS += -DATUSB
27endif
2228HOST=jlime
2329BOOT_ADDR=0x7000
2430
atusb/fw/atusb.c
3737
3838    usb_init();
3939    ep0_init();
40#ifdef ATUSB
4041    timer_init();
4142
4243    /* move interrupt vectors to 0 */
4344    MCUCR = 1 << IVCE;
4445    MCUCR = 0;
46#endif
4547
4648    sei();
4749
atusb/fw/board.c
4141     * clock. The clock switching procedure is described in the ATmega32U2
4242     * data sheet in secton 8.2.2.
4343     */
44
44#ifdef ATUSB
4545    spi_begin();
4646    spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
4747    spi_send(CLKM_CTRL_8MHz);
4848    spi_end();
49#endif
50#ifdef RZUSB
51    spi_begin();
52    spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
53    spi_send(0x10);
54    spi_end();
55
56    /* TX_AUTO_CRC_ON, default disabled */
57    spi_begin();
58    spi_send(AT86RF230_REG_WRITE | 0x05);
59    spi_send(0x80);
60    spi_end();
61#endif
4962}
5063
5164
...... 
131144    WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
132145                   change */
133146
134    /* We start with a 1 MHz/8 clock. Disable the prescaler. */
135
136147    CLKPR = 1 << CLKPCE;
148#ifdef ATUSB
149    /* We start with a 1 MHz/8 clock. Disable the prescaler. */
137150    CLKPR = 0;
151#endif
152#ifdef RZUSB
153    /* We start with a 16 MHz/8 clock. Put the prescaler to 2. */
154    CLKPR = 1 << CLKPS0;
155#endif
138156
139157    get_sernum();
140158}
atusb/fw/board.h
1818
1919#include <atusb/atusb.h>
2020
21
21#ifdef ATUSB
2222#define LED_PORT B
2323#define LED_BIT 6
2424#define nRST_RF_PORT C
...... 
3838#define IRQ_RF_PORT D
3939#define IRQ_RF_BIT 0
4040
41#define SPI_WAIT_DONE() while (!(UCSR1A & 1 << RXC1))
42#define SPI_DATA UDR1
43
44#endif
45#ifdef RZUSB
46#define LED_PORT D
47#define LED_BIT 7
48#define nRST_RF_PORT B
49#define nRST_RF_BIT 5
50#define SLP_TR_PORT B
51#define SLP_TR_BIT 4
52
53#define SCLK_PORT B
54#define SCLK_BIT 1
55#define MOSI_PORT B
56#define MOSI_BIT 2
57
58#define MISO_PORT B
59#define MISO_BIT 3
60#define nSS_PORT B
61#define nSS_BIT 0
62#define IRQ_RF_PORT D
63#define IRQ_RF_BIT 4
64
65#define SPI_WAIT_DONE() while ((SPSR & (1 << SPIF)) == 0)
66#define SPI_DATA SPDR
67
68#endif
4169
4270#define SET_2(p, b) PORT##p |= 1 << (b)
4371#define CLR_2(p, b) PORT##p &= ~(1 << (b))
atusb/fw/board_app.c
154154
155155uint8_t irq_serial;
156156
157
157#ifdef ATUSB
158158ISR(INT0_vect)
159#endif
160#ifdef RZUSB
161ISR(TIMER1_CAPT_vect)
162#endif
159163{
160164    if (mac_irq) {
161165        if (mac_irq())
...... 
168172    }
169173}
170174
171
175#ifdef ATUSB
172176void board_app_init(void)
173177{
174178    /* enable INT0, trigger on rising edge */
175179    EICRA = 1 << ISC01 | 1 << ISC00;
176180    EIMSK = 1 << 0;
177181}
182#endif
183#ifdef RZUSB
184void board_app_init(void)
185{
186    /* enable timer input capture 1, trigger on rising edge */
187    TCCR1B = (1 << ICES1);
188    TIFR1 = (1 << ICF1);
189    TIMSK1 = (1 << ICIE1);
190}
191#endif
atusb/fw/mac.c
2121#include "board.h"
2222#include "mac.h"
2323
24
2524#define RX_BUFS 3
2625
2726
...... 
102101    usb_next();
103102}
104103
104static void change_state(uint8_t new)
105{
106    while ((reg_read(REG_TRX_STATUS) & TRX_STATUS_MASK) ==
107        TRX_STATUS_TRANSITION);
108    reg_write(REG_TRX_STATE, new);
109}
105110
106111static void rx_done(void *user)
107112{
108113    led(0);
109114    next_buf(&rx_out);
110115    usb_next();
116#ifdef RZUSB
117    /* slap at86rf230 - reduce fragmentation issue */
118    change_state(TRX_STATUS_RX_AACK_ON);
119#endif
111120}
112121
113122
...... 
117126    uint8_t *buf;
118127
119128    spi_begin();
129#ifdef ATUSB
120130    if (!(spi_io(AT86RF230_BUF_READ) & RX_CRC_VALID)) {
121131        spi_end();
122132        return;
123133    }
134#endif
135#ifdef RZUSB
136    spi_io(AT86RF230_BUF_READ);
137#endif
138
124139    size = spi_recv();
125140    if (!size || (size & 0x80)) {
126141        spi_end();
...... 
169184/* ----- TX/RX ------------------------------------------------------------- */
170185
171186
172static void change_state(uint8_t new)
173{
174    while ((reg_read(REG_TRX_STATUS) & TRX_STATUS_MASK) ==
175        TRX_STATUS_TRANSITION);
176    reg_write(REG_TRX_STATE, new);
177}
178
179
180187bool mac_rx(int on)
181188{
182189    if (on) {
...... 
209216    }
210217    while (status != TRX_STATUS_RX_ON && status != TRX_STATUS_RX_AACK_ON);
211218
219#ifdef ATUSB
212220    /*
213221     * We use TRX_CMD_FORCE_PLL_ON instead of TRX_CMD_PLL_ON because a new
214222     * reception may have begun while we were still working on the previous
215223     * one.
216224     */
217225    reg_write(REG_TRX_STATE, TRX_CMD_FORCE_PLL_ON);
226#endif
227#ifdef RZUSB
228    /*
229     * at86rf230 doesn't support force change, nevetherless this works
230     * somehow
231     */
232    reg_write(REG_TRX_STATE, TRX_CMD_PLL_ON);
233#endif
218234
219235    handle_irq();
220236
atusb/fw/spi.c
3434uint8_t spi_io(uint8_t v)
3535{
3636// while (!(UCSR1A & 1 << UDRE1));
37    UDR1 = v;
38    while (!(UCSR1A & 1 << RXC1));
39    return UDR1;
37    SPI_DATA = v;
38    SPI_WAIT_DONE();
39    return SPDR;
4040}
4141
4242
...... 
5151{
5252    if (!n)
5353        return;
54    UDR1 = 0;
54    SPI_DATA = 0;
5555    while (--n) {
56        while (!(UCSR1A & 1 << RXC1));
57        *buf++ = UDR1;
58        UDR1 = 0;
56        SPI_WAIT_DONE();
57        *buf++ = SPI_DATA;
58        SPI_DATA = 0;
5959    }
60    while (!(UCSR1A & 1 << RXC1));
61    *buf++ = UDR1;
60    SPI_WAIT_DONE();
61    *buf++ = SPI_DATA;
6262}
6363
6464
6565void spi_off(void)
6666{
6767    spi_initialized = 0;
68    UCSR1B = 0;
68    #ifdef ATUSB
69        UCSR1B = 0;
70    #endif
71    #ifdef RZUSB
72        SPCR &= ~(1 << SPE);
73    #endif
6974}
7075
7176
...... 
7782    OUT(nSS);
7883    IN(MISO);
7984
85#ifdef ATUSB
8086    UBRR1 = 0; /* set bit rate to zero to begin */
8187    UCSR1C = 1 << UMSEL11 | 1 << UMSEL10;
8288            /* set MSPI, MSB first, SPI data mode 0 */
8389    UCSR1B = 1 << RXEN1 | 1 << TXEN1;
8490            /* enable receiver and transmitter */
8591    UBRR1 = 0; /* reconfirm the bit rate */
92#endif
93#ifdef RZUSB
94    SPCR = (1 << SPE) | (1 << MSTR);
95    SPSR = (1 << SPI2X);
96#endif
8697
8798    spi_initialized = 1;
8899}
atusb/fw/usb/atu2.c
252252    USBCON |= 1 << FRZCLK; /* freeze the clock */
253253
254254    /* enable the PLL and wait for it to lock */
255#ifdef ATUSB
255256    PLLCSR &= ~(1 << PLLP2 | 1 << PLLP1 | 1 << PLLP0);
257#endif
258#ifdef RZUSB
259    /* TODO sheet page 50 For Atmel AT90USB128x only. Do not use with Atmel AT90USB64x. */
260    /* FOR 8 XTAL Mhz only!!! */
261    PLLCSR = ((1 << PLLP1) | (1 << PLLP0));
262#endif
256263    PLLCSR |= 1 << PLLE;
257264    while (!(PLLCSR & (1 << PLOCK)));
258265
266#ifdef ATUSB
259267    USBCON &= ~(1 << USBE); /* reset the controller */
260268    USBCON |= 1 << USBE;
269#endif
270#ifdef RZUSB
271    UHWCON |= (1 << UVREGE);
272
273    USBCON &= ~((1 << USBE) | (1 << OTGPADE)); /* reset the controller */
274    USBCON |= ((1 << USBE) | (1 << OTGPADE));
275#endif
261276
262277    USBCON &= ~(1 << FRZCLK); /* thaw the clock */
263278

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