Date:2011-01-16 20:03:11 (8 years 8 months ago)
Author:Werner Almesberger
Commit:ebe667197a3c09a1f9b3005efcf7729c8b12da84
Message:dirtly made the atrf tools run with the new atusd board

- lib/atusd.c: renamed CLK to SLP_TR
- lib/atusd.c (atusd_cycle, atusd_cycle, atusd_open, atusd_close):
#ifdef'ed all uses of CLK and changed them to SLP_TR (along with the
change in function)
- atrf-txrx/atrf-txrx.c (init_txrx): always use the crystal oscillator
Files: tools/atrf-txrx/atrf-txrx.c (1 diff)
tools/lib/atusd.c (7 diffs)

Change Details

tools/atrf-txrx/atrf-txrx.c
7676    atrf_reset_rf(dsc);
7777    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TRX_OFF);
7878
79#ifdef HAVE_USB /* @@@ yeah, ugly */
79#if 1 // def HAVE_USB /* @@@ yeah, ugly */
8080    atrf_reg_write(dsc, REG_XOSC_CTRL,
8181        (XTAL_MODE_INT << XTAL_MODE_SHIFT) | trim);
8282#else
tools/lib/atusd.c
2525enum {
2626    VDD_OFF = 1 << 2, /* VDD disable, PD02 */
2727    MOSI = 1 << 8, /* CMD, PD08 */
28#ifdef OLD
2829    CLK = 1 << 9, /* CLK, PD09 */
30#else
31    SLP_TR = 1 << 9, /* CLK, PD09 */
32#endif
2933    MISO = 1 << 10, /* DAT0, PD10 */
3034    SCLK = 1 << 11, /* DAT1, PD11 */
3135    IRQ = 1 << 12, /* DAT2, PD12 */
...... 
8488    MSC_STRPCL = 1;
8589
8690    /* drive all outputs low (including the MMC bus clock) */
91#ifdef OLD
8792    PDDATC = MOSI | CLK | SCLK | nSEL;
8893
8994    /* make the MMC bus clock a regular output */
9095    PDFUNC = CLK;
96#else
97    PDDATC = MOSI | SLP_TR | SCLK | nSEL;
98    PDFUNC = SLP_TR;
99#endif
91100
92101    /* cut the power */
93102    PDDATS = VDD_OFF;
...... 
101110    /* precharge the capacitors to avoid current surge */
102111    wait_for_power();
103112
113#ifdef OLD
114
104115    /* return the bus clock output to the MMC controller */
105116    PDFUNS = CLK;
106117
107118    /* start MMC clock output */
108119    MSC_STRPCL = 2;
120#endif
109121
110122    /* supply power */
111123    PDDATC = VDD_OFF;
...... 
198210    PDDATC = SCLK;
199211
200212    /* take the GPIOs away from the MMC controller */
213#ifdef OLD
201214    PDFUNC = MOSI | MISO | SCLK | IRQ | nSEL;
202215    PDFUNS = CLK;
216#else
217    PDFUNC = MOSI | MISO | SCLK | IRQ | nSEL | SLP_TR;
218#endif
203219
204220    /* set the pin directions */
205221    PDDIRC = MISO | IRQ;
222#ifdef OLD
206223    PDDIRS = MOSI | CLK | SCLK | nSEL;
224#else
225    PDDIRS = MOSI | SLP_TR | SCLK | nSEL;
226#endif
207227
208228    /* let capacitors precharge */
209229    wait_for_power();
...... 
211231    /* enable power */
212232    PDDATC = VDD_OFF;
213233
234#ifdef OLD
214235    /* set the MSC clock to 316 MHz / 21 = 16 MHz */
215236    MSCCDR = 20;
216237    /*
...... 
222243    MSC_CLKRT = 0;
223244    /* start MMC clock output */
224245    MSC_STRPCL = 2;
246#endif
225247
226248    wait_for_power();
227249    atusd_reset_rf(dsc);
...... 
241263    PDDATS = VDD_OFF;
242264
243265    /* make all MMC pins inputs */
266#ifdef OLD
244267    PDDIRC = MOSI | MISO | CLK | SCLK | IRQ | nSEL;
268#else
269    PDDIRC = MOSI | MISO | SLP_TR | SCLK | IRQ | nSEL;
270#endif
245271}
246272
247273

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