Root/tools/lib/cwtest.c

Source at commit 16a48d6931a9b3d8c652ab92ee94f6b43d7dd88c created 8 years 10 months ago.
By Werner Almesberger, libatrf: cw test mode can now be resumed, with lower overhead (231 only)
1/*
2 * lib/cwtest.c - Set up AT86RF230/231 constant wave test mode
3 *
4 * Written 2010-2011 by Werner Almesberger
5 * Copyright 2010-2011 Werner Almesberger
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13
14#include <stdint.h>
15#include <stdlib.h>
16#include <stdio.h>
17#include <string.h>
18
19#include "at86rf230.h"
20#include "atrf.h"
21#include "misctxrx.h"
22
23#include "cwtest.h"
24
25
26static int last_cont_tx; /* @@@ hack for resuming on the 230 */
27
28
29static void enter_test_mode_230(struct atrf_dsc *dsc, uint8_t cont_tx)
30{
31    atrf_buf_write(dsc, "", 1);
32    atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC);
33    atrf_reg_write(dsc, REG_CONT_TX_1, cont_tx);
34
35    if (!atrf_test_mode(dsc)) {
36        atrf_reset_rf(dsc);
37        fprintf(stderr, "device does not support test mode\n");
38        exit(1);
39    }
40
41    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON);
42    wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 20);
43
44    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START);
45}
46
47
48static void prepare_test_mode_231(struct atrf_dsc *dsc, uint8_t cont_tx)
49{
50    uint8_t buf[127];
51    uint8_t status;
52
53    switch (cont_tx) {
54    case CONT_TX_M2M:
55        fprintf(stderr,
56            "-2 MHz mode is not supported by the AT86RF231\n");
57        atrf_close(dsc);
58        exit(1);
59    case CONT_TX_M500K:
60        memset(buf, 0, sizeof(buf));
61        break;
62    case CONT_TX_P500K:
63        memset(buf, 0xff, sizeof(buf));
64        break;
65    default:
66        abort();
67    }
68
69    atrf_reg_write(dsc, REG_IRQ_MASK, IRQ_PLL_LOCK); /* 2 */
70    atrf_reg_write(dsc, REG_TRX_CTRL_1, 0); /* 3 */
71    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF); /* 4 */
72    /* deleted step 5 - we don't need to enable CLKM */
73
74    status = atrf_reg_read(dsc, REG_TRX_STATUS) & TRX_STATUS_MASK; /* 8 */
75    if (status != TRX_STATUS_TRX_OFF) {
76        fprintf(stderr, "expected status 0x%02x, got 0x%02x\n",
77            TRX_STATUS_TRX_OFF, status);
78        exit(1);
79    }
80
81    atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC); /* 9 */
82    atrf_reg_write(dsc, REG_TRX_CTRL_2, OQPSK_DATA_RATE_2000); /*10 */
83    atrf_reg_write(dsc, REG_RX_CTRL, 0xa7); /*11 */
84
85    atrf_buf_write(dsc, buf, sizeof(buf)); /*12 */
86}
87
88
89static void start_test_mode_231(struct atrf_dsc *dsc)
90{
91    atrf_reg_write(dsc, REG_PART_NUM, 0x54); /*13 */
92    atrf_reg_write(dsc, REG_PART_NUM, 0x46); /*14 */
93    
94    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON); /*15 */
95    wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 0); /*16 */
96
97    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START); /*17 */
98}
99
100
101void cw_test_begin(struct atrf_dsc *dsc, uint8_t cont_tx)
102{
103    switch (atrf_identify(dsc)) {
104    case artf_at86rf230:
105        enter_test_mode_230(dsc, cont_tx);
106        last_cont_tx = cont_tx;
107        break;
108    case artf_at86rf231:
109        prepare_test_mode_231(dsc, cont_tx);
110        start_test_mode_231(dsc);
111        break;
112    default:
113        abort();
114    }
115}
116
117
118void cw_test_resume(struct atrf_dsc *dsc)
119{
120    switch (atrf_identify(dsc)) {
121    case artf_at86rf230:
122        enter_test_mode_230(dsc, last_cont_tx);
123        break;
124    case artf_at86rf231:
125        start_test_mode_231(dsc);
126        break;
127    default:
128        abort();
129    }
130}
131
132
133void cw_test_end(struct atrf_dsc *dsc)
134{
135    if (atrf_identify(dsc) == artf_at86rf231)
136        atrf_reg_write(dsc, REG_PART_NUM, 0);
137    
138    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF);
139
140    /*
141     * atrf_reset_rf can take a long time. I appears that at least the
142     * AT86RF231 also exits test mode if we send it to sleep for a
143     * moment.
144     */
145    switch (atrf_identify(dsc)) {
146    case artf_at86rf230:
147        atrf_reset_rf(dsc);
148        break;
149    case artf_at86rf231:
150        usleep(2); /* table 7-1: tTR12(typ) = 1 us */
151        atrf_slp_tr(dsc, 1);
152        usleep(10); /* table 7-1: tTR3(typ) doesn't really apply */
153        atrf_slp_tr(dsc, 0);
154        usleep(500); /* table 7-1: tTR2(typ) = 380 */
155        break;
156    default:
157        abort();
158    }
159}
160

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