IEEE 802.15.4 subsystem
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IEEE 802.15.4 subsystem Git Source Tree
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Source at commit 259400fdb8674b0134597faea68fb20fd42bde9f created 13 years 1 month ago. By Werner Almesberger, atusb/fw2: firmware for the AVR-based atusb (in progress) | |
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1 | #include <stdint.h> |
2 | |
3 | #include <avr/io.h> |
4 | |
5 | #define F_CPU 8000000UL |
6 | #include <util/delay.h> |
7 | |
8 | #include "freakusb.h" |
9 | |
10 | #include "io.h" |
11 | #include "at86rf230.h" |
12 | |
13 | |
14 | static void spi_begin(void) |
15 | { |
16 | CLR(nSS); |
17 | } |
18 | |
19 | |
20 | static uint8_t spi(uint8_t v) |
21 | { |
22 | // while (!(UCSR1A & 1 << UDRE1)); |
23 | UDR1 = v; |
24 | while (!(UCSR1A & 1 << RXC1)); |
25 | return UDR1; |
26 | } |
27 | |
28 | |
29 | static void spi_end(void) |
30 | { |
31 | // while (!(UCSR1A & 1 << TXC1)); |
32 | SET(nSS); |
33 | } |
34 | |
35 | |
36 | int main(void) |
37 | { |
38 | /* We start with a 1 MHz/8 clock. Disable the prescaler. */ |
39 | |
40 | CLKPR = 1 << CLKPCE; |
41 | CLKPR = 0; |
42 | |
43 | /* set up all the outputs; default port value is 0 */ |
44 | |
45 | OUT(LED); |
46 | OUT(nRST_RF); /* reset the transceiver */ |
47 | OUT(SLP_TR); |
48 | OUT(SCLK); |
49 | OUT(MOSI); |
50 | OUT(nSS); |
51 | |
52 | /* set up UART-SPI */ |
53 | |
54 | UCSR1C = 1 << UMSEL11 | 1 << UMSEL10; |
55 | /* set MSPI, MSB first, SPI data mode 0 */ |
56 | UCSR1B = 1 << RXEN1 | 1 << TXEN1; |
57 | /* enable receiver and transmitter */ |
58 | UBRR1 = 0; /* reconfirm the bit rate */ |
59 | |
60 | /* bring the transceiver out of reset */ |
61 | |
62 | /* |
63 | * AT86RF231 data sheet, 12.4.13, reset pulse with: 625 ns (min). |
64 | * We spend a lot more time getting here, so no extra wait is needed. |
65 | */ |
66 | SET(nRST_RF); |
67 | |
68 | /* |
69 | * 12.4.14: SPI access latency after reset: 625 ns |
70 | */ |
71 | _delay_us(1); |
72 | |
73 | /* switch CLKM to 8 MHz */ |
74 | |
75 | /* |
76 | * @@@ Note: Atmel advise against changing the external clock in |
77 | * mid-flight. We should therefore switch to the RC clock first, then |
78 | * crank up the external clock, and finally switch back to the external |
79 | * clock. The clock switching procedure is described in the ATmega32U2 |
80 | * data sheet in secton 8.2.2. |
81 | */ |
82 | |
83 | spi_begin(); |
84 | spi(AT86RF230_REG_WRITE | REG_TRX_CTRL_0); |
85 | spi(CLKM_CTRL_8MHz); |
86 | spi_end(); |
87 | |
88 | /* now we should be at 8 MHz */ |
89 | |
90 | SET(LED); |
91 | _delay_ms(100); |
92 | CLR(LED); |
93 | |
94 | usb_init(); |
95 | hw_init(); |
96 | |
97 | while (1) |
98 | usb_poll(); |
99 | } |
100 |