Root/tools/lib/cwtest.c

Source at commit 4244af265c438e3a120199ab75090df2fc14c92c created 9 years 5 months ago.
By Werner Almesberger, tools/lib/cwtest.c (cw_test_end): try "quick reset" on AT86RF231
1/*
2 * lib/cwtest.c - Set up AT86RF230/231 constant wave test mode
3 *
4 * Written 2010-2011 by Werner Almesberger
5 * Copyright 2010-2011 Werner Almesberger
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13
14#include <stdint.h>
15#include <stdlib.h>
16#include <stdio.h>
17#include <string.h>
18
19#include "at86rf230.h"
20#include "atrf.h"
21#include "misctxrx.h"
22
23#include "cwtest.h"
24
25
26static void enter_test_mode_230(struct atrf_dsc *dsc, uint8_t cont_tx)
27{
28    atrf_buf_write(dsc, "", 1);
29    atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC);
30    atrf_reg_write(dsc, REG_CONT_TX_1, cont_tx);
31
32    if (!atrf_test_mode(dsc)) {
33        atrf_reset_rf(dsc);
34        fprintf(stderr, "device does not support test mode\n");
35        exit(1);
36    }
37
38    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON);
39    wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 20);
40
41    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START);
42}
43
44
45static void enter_test_mode_231(struct atrf_dsc *dsc, uint8_t cont_tx)
46{
47    uint8_t buf[127];
48    uint8_t status;
49
50    switch (cont_tx) {
51    case CONT_TX_M2M:
52        fprintf(stderr,
53            "-2 MHz mode is not supported by the AT86RF231\n");
54        atrf_close(dsc);
55        exit(1);
56    case CONT_TX_M500K:
57        memset(buf, 0, sizeof(buf));
58        break;
59    case CONT_TX_P500K:
60        memset(buf, 0xff, sizeof(buf));
61        break;
62    default:
63        abort();
64    }
65
66    atrf_reg_write(dsc, REG_IRQ_MASK, IRQ_PLL_LOCK); /* 2 */
67    atrf_reg_write(dsc, REG_TRX_CTRL_1, 0); /* 3 */
68    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF); /* 4 */
69    /* deleted step 5 - we don't need to enable CLKM */
70
71    status = atrf_reg_read(dsc, REG_TRX_STATUS) & TRX_STATUS_MASK; /* 8 */
72    if (status != TRX_STATUS_TRX_OFF) {
73        fprintf(stderr, "expected status 0x%02x, got 0x%02x\n",
74            TRX_STATUS_TRX_OFF, status);
75        exit(1);
76    }
77
78    atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC); /* 9 */
79    atrf_reg_write(dsc, REG_TRX_CTRL_2, OQPSK_DATA_RATE_2000); /*10 */
80    atrf_reg_write(dsc, REG_RX_CTRL, 0xa7); /*11 */
81
82    atrf_buf_write(dsc, buf, sizeof(buf)); /*12 */
83
84    atrf_reg_write(dsc, REG_PART_NUM, 0x54); /*13 */
85    atrf_reg_write(dsc, REG_PART_NUM, 0x46); /*14 */
86    
87    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON); /*15 */
88    wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 0); /*16 */
89
90    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START); /*17 */
91}
92
93
94void cw_test_begin(struct atrf_dsc *dsc, uint8_t cont_tx)
95{
96    switch (atrf_identify(dsc)) {
97    case artf_at86rf230:
98        enter_test_mode_230(dsc, cont_tx);
99        break;
100    case artf_at86rf231:
101        enter_test_mode_231(dsc, cont_tx);
102        break;
103    default:
104        abort();
105    }
106}
107
108
109void cw_test_end(struct atrf_dsc *dsc)
110{
111    if (atrf_identify(dsc) == artf_at86rf231)
112        atrf_reg_write(dsc, REG_PART_NUM, 0);
113    
114    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF);
115
116    /*
117     * atrf_reset_rf can take a long time. I appears that at least the
118     * AT86RF231 also exits test mode if we send it to sleep for a
119     * moment.
120     */
121    switch (atrf_identify(dsc)) {
122    case artf_at86rf230:
123        atrf_reset_rf(dsc);
124        break;
125    case artf_at86rf231:
126        usleep(2); /* table 7-1: tTR12(typ) = 1 us */
127        atrf_slp_tr(dsc, 1);
128        usleep(10); /* table 7-1: tTR3(typ) doesn't really apply */
129        atrf_slp_tr(dsc, 0);
130        usleep(500); /* table 7-1: tTR2(typ) = 380 */
131        break;
132    default:
133        abort();
134    }
135}
136

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