Root/atusd/ERRATA

Source at commit 93f0f403a78b9f3451bbbb8707dbbb36007a1612 created 9 years 6 months ago.
By Werner Almesberger, New atusd errata and a few small CAM updates.
1Version 20100903:
2
3- changed C7 to 1 nF to debug a signal attenuation problem. Turned out to be
4  a bad trace. According to simulations, 22 pF should be more than enough.
5
6- added wire connecting uSD-side ground plane to ground plane at outer edge,
7  to improve CLK signal return. (Probably unnecessary, too.)
8
9- the footprint of the transistor (Q1) is reversed :-( It works after
10  converting the chip from SOT to PLCC.
11
12- not an erratum, but with experiments showing power-on reset to be
13  reliable, we can consider removing the hardware reset circuit. This will
14  also simplify the layout.
15
16Version 20100908:
17
18- SPI activity causes the PLL to unlock. Specifically, toggling nSEL does
19  this.
20

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