IEEE 802.15.4 subsystem
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Source at commit 968721c335ce5ce562484f060dc6c70d8e96fc57 created 7 years 11 months ago. By Stefan Schmidt, atusb: fw: re-factor SPI, USB and board_app code for board specifics | |
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1 | /* |
2 | * fw/board_rzusb.c - RZUSB Board-specific functions (for boot loader and application) |
3 | * |
4 | * Written 2016 by Stefan Schmidt |
5 | * Copyright 2016 Stefan Schmidt |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by |
9 | * the Free Software Foundation; either version 2 of the License, or |
10 | * (at your option) any later version. |
11 | */ |
12 | |
13 | |
14 | #include <stdbool.h> |
15 | #include <stdint.h> |
16 | |
17 | #include <avr/io.h> |
18 | #include <avr/interrupt.h> |
19 | #include <avr/boot.h> |
20 | |
21 | #define F_CPU 8000000UL |
22 | #include <util/delay.h> |
23 | |
24 | #include "usb.h" |
25 | #include "at86rf230.h" |
26 | #include "board.h" |
27 | #include "spi.h" |
28 | #include "usb/usb.h" |
29 | |
30 | static bool spi_initialized = 0; |
31 | |
32 | void set_clkm(void) |
33 | { |
34 | /* switch CLKM to 8 MHz */ |
35 | |
36 | /* |
37 | * @@@ Note: Atmel advise against changing the external clock in |
38 | * mid-flight. We should therefore switch to the RC clock first, then |
39 | * crank up the external clock, and finally switch back to the external |
40 | * clock. The clock switching procedure is described in the ATmega32U2 |
41 | * data sheet in secton 8.2.2. |
42 | */ |
43 | spi_begin(); |
44 | spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0); |
45 | spi_send(0x10); |
46 | spi_end(); |
47 | |
48 | /* TX_AUTO_CRC_ON, default disabled */ |
49 | spi_begin(); |
50 | spi_send(AT86RF230_REG_WRITE | 0x05); |
51 | spi_send(0x80); |
52 | spi_end(); |
53 | } |
54 | |
55 | void board_init(void) |
56 | { |
57 | /* Disable the watchdog timer */ |
58 | |
59 | MCUSR = 0; /* Remove override */ |
60 | WDTCSR |= 1 << WDCE; /* Enable change */ |
61 | WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling |
62 | change */ |
63 | |
64 | CLKPR = 1 << CLKPCE; |
65 | /* We start with a 16 MHz/8 clock. Put the prescaler to 2. */ |
66 | CLKPR = 1 << CLKPS0; |
67 | |
68 | get_sernum(); |
69 | } |
70 | |
71 | void spi_begin(void) |
72 | { |
73 | if (!spi_initialized) |
74 | spi_init(); |
75 | CLR(nSS); |
76 | } |
77 | |
78 | void spi_off(void) |
79 | { |
80 | spi_initialized = 0; |
81 | SPCR &= ~(1 << SPE); |
82 | } |
83 | |
84 | void spi_init(void) |
85 | { |
86 | SET(nSS); |
87 | OUT(SCLK); |
88 | OUT(MOSI); |
89 | OUT(nSS); |
90 | IN(MISO); |
91 | |
92 | SPCR = (1 << SPE) | (1 << MSTR); |
93 | SPSR = (1 << SPI2X); |
94 | |
95 | spi_initialized = 1; |
96 | } |
97 | |
98 | void usb_init(void) |
99 | { |
100 | USBCON |= 1 << FRZCLK; /* freeze the clock */ |
101 | |
102 | /* enable the PLL and wait for it to lock */ |
103 | /* TODO sheet page 50 For Atmel AT90USB128x only. Do not use with Atmel AT90USB64x. */ |
104 | /* FOR 8 XTAL Mhz only!!! */ |
105 | PLLCSR = ((1 << PLLP1) | (1 << PLLP0)); |
106 | PLLCSR |= 1 << PLLE; |
107 | while (!(PLLCSR & (1 << PLOCK))); |
108 | |
109 | UHWCON |= (1 << UVREGE); |
110 | |
111 | USBCON &= ~((1 << USBE) | (1 << OTGPADE)); /* reset the controller */ |
112 | USBCON |= ((1 << USBE) | (1 << OTGPADE)); |
113 | |
114 | USBCON &= ~(1 << FRZCLK); /* thaw the clock */ |
115 | |
116 | UDCON &= ~(1 << DETACH); /* attach the pull-up */ |
117 | UDIEN = 1 << EORSTE; /* enable device interrupts */ |
118 | // UDCON |= 1 << RSTCPU; /* reset CPU on bus reset */ |
119 | |
120 | ep_init(); |
121 | } |
122 | |
123 | void board_app_init(void) |
124 | { |
125 | /* enable timer input capture 1, trigger on rising edge */ |
126 | TCCR1B = (1 << ICES1); |
127 | TIFR1 = (1 << ICF1); |
128 | TIMSK1 = (1 << ICIE1); |
129 | } |
130 |