Root/atusb/fw/board_atusb.c

Source at commit ae1455cc7dadfaa494c792217d1e4a53efb2747e created 7 years 1 month ago.
By Stefan Schmidt, atusb-eui64: print out set address with upper case characters in hex
1/*
2 * fw/board_atusb.c - ATUSB Board-specific functions (for boot loader and application)
3 *
4 * Written 2016 by Stefan Schmidt
5 * Copyright 2016 Stefan Schmidt
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13
14#include <stdbool.h>
15#include <stdint.h>
16
17#include <avr/io.h>
18#include <avr/interrupt.h>
19#include <avr/boot.h>
20
21#define F_CPU 8000000UL
22#include <util/delay.h>
23
24#include "usb.h"
25#include "at86rf230.h"
26#include "board.h"
27#include "spi.h"
28#include "usb/usb.h"
29
30static bool spi_initialized = 0;
31
32void set_clkm(void)
33{
34    /* switch CLKM to 8 MHz */
35
36    /*
37     * @@@ Note: Atmel advise against changing the external clock in
38     * mid-flight. We should therefore switch to the RC clock first, then
39     * crank up the external clock, and finally switch back to the external
40     * clock. The clock switching procedure is described in the ATmega32U2
41     * data sheet in secton 8.2.2.
42     */
43    spi_begin();
44    spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
45    spi_send(CLKM_CTRL_8MHz);
46    spi_end();
47}
48
49void board_init(void)
50{
51    /* Disable the watchdog timer */
52
53    MCUSR = 0; /* Remove override */
54    WDTCSR |= 1 << WDCE; /* Enable change */
55    WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
56                   change */
57
58    CLKPR = 1 << CLKPCE;
59    /* We start with a 1 MHz/8 clock. Disable the prescaler. */
60    CLKPR = 0;
61
62    get_sernum();
63}
64
65void spi_begin(void)
66{
67    if (!spi_initialized)
68        spi_init();
69    CLR(nSS);
70}
71
72void spi_off(void)
73{
74    spi_initialized = 0;
75    UCSR1B = 0;
76}
77
78void spi_init(void)
79{
80    SET(nSS);
81    OUT(SCLK);
82    OUT(MOSI);
83    OUT(nSS);
84    IN(MISO);
85
86    UBRR1 = 0; /* set bit rate to zero to begin */
87    UCSR1C = 1 << UMSEL11 | 1 << UMSEL10;
88            /* set MSPI, MSB first, SPI data mode 0 */
89    UCSR1B = 1 << RXEN1 | 1 << TXEN1;
90            /* enable receiver and transmitter */
91    UBRR1 = 0; /* reconfirm the bit rate */
92
93    spi_initialized = 1;
94}
95
96void usb_init(void)
97{
98    USBCON |= 1 << FRZCLK; /* freeze the clock */
99
100    /* enable the PLL and wait for it to lock */
101    PLLCSR &= ~(1 << PLLP2 | 1 << PLLP1 | 1 << PLLP0);
102    PLLCSR |= 1 << PLLE;
103    while (!(PLLCSR & (1 << PLOCK)));
104
105    USBCON &= ~(1 << USBE); /* reset the controller */
106    USBCON |= 1 << USBE;
107
108    USBCON &= ~(1 << FRZCLK); /* thaw the clock */
109
110    UDCON &= ~(1 << DETACH); /* attach the pull-up */
111    UDIEN = 1 << EORSTE; /* enable device interrupts */
112// UDCON |= 1 << RSTCPU; /* reset CPU on bus reset */
113
114    ep_init();
115}
116
117void board_app_init(void)
118{
119    /* enable INT0, trigger on rising edge */
120    EICRA = 1 << ISC01 | 1 << ISC00;
121    EIMSK = 1 << 0;
122}
123

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