Root/tools/lib/cwtest.c

Source at commit c9e52c1978ed11ef9c404b381131b67703705fbb created 7 years 3 months ago.
By Werner Almesberger, atusb/atusb.kicad_pcb: bring back component references
1/*
2 * lib/cwtest.c - Set up AT86RF230/231 constant wave test mode
3 *
4 * Written 2010-2011, 2013 by Werner Almesberger
5 * Copyright 2010-2011, 2013 Werner Almesberger
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13
14#include <stdint.h>
15#include <stdlib.h>
16#include <stdio.h>
17#include <string.h>
18
19#include "at86rf230.h"
20#include "atrf.h"
21#include "misctxrx.h"
22
23#include "cwtest.h"
24
25
26static int last_cont_tx; /* @@@ hack for resuming on the 230 */
27
28
29int cw_test_needs_reset(struct atrf_dsc *dsc)
30{
31    if (atrf_usb_handle(dsc))
32        return 1;
33    if (atrf_identify(dsc) == atrf_at86rf230)
34        return 1;
35    return 0;
36}
37
38
39static void enter_test_mode_230(struct atrf_dsc *dsc, uint8_t cont_tx)
40{
41    atrf_buf_write(dsc, "", 1);
42    atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC);
43    atrf_reg_write(dsc, REG_CONT_TX_1, cont_tx);
44
45    if (!atrf_test_mode(dsc)) {
46        atrf_reset_rf(dsc);
47        fprintf(stderr, "device does not support test mode\n");
48        exit(1);
49    }
50
51    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON);
52    wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 0);
53
54    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START);
55}
56
57
58static void prepare_test_mode_231(struct atrf_dsc *dsc, uint8_t cont_tx)
59{
60    uint8_t buf[127];
61    uint8_t status;
62
63    switch (cont_tx) {
64    case CONT_TX_M2M:
65        fprintf(stderr,
66            "-2 MHz mode is not supported by the AT86RF231\n");
67        atrf_close(dsc);
68        exit(1);
69    case CONT_TX_M500K:
70        memset(buf, 0, sizeof(buf));
71        break;
72    case CONT_TX_P500K:
73        memset(buf, 0xff, sizeof(buf));
74        break;
75    default:
76        abort();
77    }
78
79    atrf_reg_write(dsc, REG_IRQ_MASK, IRQ_PLL_LOCK); /* 2 */
80    atrf_reg_write(dsc, REG_TRX_CTRL_1, 0); /* 3 */
81    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF); /* 4 */
82    /* deleted step 5 - we don't need to enable CLKM */
83
84    status = atrf_reg_read(dsc, REG_TRX_STATUS) & TRX_STATUS_MASK; /* 8 */
85    if (status != TRX_STATUS_TRX_OFF) {
86        fprintf(stderr, "expected status 0x%02x, got 0x%02x\n",
87            TRX_STATUS_TRX_OFF, status);
88        exit(1);
89    }
90
91    atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC); /* 9 */
92    atrf_reg_write(dsc, REG_TRX_CTRL_2, OQPSK_DATA_RATE_2000); /*10 */
93    atrf_reg_write(dsc, REG_RX_CTRL, 0xa7); /*11 */
94
95    atrf_buf_write(dsc, buf, sizeof(buf)); /*12 */
96}
97
98
99static void start_test_mode_231(struct atrf_dsc *dsc)
100{
101    atrf_reg_write(dsc, REG_PART_NUM, 0x54); /*13 */
102    atrf_reg_write(dsc, REG_PART_NUM, 0x46); /*14 */
103
104    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON); /*15 */
105    wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 0); /*16 */
106
107    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START); /*17 */
108}
109
110
111void cw_test_begin(struct atrf_dsc *dsc, uint8_t cont_tx)
112{
113    switch (atrf_identify(dsc)) {
114    case atrf_at86rf230:
115        enter_test_mode_230(dsc, cont_tx);
116        last_cont_tx = cont_tx;
117        break;
118    case atrf_at86rf231:
119        prepare_test_mode_231(dsc, cont_tx);
120        start_test_mode_231(dsc);
121        break;
122    default:
123        abort();
124    }
125}
126
127
128void cw_test_resume(struct atrf_dsc *dsc)
129{
130    switch (atrf_identify(dsc)) {
131    case atrf_at86rf230:
132        enter_test_mode_230(dsc, last_cont_tx);
133        break;
134    case atrf_at86rf231:
135        start_test_mode_231(dsc);
136        break;
137    default:
138        abort();
139    }
140}
141
142
143void cw_test_end(struct atrf_dsc *dsc)
144{
145    if (atrf_identify(dsc) == atrf_at86rf231)
146        atrf_reg_write(dsc, REG_PART_NUM, 0);
147    
148    atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF);
149
150    /*
151     * atrf_reset_rf can take a long time. I appears that at least the
152     * AT86RF231 also exits test mode if we send it to sleep for a
153     * moment.
154     */
155    if (cw_test_needs_reset(dsc))
156        atrf_reset_rf(dsc);
157    else {
158        usleep(2); /* table 7-1: tTR12(typ) = 1 us */
159        atrf_slp_tr(dsc, 1, 0);
160        usleep(10); /* table 7-1: tTR3(typ) doesn't really apply */
161        atrf_slp_tr(dsc, 0, 0);
162        usleep(500); /* table 7-1: tTR2(typ) = 380 */
163    }
164}
165

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