IEEE 802.15.4 subsystem
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Source at commit ea23c905d32bfd2478915021476f9ede2ee014b8 created 6 years 6 months ago. By Josef Filzmaier, atusb/fw: Introduction of a new board named HULUSB | |
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1 | /* |
2 | * fw/board_hulusb.c - Busware HUL Board-specific functions (for boot loader and application) |
3 | * |
4 | * Written 2017 by Filzmaier Josef |
5 | * Based on fw/board_rzusb written and Copyright 2016 Stefan Schmidt |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by |
9 | * the Free Software Foundation; either version 2 of the License, or |
10 | * (at your option) any later version. |
11 | */ |
12 | |
13 | |
14 | #include <stdbool.h> |
15 | #include <stdint.h> |
16 | |
17 | #include <avr/io.h> |
18 | #include <avr/interrupt.h> |
19 | #include <avr/boot.h> |
20 | |
21 | #define F_CPU 8000000UL |
22 | #include <util/delay.h> |
23 | |
24 | #include "usb.h" |
25 | #include "at86rf230.h" |
26 | #include "board.h" |
27 | #include "spi.h" |
28 | #include "usb/usb.h" |
29 | |
30 | static bool spi_initialized = 0; |
31 | |
32 | void reset_rf(void) |
33 | { |
34 | /* set up all the outputs; default port value is 0 */ |
35 | |
36 | DDRB = 0; |
37 | DDRC = 0; |
38 | DDRD = 0; |
39 | PORTB = 0; |
40 | PORTC = 0; |
41 | PORTD = 0; |
42 | |
43 | OUT(LED_RED); |
44 | OUT(LED_GREEN); |
45 | SET(LED_RED); /* Leds are active low on HULUSB board */ |
46 | CLR(LED_GREEN); /* Green Led indicates the dongle is running */ |
47 | OUT(nRST_RF); /* this also resets the transceiver */ |
48 | OUT(SLP_TR); |
49 | |
50 | spi_init(); |
51 | |
52 | /* AT86RF212 data sheet, Appendix B, p166 Power-On Reset procedure */ |
53 | /*-----------------------------------------------------------------*/ |
54 | CLR(SLP_TR); |
55 | SET(nRST_RF); |
56 | SET(nSS); |
57 | _delay_us(400); |
58 | |
59 | CLR(nRST_RF); |
60 | _delay_us(2); |
61 | SET(nRST_RF); |
62 | |
63 | /* 5.1.4.5: Wait t10: 625 ns (min) */ |
64 | |
65 | _delay_us(2); |
66 | |
67 | reg_write(REG_TRX_CTRL_0, 0x19); |
68 | |
69 | change_state(TRX_CMD_FORCE_TRX_OFF); |
70 | /*-----------------------------------------------------------------*/ |
71 | |
72 | /* we must restore TRX_CTRL_0 after each reset (7.7.4) */ |
73 | |
74 | set_clkm(); |
75 | } |
76 | |
77 | void led_red(bool on) { |
78 | if (on) |
79 | CLR(LED_RED); |
80 | else |
81 | SET(LED_RED); |
82 | } |
83 | |
84 | void led_green(bool on) { |
85 | if (on) |
86 | CLR(LED_GREEN); |
87 | else |
88 | SET(LED_GREEN); |
89 | } |
90 | |
91 | void led(bool on) |
92 | { |
93 | led_red(on); |
94 | } |
95 | |
96 | void set_clkm(void) |
97 | { |
98 | /* CLKM is not connected on BUSWARE HUL and therefore it is running in |
99 | * async mode. */ |
100 | reg_write(REG_TRX_CTRL_0, 0x00); |
101 | |
102 | /* TX_AUTO_CRC_ON, default disabled */ |
103 | subreg_write(SR_TX_AUTO_CRC_ON, 1); |
104 | } |
105 | |
106 | void board_init(void) |
107 | { |
108 | /* Disable the watchdog timer */ |
109 | |
110 | MCUSR = 0; /* Remove override */ |
111 | WDTCSR |= 1 << WDCE; /* Enable change */ |
112 | WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling |
113 | change */ |
114 | |
115 | CLKPR = 1 << CLKPCE; |
116 | /* We start with a 16 MHz/8 clock. Put the prescaler to 2. */ |
117 | CLKPR = 1 << CLKPS0; |
118 | |
119 | get_sernum(); |
120 | } |
121 | |
122 | void spi_begin(void) |
123 | { |
124 | if (!spi_initialized) |
125 | spi_init(); |
126 | CLR(nSS); |
127 | } |
128 | |
129 | void spi_off(void) |
130 | { |
131 | spi_initialized = 0; |
132 | SPCR &= ~(1 << SPE); |
133 | } |
134 | |
135 | void spi_init(void) |
136 | { |
137 | SET(nSS); |
138 | OUT(SCLK); |
139 | OUT(MOSI); |
140 | OUT(nSS); |
141 | IN(MISO); |
142 | |
143 | SPCR = (1 << SPE) | (1 << MSTR); |
144 | SPSR = (1 << SPI2X); |
145 | |
146 | spi_initialized = 1; |
147 | } |
148 | |
149 | void usb_init(void) |
150 | { |
151 | USBCON |= 1 << FRZCLK; /* freeze the clock */ |
152 | |
153 | /* enable the PLL and wait for it to lock */ |
154 | /* TODO sheet page 50 For Atmel AT90USB128x only. Do not use with Atmel AT90USB64x. */ |
155 | /* FOR 8 XTAL Mhz only!!! */ |
156 | PLLCSR = ((1 << PLLP1) | (1 << PLLP0)); |
157 | PLLCSR |= 1 << PLLE; |
158 | while (!(PLLCSR & (1 << PLOCK))); |
159 | |
160 | UHWCON |= (1 << UVREGE); |
161 | |
162 | USBCON &= ~((1 << USBE) | (1 << OTGPADE)); /* reset the controller */ |
163 | USBCON |= ((1 << USBE) | (1 << OTGPADE)); |
164 | |
165 | USBCON &= ~(1 << FRZCLK); /* thaw the clock */ |
166 | |
167 | UDCON &= ~(1 << DETACH); /* attach the pull-up */ |
168 | UDIEN = 1 << EORSTE; /* enable device interrupts */ |
169 | // UDCON |= 1 << RSTCPU; /* reset CPU on bus reset */ |
170 | |
171 | ep_init(); |
172 | } |
173 | |
174 | void board_app_init(void) |
175 | { |
176 | /* enable INT0, trigger on rising edge */ |
177 | EICRA = 1 << ISC01 | 1 << ISC00; |
178 | EIMSK = 1 << INT0; |
179 | } |
180 |