IEEE 802.15.4 subsystem
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IEEE 802.15.4 subsystem Git Source Tree
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Source at commit f87bdce41f2b24efa3de561ecaa1ff2fcbe78906 created 13 years 17 days ago. By Werner Almesberger, atusb/fw/Makefile: added auxiliary Flash programming target (for development) | |
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1 | Board characteristics: |
2 | |
3 | - stacking: 2 layers, solder mask on front and back, silk screen on front |
4 | - board material: FR4, thickness 0.8 mm, 1 oz copper |
5 | - surface finish: ENIG (preferred) or tin |
6 | - via holes: diameter is nominally 10 mil, but any size <= 15 mil can be used |
7 | - mechanical tolerances: <= +/- 0.1 mm on all sides |
8 | |
9 | Layer stacking, from top to bottom: |
10 | |
11 | atben-SilkS_Front.gto Front silk screen |
12 | atben-Mask_Front.gts Front solder mask |
13 | atben-Front.gtl Front copper |
14 | atben-Back.gbl Back copper |
15 | atben-Mask_Back.gbs Back solder mask |
16 | |
17 | Other design files: |
18 | |
19 | atben-PCB_Edges.gbr Board edges, for routing (Gerber) |
20 | atben.dxf idem (AutoCAD DXF) |
21 | atben.drl Excellon drill file |
22 | |
23 | Interpretation of files: |
24 | |
25 | - do not print PCB edges on front/back copper |
26 | - do not print component values on silk screen |
27 | - the center (!) of the board edge line marks the true board edge, e.g., |
28 | |
29 | Edge line (5 mil) |
30 | ======= |
31 | ------- - - - - - ---------- |
32 | | | |
33 | PCB outside | | PCB inside |
34 | | | |
35 | ------- - - - - - ---------- |
36 | | |
37 | Volume removed when cutting |
38 | (width depends on tool used) |
39 |