IEEE 802.15.4 subsystem
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IEEE 802.15.4 subsystem Git Source Tree
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| 1 | Board characteristics: |
| 2 | |
| 3 | - stacking: 2 layers, solder mask on front and back, silk screen on front |
| 4 | - board material: FR4, thickness 0.8 mm (1/32"), 1 oz copper |
| 5 | - surface finish: ENIG recommended |
| 6 | - via holes: diameter is nominally 10 mil, but any size <= 15 mil can be used |
| 7 | - ground via of the antenna: hole diameter is nominally 8 mil, but any size |
| 8 | <= 15 mil can be used |
| 9 | - mechanical tolerances: <= +/- 0.1 mm on all sides |
| 10 | |
| 11 | |
| 12 | Layer stacking, from top to bottom: |
| 13 | |
| 14 | atben-SilkS_Front.gto Front silk screen |
| 15 | atben-Mask_Front.gts Front solder mask |
| 16 | atben-Front.gtl Front copper |
| 17 | atben-Back.gbl Back copper |
| 18 | atben-Mask_Back.gbs Back solder mask |
| 19 | |
| 20 | |
| 21 | Other design files: |
| 22 | |
| 23 | atben-front.png Illustration of the PCB's front side |
| 24 | atben-back.png idem, for the back side |
| 25 | atben-PCB_Edges.gbr Board edges, for routing (Gerber) |
| 26 | atben.dxf idem (AutoCAD DXF) |
| 27 | atben.drl Excellon drill file |
| 28 | atben-SoldP_Front.gtp Front solder paste, for stencil |
| 29 | |
| 30 | |
| 31 | Interpretation of files: |
| 32 | |
| 33 | - for all coordinates, the origin is the lower left corner of the board |
| 34 | - the center (!) of the board edge line marks the true board edge, e.g., |
| 35 | |
| 36 | Edge line (5 mil) |
| 37 | ======= |
| 38 | ------- - - - - - ---------- |
| 39 | | | |
| 40 | PCB outside | | PCB inside |
| 41 | | | |
| 42 | ------- - - - - - ---------- |
| 43 | | |
| 44 | Volume removed when cutting |
| 45 | (width depends on tool used) |
| 46 |
