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1 | /* |
2 | * fw/board_atusb.c - ATUSB Board-specific functions (for boot loader and application) |
3 | * |
4 | * Written 2016 by Stefan Schmidt |
5 | * Copyright 2016 Stefan Schmidt |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by |
9 | * the Free Software Foundation; either version 2 of the License, or |
10 | * (at your option) any later version. |
11 | */ |
12 | |
13 | |
14 | #include <stdbool.h> |
15 | #include <stdint.h> |
16 | |
17 | #include <avr/io.h> |
18 | #include <avr/interrupt.h> |
19 | #include <avr/boot.h> |
20 | |
21 | #define F_CPU 8000000UL |
22 | #include <util/delay.h> |
23 | |
24 | #include "usb.h" |
25 | #include "at86rf230.h" |
26 | #include "board.h" |
27 | #include "spi.h" |
28 | #include "usb/usb.h" |
29 | |
30 | static bool spi_initialized = 0; |
31 | |
32 | void reset_rf(void) |
33 | { |
34 | /* set up all the outputs; default port value is 0 */ |
35 | |
36 | DDRB = 0; |
37 | DDRC = 0; |
38 | DDRD = 0; |
39 | PORTB = 0; |
40 | PORTC = 0; |
41 | PORTD = 0; |
42 | |
43 | OUT(LED); |
44 | OUT(nRST_RF); /* this also resets the transceiver */ |
45 | OUT(SLP_TR); |
46 | |
47 | spi_init(); |
48 | |
49 | /* AT86RF231 data sheet, 12.4.13, reset pulse width: 625 ns (min) */ |
50 | |
51 | CLR(nRST_RF); |
52 | _delay_us(2); |
53 | SET(nRST_RF); |
54 | |
55 | /* 12.4.14: SPI access latency after reset: 625 ns (min) */ |
56 | |
57 | _delay_us(2); |
58 | |
59 | /* we must restore TRX_CTRL_0 after each reset (9.6.4) */ |
60 | |
61 | set_clkm(); |
62 | } |
63 | |
64 | void led(bool on) |
65 | { |
66 | if (on) |
67 | SET(LED); |
68 | else |
69 | CLR(LED); |
70 | } |
71 | |
72 | void set_clkm(void) |
73 | { |
74 | /* switch CLKM to 8 MHz */ |
75 | |
76 | /* |
77 | * @@@ Note: Atmel advise against changing the external clock in |
78 | * mid-flight. We should therefore switch to the RC clock first, then |
79 | * crank up the external clock, and finally switch back to the external |
80 | * clock. The clock switching procedure is described in the ATmega32U2 |
81 | * data sheet in secton 8.2.2. |
82 | */ |
83 | spi_begin(); |
84 | spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0); |
85 | spi_send(CLKM_CTRL_8MHz); |
86 | spi_end(); |
87 | } |
88 | |
89 | void board_init(void) |
90 | { |
91 | /* Disable the watchdog timer */ |
92 | |
93 | MCUSR = 0; /* Remove override */ |
94 | WDTCSR |= 1 << WDCE; /* Enable change */ |
95 | WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling |
96 | change */ |
97 | |
98 | CLKPR = 1 << CLKPCE; |
99 | /* We start with a 1 MHz/8 clock. Disable the prescaler. */ |
100 | CLKPR = 0; |
101 | |
102 | get_sernum(); |
103 | } |
104 | |
105 | void spi_begin(void) |
106 | { |
107 | if (!spi_initialized) |
108 | spi_init(); |
109 | CLR(nSS); |
110 | } |
111 | |
112 | void spi_off(void) |
113 | { |
114 | spi_initialized = 0; |
115 | UCSR1B = 0; |
116 | } |
117 | |
118 | void spi_init(void) |
119 | { |
120 | SET(nSS); |
121 | OUT(SCLK); |
122 | OUT(MOSI); |
123 | OUT(nSS); |
124 | IN(MISO); |
125 | |
126 | UBRR1 = 0; /* set bit rate to zero to begin */ |
127 | UCSR1C = 1 << UMSEL11 | 1 << UMSEL10; |
128 | /* set MSPI, MSB first, SPI data mode 0 */ |
129 | UCSR1B = 1 << RXEN1 | 1 << TXEN1; |
130 | /* enable receiver and transmitter */ |
131 | UBRR1 = 0; /* reconfirm the bit rate */ |
132 | |
133 | spi_initialized = 1; |
134 | } |
135 | |
136 | void usb_init(void) |
137 | { |
138 | USBCON |= 1 << FRZCLK; /* freeze the clock */ |
139 | |
140 | /* enable the PLL and wait for it to lock */ |
141 | PLLCSR &= ~(1 << PLLP2 | 1 << PLLP1 | 1 << PLLP0); |
142 | PLLCSR |= 1 << PLLE; |
143 | while (!(PLLCSR & (1 << PLOCK))); |
144 | |
145 | USBCON &= ~(1 << USBE); /* reset the controller */ |
146 | USBCON |= 1 << USBE; |
147 | |
148 | USBCON &= ~(1 << FRZCLK); /* thaw the clock */ |
149 | |
150 | UDCON &= ~(1 << DETACH); /* attach the pull-up */ |
151 | UDIEN = 1 << EORSTE; /* enable device interrupts */ |
152 | // UDCON |= 1 << RSTCPU; /* reset CPU on bus reset */ |
153 | |
154 | ep_init(); |
155 | } |
156 | |
157 | void board_app_init(void) |
158 | { |
159 | /* enable INT0, trigger on rising edge */ |
160 | EICRA = 1 << ISC01 | 1 << ISC00; |
161 | EIMSK = 1 << 0; |
162 | } |
163 |