iris

iris Commit Details

Date:	2010-05-15 18:42:17 (13 years 7 months ago)
Author:	Bas Wijnen
Commit:	6bf41032d80d1c11ca1414f4b8a4d26547c7ee10
Message:	add partial nand and sd/mmc drivers
Files:	Makefile (2 diffs) devices.hhp (11 diffs) init.config (3 diffs) mips/nanonote/Makefile.arch (1 diff) mips/nanonote/board.ccp (1 diff) mips/nanonote/jz4740.hhp (2 diffs) source/alarm.ccp (2 diffs) source/crt0.ccp (1 diff) source/gui.ccp (4 diffs) source/init.ccp (1 diff) source/nand.ccp (1 diff) source/nanonote-gpio.ccp (6 diffs) source/sd+mmc.ccp (1 diff)

Change Details

Makefile
23	23	LD = $(CROSS)ld
24	24	OBJCOPY = $(CROSS)objcopy
25	25
26		headers = kernel.hh iris.hh ui.hh $(arch_headers)
	26	headers = kernel.hh iris.hh devices.hh ui.hh $(arch_headers)
27	27	iris_sources = panic.cc data.cc alloc.cc memory.cc invoke.cc schedule.cc $(arch_iris_sources)
28	28	BUILT_SOURCES = $(iris_sources) $(boot_sources)
29	29
...	...
59	59
60	60	debug:
61	61	stty -F $(SERIAL) raw 9600
62		cat $(SERIAL)
	62	while : ; do cat $(SERIAL) ; done
63	63
64	64	.PHONY: clean
65		.PRECIOUS: iris.hh kernel.hh ui.hh boot-programs/crt0.o
	65	.PRECIOUS: $(headers) boot-programs/crt0.o source/crt0.o

devices.hhp
24	24	namespace Iris:
25	25	// Caplist interface.
26	26	template <typename _T> //
27		struct Caplist : public Iris::Caps:
28		Caplist (Iris::Caps c = Iris::Cap ()) : Iris::Caps (c):
29		Caplist <_T> create (unsigned size, Iris::Memory mem = Iris::my_memory):
	27	struct Caplist : public Caps:
	28	Caplist (Caps c = Cap ()) : Caps (c):
	29	Caplist <_T> create (unsigned size, Memory mem = my_memory):
30	30	return Caplist <_T> (mem.create_caps (size))
31	31	void set (unsigned idx, _T value):
32		return Iris::Caps::set (idx, value)
	32	return Caps::set (idx, value)
33	33	_T get (unsigned idx):
34		return _T (Iris::Caps::get (idx))
	34	return _T (Caps::get (idx))
35	35
36	36	/// A block of data with a size and content. Any character can be stored in it (including '\0').
37		struct String : public Iris::Cap:
38		String (Iris::Cap c = Iris::Cap ()) : Iris::Cap (c):
	37	struct String : public Cap:
	38	String (Cap c = Cap ()) : Cap (c):
39	39	enum request:
40	40	GET_SIZE = 0x2001
41	41	GET_CHARS
42	42	GET_PAGE
43	43	ID
44	44	/// Get the size of the string.
45		Iris::Num get_size ():
	45	Num get_size ():
46	46	return call (CAP_MASTER_DIRECT \| GET_SIZE)
47	47	/// Get exactly 16 characters. The index must be word-aligned.
48		char *get_chars (Iris::Num idx, char buffer[16]):
	48	char *get_chars (Num idx, char buffer[16]):
49	49	call (CAP_MASTER_DIRECT \| GET_CHARS, idx)
50	50	unsigned b = (unsigned )buffer
51		b[0] = Iris::recv.data[0].l
52		b[1] = Iris::recv.data[0].h
53		b[2] = Iris::recv.data[1].l
54		b[3] = Iris::recv.data[1].h
	51	b[0] = recv.data[0].l
	52	b[1] = recv.data[0].h
	53	b[2] = recv.data[1].l
	54	b[3] = recv.data[1].h
55	55	return buffer
56	56	/// Helper function for get_page.
57		static Iris::Page _create_paying_page ():
58		Iris::Page ret = Iris::my_memory.create_page ()
59		ret.set_flags (Iris::Page::PAYING, Iris::Page::PAYING)
	57	static Page _create_paying_page ():
	58	Page ret = my_memory.create_page ()
	59	ret.set_flags (Page::PAYING, Page::PAYING)
60	60	return ret
61	61	/// Get a page from the string. This need not be implemented for strings smaller than PAGE_SIZE. The index must be page-aligned.
62		Cap get_page (Iris::Num idx, Iris::Page ret = _create_paying_page ()):
	62	Cap get_page (Num idx, Page ret = _create_paying_page ()):
63	63	ocall (ret, CAP_MASTER_DIRECT \| GET_PAGE, idx)
64	64	return ret
65	65
66	66	/// A writable String.
67	67	struct WString : public String:
68		WString (Iris::Cap c = Iris::Cap ()) : String (c):
	68	WString (Cap c = Cap ()) : String (c):
69	69	enum request:
70	70	TRUNCATE = String::ID
71	71	SET_CHARS
72	72	SET_PAGE
73	73	ID
74	74	/// Set the size of the string. Strings may have a limit to this setting.
75		void truncate (Iris::Num size):
	75	void truncate (Num size):
76	76	call (CAP_MASTER_DIRECT \| TRUNCATE, size)
77	77	/// Set exactly 4 characters. The index must be word-aligned.
78		void set_chars (Iris::Num idx, char buffer[4]):
79		call (Iris::Num (CAP_MASTER_DIRECT \| SET_CHARS, (unsigned )buffer), idx)
	78	void set_chars (Num idx, char buffer[4]):
	79	call (Num (CAP_MASTER_DIRECT \| SET_CHARS, (unsigned )buffer), idx)
80	80	/// Overwrite a page from the string. This need not be implemented for strings smaller than PAGE_SIZE. The index must be page-aligned. The caller may lose the frame in the transaction.
81		void set_page (Iris::Num idx, Iris::Page page):
	81	void set_page (Num idx, Page page):
82	82	ocall (page, CAP_MASTER_DIRECT \| SET_PAGE, idx)
83	83
84	84	// Every process which wants to be switchable through a terminal must implement this interface.
85		struct Device : public Iris::Cap:
86		Device (Iris::Cap c = Iris::Cap ()) : Iris::Cap (c):
	85	struct Device : public Cap:
	86	Device (Cap c = Cap ()) : Cap (c):
87	87	enum request:
88	88	RESET = WString::ID
89	89	ID
...	...
91	91	void reset ():
92	92	call (CAP_MASTER_DIRECT \| RESET)
93	93
94		struct Elfrun : public Iris::Cap:
95		Elfrun (Iris::Cap c = Iris::Cap ()) : Iris::Cap (c):
	94	struct Event : public Device:
	95	Event (Cap c = Cap ()) : Device (c):
96	96	enum request:
97		RUN_STRING = Device::ID
	97	SET_CB = Device::ID
	98	ID
	99	// Set the event callback. Pending event emit to the new callback immediately.
	100	void set_cb (Cap cb):
	101	ocall (cb, CAP_MASTER_DIRECT \| SET_CB)
	102
	103	struct Elfrun : public Cap:
	104	Elfrun (Cap c = Cap ()) : Cap (c):
	105	enum request:
	106	RUN_STRING = Event::ID
98	107	RUN_CAPS
99	108	ID
100	109	enum arg_pos:
101	110	PARENT_MEMORY
102	111	DATA
103	112	PARENT
104		Iris::Caps run_string (Memory parent_memory, String data, Cap parent, unsigned num_slots = 8, unsigned num_caps = 32):
105		Iris::Caps caps = Iris::my_memory.create_caps (3)
	113	Caps run_string (Memory parent_memory, String data, Cap parent, unsigned num_slots = 8, unsigned num_caps = 32):
	114	Caps caps = my_memory.create_caps (3)
106	115	caps.set (PARENT_MEMORY, parent_memory)
107	116	caps.set (DATA, data)
108	117	caps.set (PARENT, parent)
109		iocall (caps.copy (), CAP_MASTER_DIRECT \| RUN_STRING, Iris::Num (num_slots, num_caps))
110		Iris::Caps ret = Iris::get_arg ()
111		Iris::my_memory.destroy (caps)
112		Iris::free_cap (caps)
	118	iocall (caps.copy (), CAP_MASTER_DIRECT \| RUN_STRING, Num (num_slots, num_caps))
	119	Caps ret = get_arg ()
	120	my_memory.destroy (caps)
	121	free_cap (caps)
113	122	return ret
114		Iris::Caps run_caps (Memory parent_memory, Caps data, Cap parent, unsigned pages, unsigned num_slots = 8, unsigned num_caps = 32):
115		Iris::Caps caps = Iris::my_memory.create_caps (3)
	123	Caps run_caps (Memory parent_memory, Caps data, Cap parent, unsigned pages, unsigned num_slots = 8, unsigned num_caps = 32):
	124	Caps caps = my_memory.create_caps (3)
116	125	caps.set (PARENT_MEMORY, parent_memory)
117	126	caps.set (DATA, data)
118	127	caps.set (PARENT, parent)
119		iocall (caps.copy (), Iris::Num (CAP_MASTER_DIRECT \| RUN_CAPS, pages), Iris::Num (num_slots, num_caps))
120		Iris::Caps ret = Iris::get_arg ()
121		Iris::my_memory.destroy (caps)
122		Iris::free_cap (caps)
	128	iocall (caps.copy (), Num (CAP_MASTER_DIRECT \| RUN_CAPS, pages), Num (num_slots, num_caps))
	129	Caps ret = get_arg ()
	130	my_memory.destroy (caps)
	131	free_cap (caps)
123	132	return ret
124	133
125	134	// Interface for talking to the parent process.
126		struct Parent : public Iris::Cap:
127		Parent (Iris::Cap c = Iris::Cap ()) : Iris::Cap (c):
	135	struct Parent : public Cap:
	136	Parent (Cap c = Cap ()) : Cap (c):
128	137	enum request:
129	138	GET_CAPABILITY = Elfrun::ID
130	139	PROVIDE_CAPABILITY
...	...
136	145	ID
137	146	// Get a handle.
138	147	template <typename _T> _T get_capability (unsigned num = 0):
139		icall (Iris::Num (CAP_MASTER_DIRECT \| GET_CAPABILITY, num), _T::ID)
140		return Iris::get_arg ()
	148	icall (Num (CAP_MASTER_DIRECT \| GET_CAPABILITY, num), _T::ID)
	149	return get_arg ()
141	150	// Provide a device handle.
142	151	template <typename _T> void provide_capability (Cap cap, unsigned num = 0):
143		ocall (cap, Iris::Num (CAP_MASTER_DIRECT \| PROVIDE_CAPABILITY, num), _T::ID)
	152	ocall (cap, Num (CAP_MASTER_DIRECT \| PROVIDE_CAPABILITY, num), _T::ID)
144	153	// Wait until a device is used by the caller again.
145	154	template <typename _T> void wait (unsigned num = 0):
146		call (Iris::Num (CAP_MASTER_DIRECT \| WAIT, num), _T::ID)
	155	call (Num (CAP_MASTER_DIRECT \| WAIT, num), _T::ID)
147	156	// Get memory paid for by another thread, which cannot be inspected or changed by that thread. The memory can be inspected and changed by the user (owning both threads). The call will fail when the threads are not owned by the same user.
148		Iris::Memory get_memory (Iris::Cap target):
	157	Memory get_memory (Cap target):
149	158	iocall (target, CAP_MASTER_DIRECT \| GET_MEMORY)
150		return Iris::get_arg ()
	159	return get_arg ()
151	160	// Get a handle that another thread can use to call get_memory on. The actual limit on the created memory is floor(limit, thread address space limit).
152		Iris::Cap provide_memory (unsigned limit):
	161	Cap provide_memory (unsigned limit):
153	162	icall (CAP_MASTER_DIRECT \| PROVIDE_MEMORY, limit)
154		return Iris::get_arg ()
	163	return get_arg ()
155	164	// Signal the parent that the initialisation phase is over.
156		void init_done (Iris::Num stage = 0):
	165	void init_done (Num stage = 0):
157	166	call (CAP_MASTER_DIRECT \| INIT_DONE, stage)
158	167	// Exit the program. The parent does not reply, but kills the process.
159		void exit (Iris::Num code):
	168	void exit (Num code):
160	169	call (CAP_MASTER_DIRECT \| EXIT, code)
161	170
162	171	// Keyboard interface.
163		struct Keyboard : public Device:
164		Keyboard (Iris::Cap c = Iris::Cap ()) : Iris::Device (c):
	172	struct Keyboard : public Event:
	173	Keyboard (Cap c = Cap ()) : Event (c):
165	174	enum request:
166		SET_CB = Parent::ID
167		GET_NUM_KEYS
	175	GET_NUM_KEYS = Parent::ID
168	176	GET_KEYS
169	177	ID
170	178	// At event: the callback is called with a keycode. One bit defines if it's a press or release event.
171	179	enum constant:
172	180	RELEASE = 1 << 31
173		// Set the event callback. Currently pressed keys emit a key press event to the new callback immediately.
174		void set_cb (Iris::Cap cb):
175		ocall (cb, CAP_MASTER_DIRECT \| SET_CB)
176	181	// Get the number of keys on the keyboard.
177	182	unsigned get_num_keys ():
178	183	return call (CAP_MASTER_DIRECT \| GET_NUM_KEYS).l
...	...
182	187
183	188	// Buzzer interface.
184	189	struct Buzzer : public Device:
185		Buzzer (Iris::Cap c = Iris::Cap ()) : Iris::Device (c):
	190	Buzzer (Cap c = Cap ()) : Device (c):
186	191	enum request:
187	192	BEEP = Keyboard::ID
188	193	STOP
189	194	ID
190	195	// Emit a beep of specified frequency, time and volume. Volume may not be supported. If an other beep is in progress, it is aborted.
191		void beep (unsigned freq, unsigned ms, unsigned volume, Iris::Cap cb = Iris::Cap ()):
192		ocall (cb, Iris::Num (CAP_MASTER_DIRECT \| BEEP, volume), Iris::Num (freq, ms))
	196	void beep (unsigned freq, unsigned ms, unsigned volume, Cap cb = Cap ()):
	197	ocall (cb, Num (CAP_MASTER_DIRECT \| BEEP, volume), Num (freq, ms))
193	198	// Abort current beep, if any.
194	199	void stop ():
195	200	call (CAP_MASTER_DIRECT \| STOP)
196	201
197	202	// Display interface.
198	203	struct Display : public Device:
199		Display (Iris::Cap c = Iris::Cap ()) : Iris::Device (c):
	204	Display (Cap c = Cap ()) : Device (c):
200	205	enum request:
201	206	SET_EOF_CB = Buzzer::ID
202	207	MAP_FB
...	...
205	210	ID
206	211	// Register an end-of-frame callback.
207	212	// At end of frame, the callback is invoked and forgotten. It must be reregistered to keep a stream of events.
208		void set_eof_cb (Iris::Cap cb):
	213	void set_eof_cb (Cap cb):
209	214	ocall (cb, CAP_MASTER_DIRECT \| SET_EOF_CB)
210	215	// Map the framebuffer into memory.
211		Iris::Caps map_fb (unsigned address, Iris::Memory mem = Iris::my_memory, bool use = true):
212		iocall (mem, Iris::Num (CAP_MASTER_DIRECT \| MAP_FB, use ? 1 : 0), address)
213		return Iris::get_arg ()
214		void unmap_fb (Iris::Caps caps):
	216	Caps map_fb (unsigned address, Memory mem = my_memory, bool use = true):
	217	iocall (mem, Num (CAP_MASTER_DIRECT \| MAP_FB, use ? 1 : 0), address)
	218	return get_arg ()
	219	void unmap_fb (Caps caps):
215	220	ocall (caps, CAP_MASTER_DIRECT \| UNMAP_FB)
216	221	// Get information about the display.
217	222	void get_info ():
218	223	// TODO: Interface is to be designed.
219		Iris::panic (0, "using undefined interface Display::get_info ()")
	224	panic (0, "using undefined interface Display::get_info ()")
220	225
221	226	// Numerical setting, such as a display backlight.
222		struct Setting : public Iris::Device:
223		Setting (Iris::Cap c = Iris::Cap ()) : Iris::Device (c):
	227	struct Setting : public Device:
	228	Setting (Cap c = Cap ()) : Device (c):
224	229	enum request:
225	230	SET = Display::ID
226	231	GET_RANGE
...	...
238	243	// Seekable is not a class, it is identical to [W]String.
239	244
240	245	// Directory interface.
241		struct Directory : public Iris::Cap:
242		Directory (Iris::Cap c = Iris::Cap ()) : Iris::Cap (c):
	246	struct Directory : public Cap:
	247	Directory (Cap c = Cap ()) : Cap (c):
243	248	enum request:
244	249	GET_SIZE = Setting::ID
245	250	GET_NAME
...	...
249	254	UNLOCK_RO
250	255	ID
251	256	// Get the number of entries in this directory.
252		Iris::Num get_size ():
	257	Num get_size ():
253	258	return call (CAP_MASTER_DIRECT \| GET_SIZE)
254	259	// Get the filename.
255		String get_name (Iris::Num idx):
	260	String get_name (Num idx):
256	261	icall (CAP_MASTER_DIRECT \| GET_NAME, idx)
257		return Iris::get_arg ()
	262	return get_arg ()
258	263	// Get the file.
259		Iris::Cap get_file_ro (Iris::Num idx):
	264	Cap get_file_ro (Num idx):
260	265	icall (CAP_MASTER_DIRECT \| GET_FILE_RO, idx)
261		return Iris::get_arg ()
	266	return get_arg ()
262	267	// Get file info. TODO: define possible types.
263		Iris::Num get_file_info (Iris::Num idx, unsigned type):
264		return icall (Iris::Num (CAP_MASTER_DIRECT \| GET_FILE_INFO, type), idx)
	268	Num get_file_info (Num idx, unsigned type):
	269	return icall (Num (CAP_MASTER_DIRECT \| GET_FILE_INFO, type), idx)
265	270	// Lock the directory for reading. Multiple read locks can exist simultaneously, but no write lock can be present.
266	271	void lock_ro ():
267	272	call (CAP_MASTER_DIRECT \| LOCK_RO)
...	...
269	274	void unlock_ro ():
270	275	call (CAP_MASTER_DIRECT \| UNLOCK_RO)
271	276	struct WDirectory : public Directory:
272		WDirectory (Iris::Cap c = Iris::Cap ()) : Directory (c):
	277	WDirectory (Cap c = Cap ()) : Directory (c):
273	278	enum request:
274	279	GET_FILE = Directory::ID
275	280	CREATE_FILE
...	...
278	283	UNLOCK
279	284	ID
280	285	// Get the file.
281		Iris::Cap get_file (Iris::Num idx):
	286	Cap get_file (Num idx):
282	287	icall (CAP_MASTER_DIRECT \| GET_FILE, idx)
283		return Iris::get_arg ()
	288	return get_arg ()
284	289	// Create a new file. After this, any index may map to a different file.
285		Iris::Cap create_file (String name):
	290	Cap create_file (String name):
286	291	icall (CAP_MASTER_DIRECT \| CREATE_FILE)
287		return Iris::get_arg ()
	292	return get_arg ()
288	293	// Delete a file. After this, any index may map to a different file.
289		void delete_file (Iris::Num idx):
	294	void delete_file (Num idx):
290	295	call (CAP_MASTER_DIRECT \| DELETE_FILE, idx)
291	296	// Lock the directory. Write operations can only be done when the directory is locked.
292	297	void lock ():
...	...
297	302
298	303	// A filesystem turns a String into a Directory.
299	304	struct Filesystem : public Device:
300		Filesystem (Iris::Cap c = Iris::Cap ()) : Device (c):
	305	Filesystem (Cap c = Cap ()) : Device (c):
301	306	enum request:
302	307	USE_DEVICE = WDirectory::ID
303	308	USE_DEVICE_RO
304	309	ID
305	310	WDirectory use_device (WString dev):
306	311	ocall (dev, CAP_MASTER_DIRECT \| USE_DEVICE)
307		return Iris::get_arg ()
	312	return get_arg ()
308	313	Directory use_device_ro (String dev):
309	314	ocall (dev, CAP_MASTER_DIRECT \| USE_DEVICE_RO)
310		return Iris::get_arg ()
	315	return get_arg ()
311	316
312	317	// Stream interface.
313		struct Stream : public Iris::Cap:
314		Stream (Iris::Cap c = Iris::Cap ()) : Iris::Cap (c):
	318	struct Stream : public Cap:
	319	Stream (Cap c = Cap ()) : Cap (c):
315	320	enum request:
316	321	READ = Filesystem::ID
317	322	WRITE
318	323	ID
319	324	// Try to read size bytes. Returns the number of bytes successfully read.
320		Iris::Num read (Iris::Num size, bool block):
321		return icall (Iris::Num (CAP_MASTER_DIRECT \| READ, block), size)
	325	Num read (Num size, bool block):
	326	return icall (Num (CAP_MASTER_DIRECT \| READ, block), size)
322	327	// Try to write size bytes. Returns the number of bytes successfully written.
323		Iris::Num write (String s, Iris::Num size):
	328	Num write (String s, Num size):
324	329	return ocall (s, CAP_MASTER_DIRECT \| WRITE, size)
325	330
326		struct UI : public Iris::Cap:
327		UI (Iris::Cap c = Iris::Cap ()) : Iris::Cap (c):
	331	struct UI : public Cap:
	332	UI (Cap c = Cap ()) : Cap (c):
328	333	enum request:
329	334	GET_STATE = Stream::ID
330	335	EVENT
...	...
332	337	ID
333	338	enum constant:
334	339	INPUT = 1 << 31
335		void get_state (Iris::Cap cap):
	340	void get_state (Cap cap):
336	341	ocall (cap, CAP_MASTER_DIRECT \| GET_STATE)
337	342	void event (unsigned code, unsigned value = 0):
338		call (Iris::Num (CAP_MASTER_DIRECT \| EVENT, code), value)
	343	call (Num (CAP_MASTER_DIRECT \| EVENT, code), value)
339	344	void exit ():
340	345	call (CAP_MASTER_DIRECT \| EXIT)
341	346
342	347	// Block device interface.
343	348	struct Block_device : public WString:
344		Block_device (Iris::Cap c = Iris::Cap ()) : WString (c):
	349	Block_device (Cap c = Cap ()) : WString (c):
345	350	// TODO: to be designed.
346	351
347	352

init.config
5	5	driver driver_gpio = "gpio.elf"
6	6	program alarm = "alarm.elf"
7	7	program gui = "gui.elf"
	8	#driver nand = "nand.elf"
	9	driver sdmmc = "sd+mmc.elf"
8	10
9	11	# receive <name> / <type> [, <index>] = <cap> prepare to accept a capability from a named program.
10	12	receive driver_lcd / Display = display
...	...
12	14	receive driver_buzzer / Buzzer = buzzer
13	15	receive driver_gpio / Keyboard , 0 = keyboard
14	16	receive driver_gpio / Keyboard , 1 = sysreq
	17	receive driver_gpio / Event = sdmmc_gpio
15	18	receive alarm / UI = ui
	19	receive sdmmc / WString = sdmmc
16	20
17	21	# sysreq <cap> use a capability as the system request keyboard.
18	22	sysreq sysreq
...	...
23	27	give gui / Setting = display_bright
24	28	give gui / Buzzer = buzzer
25	29	give gui / Keyboard = keyboard
	30	give sdmmc / Event = sdmmc_gpio
26	31
27	32	# include <file> include a file as another config file.
28	33

mips/nanonote/Makefile.arch
27	27
28	28	arch_iris_sources = mips/interrupts.cc mips/arch.cc
29	29	boot_sources = mips/init.cc mips/nanonote/board.cc
30		arch_headers = mips/arch.hh mips/nanonote/jz4740.hh mips/nanonote/board.hh devices.hh
	30	arch_headers = mips/arch.hh mips/nanonote/jz4740.hh mips/nanonote/board.hh
31	31	boot_threads = bootinit udc
32		programs = init gpio lcd bsquare ball buzzer metronome elfrun alarm gui
	32	programs = init gpio lcd bsquare ball buzzer metronome elfrun alarm gui nand sd+mmc
33	33
34	34	all: test
35	35

mips/nanonote/board.ccp
46	46	// Use some gpio pins for lcd.
47	47	gpio_as_gpio (2, (1 << 21) \| (1 << 22) \| (1 << 23))
48	48	gpio_as_output (2, (1 << 21) \| (1 << 22) \| (1 << 23))
	49	// And some for sd/mmc.
	50	gpio_as_gpio (3, (1 << 0) \| (1 << 2))
	51	gpio_as_output (3, 1 << 2)
	52	gpio_as_input (3, 1 << 0)
	53	gpio_disable_pull (3, (1 << 0) \| (1 << 2))
	54	// Disable power to sd/mmc by default.
	55	gpio_set (3, 1 << 2)
49	56	// Set up keyboard: this breaks uart receive.
50	57	gpio_as_gpio (3, 0x05fc0000)
51	58	// Set up timed interrupts.

mips/nanonote/jz4740.hhp
120	120	#define map_rtc() do { __map_io (RTC_PHYSICAL, RTC_BASE); } while (1)
121	121	#define map_gpio() do { __map_io (GPIO_PHYSICAL, GPIO_BASE); } while (0)
122	122	#define map_aic() do { __map_io (AIC_PHYSICAL, AIC_BASE); } while (0)
	123	#define map_msc() do { __map_io (MSC_PHYSICAL, MSC_BASE); } while (0)
123	124	#define map_uart0() do { __map_io (UART0_PHYSICAL, UART0_BASE); } while (0)
124	125	#define map_i2c() do { __map_io (I2C_PHYSICAL, I2C_BASE); } while (0)
125	126	#define map_ssi() do { __map_io (SSI_PHYSICAL, SSI_BASE); } while (0)
...	...
3140	3141	#define msc_rd_rxfifo() ( MSC_RXFIFO )
3141	3142	#define msc_wr_txfifo(v) ( MSC_TXFIFO = v )
3142	3143
3143		static void msc_reset():
3144		MSC_STRPCL = MSC_STRPCL_RESET
3145		while MSC_STAT & MSC_STAT_IS_RESETTING:
3146
3147	3144	#define msc_start_clk() (MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_START)
3148	3145
3149		#define msc_stop_clk() (MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_STOP)
3150
3151	3146	#define MMC_CLK 19169200
3152	3147	#define SD_CLK 24576000
3153	3148

source/alarm.ccp
12	12	ALARM
13	13	NUM_OUTS
14	14
15		static UI <NUM_INS, NUM_OUTS> ui
16		static UI <NUM_INS, NUM_OUTS>::in <unsigned> total_time
17		static UI <NUM_INS, NUM_OUTS>::in_event do_start
18		static UI <NUM_INS, NUM_OUTS>::out <unsigned> current_time
19		static UI <NUM_INS, NUM_OUTS>::out_event do_alarm
	15	typedef UI <NUM_INS, NUM_OUTS> ui_t
	16	static ui_t ui
	17	static ui_t::in <unsigned> total_time
	18	static ui_t::in_event do_start
	19	static ui_t::out <unsigned> current_time
	20	static ui_t::out_event do_alarm
20	21
21	22	static bool ticking
22	23
...	...
56	57	switch Iris::recv.protected_data.l:
57	58	case ~0:
58	59	// alarm.
59		current_time = current_time - 1
	60	if current_time:
	61	current_time = current_time - 1
60	62	if !current_time:
61	63	do_alarm ()
62	64	ticking = false

source/crt0.ccp
137	137	Iris::recv.reply = Iris::alloc_cap ()
138	138	Iris::recv.arg = Iris::alloc_cap ()
139	139	Iris::Num ret = start ()
140		Iris::my_parent.invoke (~0, ret)
	140	Iris::my_parent.exit (ret)
141	141	Iris::my_memory.destroy (Iris::my_thread)
142	142	// The program no longer exists. If it somehow does, generate an address fault.
143	143	while true:

source/gui.ccp
25	25	static Iris::Display display
26	26	static Iris::Buzzer buzzer
27	27	static unsigned *framebuffer
	28	static unsigned alarming
28	29
29	30	enum PD:
30	31	UI
...	...
151	152	draw_num (upper, 3, time / 10)
152	153	draw_num (upper, 4, time % 10)
153	154
154		static void beep ():
155		buzzer.beep (4 * 440, 1000, ~0)
	155	static void do_alarm ():
	156	static unsigned tune[] = { 4, 6, 6, 5, 7, 7 }
	157	if ++alarming > sizeof (tune) / sizeof (*tune):
	158	alarming = 1
	159	buzzer.beep (tune[alarming - 1] * 220, 300, ~0)
	160	Iris::my_receiver.set_alarm (HZ / 3)
156	161
157	162	Iris::Num start ():
158	163	Iris::my_parent.init_done ()
	164
159	165	display = Iris::my_parent.get_capability <Iris::Display> ()
160	166	Iris::Setting bright = Iris::my_parent.get_capability <Iris::Setting> ()
161	167	Iris::Keyboard keyboard = Iris::my_parent.get_capability <Iris::Keyboard> ()
162	168	buzzer = Iris::my_parent.get_capability <Iris::Buzzer> ()
163	169	Iris::UI app = Iris::my_parent.get_capability <Iris::UI> ()
164		Iris::Cap cb = Iris::my_receiver.create_capability (UI)
	170
165	171	framebuffer = (unsigned *)0x15000
166	172	Iris::Caps fb = display.map_fb ((unsigned)framebuffer)
167		bright.set (bright.get_range ())
	173
	174	unsigned screen_max = bright.get_range ()
	175	bright.set (0)
	176	bool screen_on = false
	177
	178	Iris::Cap cb = Iris::my_receiver.create_capability (UI)
168	179	app.get_state (cb.copy ())
169	180	Iris::free_cap (cb)
	181
170	182	cb = Iris::my_receiver.create_capability (KBD)
171	183	keyboard.set_cb (cb.copy ())
172	184	Iris::free_cap (cb)
	185
173	186	draw_num (false, 2, 10)
174	187	draw_num (true, 2, 10)
	188
175	189	unsigned total_time = 0
	190	alarming = 0
176	191	while true:
177	192	Iris::wait ()
178	193	switch Iris::recv.protected_data.l:
	194	case ~0:
	195	// Alarm.
	196	if alarming:
	197	do_alarm ()
	198	break
179	199	case UI:
180	200	switch Iris::recv.data[0].l:
181	201	case CURRENT_TIME:
182	202	draw_time (false, Iris::recv.data[1].l)
183	203	break
184	204	case ALARM:
185		beep ()
	205	do_alarm ()
186	206	break
187	207	case TOTAL_TIME \| Iris::UI::INPUT:
188	208	total_time = Iris::recv.data[1].l
...	...
194	214	case KBD:
195	215	if Iris::recv.data[0].l & Iris::Keyboard::RELEASE:
196	216	break
	217	alarming = 0
197	218	switch Iris::recv.data[0].l:
198	219	case Key::VOLUME_UP:
199	220	total_time += 60
...	...
236	257	break
237	258	case Key::ENTER:
238	259	app.event (START)
	260	break
	261	case Key::BACKSPACE:
	262	screen_on = !screen_on
	263	if screen_on:
	264	bright.set (screen_max)
	265	else:
	266	bright.set (0)
	267	break

source/init.ccp
269	269	{ "String", 6, Iris::String::ID },
270	270	{ "WString", 7, Iris::WString::ID },
271	271	{ "Device", 6, Iris::Device::ID },
	272	{ "Event", 5, Iris::Event::ID },
272	273	{ "Parent", 6, Iris::Parent::ID },
273	274	{ "Keyboard", 8, Iris::Keyboard::ID },
274	275	{ "Buzzer", 6, Iris::Buzzer::ID },

source/nand.ccp
	1	#pypp 0
	2	// Iris: micro-kernel for a capability-based operating system.
	3	// boot-programs/nand.ccp: NAND driver.
	4	// Copyright 2009 Bas Wijnen <wijnen@debian.org>
	5	//
	6	// This program is free software: you can redistribute it and/or modify
	7	// it under the terms of the GNU General Public License as published by
	8	// the Free Software Foundation, either version 3 of the License, or
	9	// (at your option) any later version.
	10	//
	11	// This program is distributed in the hope that it will be useful,
	12	// but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	// GNU General Public License for more details.
	15	//
	16	// You should have received a copy of the GNU General Public License
	17	// along with this program. If not, see <http://www.gnu.org/licenses/>.
	18
	19	#include "devices.hh"
	20	#define ARCH
	21	#include "arch.hh"
	22
	23	// The following defines are taken from mtd/nand.h in the Linux source.
	24
	25	// Standard NAND flash commands
	26	#define CMD_READ0 0
	27	#define CMD_READ1 1
	28	#define CMD_RNDOUT 5
	29	#define CMD_PAGEPROG 0x10
	30	#define CMD_READOOB 0x50
	31	#define CMD_ERASE1 0x60
	32	#define CMD_STATUS 0x70
	33	#define CMD_STATUS_MULTI 0x71
	34	#define CMD_SEQIN 0x80
	35	#define CMD_RNDIN 0x85
	36	#define CMD_READID 0x90
	37	#define CMD_ERASE2 0xd0
	38	#define CMD_RESET 0xff
	39
	40	// Extended commands for large page devices
	41	#define CMD_READSTART 0x30
	42	#define CMD_RNDOUTSTART 0xE0
	43	#define CMD_CACHEDPROG 0x15
	44
	45	// Extended commands for AG-AND device
	46	// Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
	47	// there is no way to distinguish that from NAND_CMD_READ0
	48	// until the remaining sequence of commands has been completed
	49	// so add a high order bit and mask it off in the command.
	50	#define CMD_DEPLETE1 0x100
	51	#define CMD_DEPLETE2 0x38
	52	#define CMD_STATUS_MULTI 0x71
	53	#define CMD_STATUS_ERROR 0x72
	54	// multi-bank error status (banks 0-3)
	55	#define CMD_STATUS_ERROR0 0x73
	56	#define CMD_STATUS_ERROR1 0x74
	57	#define CMD_STATUS_ERROR2 0x75
	58	#define CMD_STATUS_ERROR3 0x76
	59	#define CMD_STATUS_RESET 0x7f
	60	#define CMD_STATUS_CLEAR 0xff
	61
	62	#define CMD_NONE -1
	63
	64	// Status bits
	65	#define STATUS_FAIL 0x01
	66	#define STATUS_FAIL_N1 0x02
	67	#define STATUS_TRUE_READY 0x20
	68	#define STATUS_READY 0x40
	69	#define STATUS_WP 0x80
	70
	71	static volatile char *command
	72	static volatile char *address
	73	static volatile char *data
	74
	75	static unsigned page_bits
	76	static unsigned redundant_bits
	77	static unsigned block_bits
	78	static unsigned word_size
	79
	80	static void unbusy ():
	81	while !(gpio_get_port (2) & (1 << 30)):
	82	Iris::schedule ()
	83
	84	static void reset ():
	85	Iris::Page data_page = Iris::my_memory.create_page ()
	86	Iris::Page command_page = Iris::my_memory.create_page ()
	87	Iris::Page address_page = Iris::my_memory.create_page ()
	88
	89	unsigned base = 0x18000000
	90	data_page.alloc_physical (base, false, false)
	91	command_page.alloc_physical (base + 0x8000, false, false)
	92	address_page.alloc_physical (base + 0x10000, false, false)
	93
	94	Iris::my_memory.map (data_page, (unsigned)data)
	95	Iris::my_memory.map (command_page, (unsigned)command)
	96	Iris::my_memory.map (address_page, (unsigned)address)
	97
	98	Iris::free_cap (data_page)
	99	Iris::free_cap (command_page)
	100	Iris::free_cap (address_page)
	101
	102	// Set up.
	103	gpio_as_nand ()
	104	EMC_NFCSR = EMC_NFCSR_NFE1 \| EMC_NFCSR_NFCE1
	105
	106	// Reset nand.
	107	*command = CMD_RESET
	108	unbusy ()
	109
	110	*command = CMD_READID
	111	*address = 0
	112	unsigned d = *data
	113	//unsigned maker = d
	114	d = *data
	115	//unsigned device = d
	116	d = *data
	117	//unsigned internal_chip_number = 1 << (d & 0x3)
	118	//unsigned cell_type = 2 << ((d >> 2) & 0x3)
	119	//unsigned simultaneously_programmed_pages = 1 << ((d >> 4) & 0x3)
	120	//bool can_interleave_program_between_chips = d & 0x40
	121	//bool can_cache_program = d & 0x80
	122	d = *data
	123	page_bits = 10 + (d & 3)
	124	kdebug ("page bits: ")
	125	kdebug_num (page_bits)
	126	kdebug ("\n")
	127	redundant_bits = (d & 4 ? 4 : 3)
	128	block_bits = 64 + ((d >> 4) & 3)
	129	word_size = (d & 0x40 ? 16 : 8)
	130	//unsigned serial_access_minimum = (d & 0x80 ? 25 : 50)
	131	d = *data
	132	//unsigned num_planes = 1 << ((d >> 2) & 3)
	133	//unsigned plane_bits = 26 + ((d >> 4) & 7)
	134
	135	static void read (unsigned a, char *buffer):
	136	unsigned column = a & ((1 << page_bits) - 1)
	137	unsigned row = a >> page_bits
	138	kdebug ("reading: ")
	139	kdebug_num (a)
	140	kdebug ("/")
	141	kdebug_num (row)
	142	kdebug ("/")
	143	kdebug_num (column)
	144	kdebug (": ")
	145	*command = CMD_READ0
	146	*address = column
	147	*address = column >> 8
	148	*address = row
	149	*address = row >> 8
	150	*address = row >> 16
	151	*command = CMD_READSTART
	152	EMC_NFECR = EMC_NFECR_ECCE \| EMC_NFECR_RS \| EMC_NFECR_RS_DECODING \| EMC_NFECR_ERST
	153	// Wait for nand to be ready.
	154	unbusy ()
	155	for unsigned t = 0; t < 0x200; ++t:
	156	buffer[t] = *data
	157	char error[9]
	158	unsigned errcol = (1 << page_bits) + (column >> 5)
	159	*command = CMD_RNDOUT
	160	*address = errcol
	161	*address = errcol >> 8
	162	*command = CMD_RNDOUTSTART
	163	for unsigned t = 0; t < 9; ++t:
	164	error[t] = *data
	165	EMC_NFPAR (0) = ((unsigned *)error)[0]
	166	EMC_NFPAR (1) = ((unsigned *)error)[1]
	167	EMC_NFPAR (2) = error[9]
	168	EMC_NFECR = EMC_NFECR_ECCE \| EMC_NFECR_RS \| EMC_NFECR_RS_DECODING \| EMC_NFECR_PRDY
	169	while !(EMC_NFINTS & EMC_NFINTS_DECF):
	170	Iris::schedule ()
	171	// delay...
	172	//Iris::schedule ()
	173	unsigned errs = (EMC_NFINTS & EMC_NFINTS_ERRCNT_MASK) >> EMC_NFINTS_ERRCNT_BIT
	174
	175	Iris::Num start ():
	176	for unsigned i = 0; i < 30; ++i:
	177	Iris::schedule ()
	178	map_emc ()
	179	map_gpio ()
	180
	181	command = (volatile char *)0x15000
	182	address = (volatile char *)0x16000
	183	data = (volatile char *)0x17000
	184
	185	reset ()
	186
	187	char buffer[0x200]
	188
	189	// Send nand contents to serial port.
	190	for unsigned a = 0; a < 0x4000; a += 0x200:
	191	read (a, buffer)
	192	//for unsigned s = 0; s < 0x10; ++s:
	193	for unsigned t = 0; t < 0x10; ++t:
	194	kdebug (" ")
	195	kdebug_num (buffer[0 * 0x20 + t], 2)
	196	kdebug ("\n")
	197	//kdebug ("\n")
	198	// Exit.
	199	return 0

source/nanonote-gpio.ccp
165	165	#endif
166	166	}
167	167
168		class PowerButton:
	168	class Event:
169	169	bool state, started
	170	unsigned pin
170	171	Iris::Cap cb
171	172	public:
172	173	void scan ():
173	174	if !started:
174	175	return
175		gpio_mask_irq (3, 1 << 29)
176		bool s = gpio_get_port (3) & (1 << 29)
	176	gpio_mask_irq (3, 1 << pin)
	177	bool s = gpio_get_port (3) & (1 << pin)
177	178	if s != state:
178	179	state = s
179	180	cb.invoke (state ? Iris::Keyboard::RELEASE : 0)
180		gpio_as_interrupt (3, 1 << 29, !state, true)
181		gpio_unmask_irq (3, 1 << 29)
182		PowerButton ():
183		gpio_as_gpio (3, 29)
	181	gpio_as_interrupt (3, 1 << pin, !state, true)
	182	gpio_unmask_irq (3, 1 << pin)
	183	Event (unsigned p):
	184	pin = p
	185	gpio_as_gpio (3, pin)
184	186	state = true
185	187	started = false
186	188	void set_cb (Iris::Cap c):
...	...
195	197	enum codes:
196	198	KBD_DEV = 32
197	199	PWR
	200	SDMMC
198	201
199	202	Iris::Num start ():
200	203	map_gpio ()
201	204
202	205	DevKbd kbd
203		PowerButton pwr
	206	Event pwr (29)
	207	Event sdmmc (0)
204	208
205		Iris::Device dev = Iris::my_receiver.create_capability (KBD_DEV)
	209	Iris::Keyboard dev = Iris::my_receiver.create_capability (KBD_DEV)
206	210	Iris::Keyboard pw = Iris::my_receiver.create_capability (PWR)
	211	Iris::Event sm = Iris::my_receiver.create_capability (SDMMC)
207	212	Iris::my_parent.provide_capability <Iris::Keyboard> (dev.copy (), 0)
208	213	Iris::my_parent.provide_capability <Iris::Keyboard> (pw.copy (), 1)
	214	Iris::my_parent.provide_capability <Iris::Event> (sm.copy ())
209	215	Iris::free_cap (dev)
210	216	Iris::free_cap (pw)
	217	Iris::free_cap (sm)
211	218	Iris::my_parent.init_done ()
212	219	if kbd.scanning ():
213	220	Iris::my_receiver.set_alarm (SCAN_INTERVAL)
...	...
225	232	// Interrupt.
226	233	pwr.scan ()
227	234	kbd.scan ()
	235	sdmmc.scan ()
228	236	if kbd.scanning ():
229	237	Iris::my_receiver.set_alarm (SCAN_INTERVAL)
230	238	Iris::register_interrupt (IRQ_GPIO3)
...	...
235	243	case Iris::Device::RESET:
236	244	Iris::recv.reply.invoke ()
237	245	break
238		case Iris::Keyboard::SET_CB:
	246	case Iris::Event::SET_CB:
239	247	Iris::Cap reply = Iris::get_reply ()
240	248	kbd.active (Iris::get_arg ())
241	249	reply.invoke ()
...	...
256	264	case Iris::Device::RESET:
257	265	Iris::recv.reply.invoke ()
258	266	break
259		case Iris::Keyboard::SET_CB:
	267	case Iris::Event::SET_CB:
260	268	Iris::Cap reply = Iris::get_reply ()
261	269	pwr.set_cb (Iris::get_arg ())
262	270	reply.invoke ()
...	...
268	276	kdebug ("\n")
269	277	break
270	278	break
	279	case SDMMC:
	280	switch Iris::recv.data[0].l:
	281	case Iris::Device::RESET:
	282	Iris::recv.reply.invoke ()
	283	break
	284	case Iris::Event::SET_CB:
	285	Iris::Cap reply = Iris::get_reply ()
	286	sdmmc.set_cb (Iris::get_arg ())
	287	reply.invoke ()
	288	Iris::free_cap (reply)
	289	break
	290	default:
	291	kdebug ("SdMmc gpio invalid request\n")
	292	kdebug_num (Iris::recv.data[0].l)
	293	kdebug ("\n")
	294	break
	295	break
271	296	default:
272	297	kdebug ("keyboard unknown num: ")
273	298	kdebug_num (Iris::recv.protected_data.h)

source/sd+mmc.ccp
	1	#pypp 0
	2	// Iris: micro-kernel for a capability-based operating system.
	3	// source/sd+mmc.ccp: sd+mmc driver.
	4	// Copyright 2009 Bas Wijnen <wijnen@debian.org>
	5	//
	6	// This program is free software: you can redistribute it and/or modify
	7	// it under the terms of the GNU General Public License as published by
	8	// the Free Software Foundation, either version 3 of the License, or
	9	// (at your option) any later version.
	10	//
	11	// This program is distributed in the hope that it will be useful,
	12	// but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	// GNU General Public License for more details.
	15	//
	16	// You should have received a copy of the GNU General Public License
	17	// along with this program. If not, see <http://www.gnu.org/licenses/>.
	18
	19	#include "devices.hh"
	20	#define ARCH
	21	#include "arch.hh"
	22
	23	class Mmc:
	24	static unsigned const PORT = 3
	25	static unsigned const PIN = 2
	26	bool check_sdio ()
	27	void check_sdmem ()
	28	void check_mmc ()
	29	public:
	30	void reset ()
	31	void detect ()
	32	void release ()
	33	void interrupt ()
	34
	35	void Mmc::reset ():
	36	// Enable slow clock to msc.
	37	CPM_MSCCDR = ~0
	38	cpm_start_msc ()
	39	// Enable msc pins.
	40	gpio_as_msc ()
	41	// Disable power to card.
	42	gpio_as_gpio (PORT, 1 << PIN)
	43	gpio_as_output (PORT, 1 << PIN)
	44	gpio_disable_pull (PORT, 1 << PIN)
	45	gpio_set (PORT, 1 << PIN)
	46
	47	// Stop the clock.
	48	MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_STOP
	49	while MSC_STAT & MSC_STAT_CLK_EN:
	50	Iris::schedule ()
	51
	52	// Initialize registers.
	53	MSC_CLKRT = MSC_CLKRT_CLK_RATE_DIV_128
	54	MSC_RESTO = 64
	55	MSC_RDTO = ~0
	56	MSC_BLKLEN = 0x200
	57	MSC_NOB = 0
	58	MSC_IMASK = ~0
	59	MSC_ARG = 0
	60
	61	// Reset controller and inserted devices.
	62	MSC_STRPCL = MSC_STRPCL_RESET
	63	while MSC_STAT & MSC_STAT_IS_RESETTING:
	64	Iris::schedule ()
	65
	66	// Start the clock.
	67	MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_START
	68	// Set cards, if any, to idle.
	69	MSC_CMD = 0
	70	MSC_CMDAT = MSC_CMDAT_RESPONSE_NONE
	71	msc_start_op ()
	72	while !msc_ireg_end_cmd_res ():
	73	Iris::schedule ()
	74	msc_ireg_clear_end_cmd_res ()
	75
	76	// Reset SDIO device, if any.
	77	MSC_CMD = 52
	78	MSC_ARG = 0x88000C08
	79	MSC_CMDAT = MSC_CMDAT_RESPONSE_R5
	80	msc_start_op ()
	81	while !msc_ireg_end_cmd_res ():
	82	Iris::schedule ()
	83	msc_ireg_clear_end_cmd_res ()
	84
	85	bool Mmc::check_sdio ():
	86	// 2. Send CMD5 (IO_SEND_OP_CMD) to validate voltage.
	87	// 3. If the response is correct and the number of IO functions > 0, then continue, else go to check SDMEM.
	88	// 4. If C-bit in the response is ready (the initialization has finished), go to 6.
	89	// 5. Send CMD5 (IO_SEND_OP_CMD) to validate voltage, then go to 4.
	90	// 6. If memory-present-bit in the response is true, then it is a combo card (SDIO + Memory), else
	91	// it is only a SDIO card.
	92	// 7. If it is a combo card, go to check SDMEM to initialize the memory part.
	93	// 8. Send CMD3 (SET_RELATIVE_ADDR) to let the card publish a RCA. The RCA is returned
	94	// from the response.
	95	// 9. If do not accept the new RCA, go to 8, else record the new RCA.
	96	// 10. Go to check MMC, because we can assure that there is no SDMEM card.
	97	return false
	98
	99	void Mmc::check_sdmem ():
	100	// 2. Send CMD55. Here the default RCA 0x0000 is used for CMD55.
	101	// 3. If the response is correct (CMD55 has response), then continue, else go to check MMC.
	102	// 4. Send ACMD41 (SD_SEND_OP_CMD) to validate voltage (the general OCR value is 0x00FF8000).
	103	// 5. If the initialization has finished, go to 7. (The response is the OCR register and it includes a status information bit (bit [31]). This status bit is set if the card power up procedure has been finished. As long as the card is busy, the corresponding bit[31] is set to LOW.)
	104	// 6. Send CMD55 and ACMD41 to validate voltage, and then go to 5.
	105	// 7. Send CMD2 (ALL_SEND_CID) to get the card CID.
	106	// 8. Send CMD3 (SET_RELATIVE_ADDR) to let card publish a RCA. The RCA is returned from the response.
	107	// 9. If do not accept the new RCA, go to 8, else record the new RCA.
	108	// 10. Go to check MMC.
	109
	110	void Mmc::check_mmc ():
	111	// 1. SEND CMD1 (SEND_OP_CMD) TO VALIDATE VOLTAGE (THE GENERAL OCR VALUE IS 0X00FF88000).
	112	// 2. IF THE RESPONSE IS CORRECT, THEN CONTINUE, ELSE GOTO 9.
	113	// 3. IF THE INITIALIZATION HAS FINISHED, GO TO 5. (THE RESPONSE IS THE OCR REGISTER AND IT INCLUDES A STATUS INFORMATION BIT (BIT [31]). THIS STATUS BIT IS SET IF THE CARD POWER UP PROCEDURE HAS BEEN FINISHED. AS LONG AS THE CARD IS BUSY, THE CORRESPONDING BIT[31] IS SET TO LOW.)
	114	// 4. Send CMD1 (SEND_OP_CMD) to validate voltage, and then go to 3.
	115	// 5. Send CMD2 (ALL_SEND_CID) to get the card CID.
	116	// 6. If the response timeout occurs, goto 9.
	117	// 7. Send CMD3 (SET_RELATIVE_ADDR) to assign the card a RCA.
	118	// 8. If there are other MMC cards, then go to 5.
	119
	120	void Mmc::detect ():
	121	kdebug ("mmc detect\n")
	122	gpio_clear (PORT, 1 << PIN)
	123	if check_sdio ():
	124	check_sdmem ()
	125	check_mmc ()
	126
	127	void Mmc::release ():
	128	kdebug ("mmc release\n")
	129	gpio_set (PORT, 1 << PIN)
	130
	131	void Mmc::interrupt ():
	132	kdebug ("mmc interrupt\n")
	133
	134
	135	enum types:
	136	DETECT
	137	REQUEST
	138
	139	Iris::Num start ():
	140	map_msc ()
	141	map_gpio ()
	142	map_cpm ()
	143
	144	Mmc mmc
	145	mmc.reset ()
	146
	147	Iris::Event detect = Iris::my_parent.get_capability <Iris::Event> ()
	148	Iris::Cap cap = Iris::my_receiver.create_capability (DETECT)
	149	detect.set_cb (cap.copy ())
	150	cap.invoke (~0)
	151	Iris::free_cap (cap)
	152
	153	// Get a message from the queue. This is either the "there is no card" message, or the message we just sent.
	154	Iris::wait ()
	155	if Iris::recv.data[0].l != ~0:
	156	// If it was "there is no card", the message we sent is still in the queue.
	157	Iris::wait ()
	158	else:
	159	// Otherwise, there is a card.
	160	mmc.detect ()
	161
	162	cap = Iris::my_receiver.create_capability (REQUEST)
	163	Iris::my_parent.provide_capability <Iris::WString> (cap.copy ())
	164	Iris::free_cap (cap)
	165
	166	Iris::my_parent.init_done ()
	167
	168	while true:
	169	Iris::wait ()
	170	switch Iris::recv.protected_data.l:
	171	case DETECT:
	172	if Iris::recv.data[0].l:
	173	mmc.detect ()
	174	else:
	175	mmc.release ()
	176	break
	177	case IRQ_MSC:
	178	mmc.interrupt ()
	179	break
	180	case REQUEST:
	181	kdebug ("sd+mmc request\n")
	182	break
	183	default:
	184	Iris::panic (0, "unexpected request source for sd+mmc")

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