Root/mips/nanonote/board.ccp

1#pypp 0
2// vim: set filetype=cpp ://
3// Iris: micro-kernel for a capability-based operating system.
4// mips/nanonote/board.ccp: nanonote-specific definitions.
5// Copyright 2009 Bas Wijnen <wijnen@debian.org>
6//
7// This program is free software: you can redistribute it and/or modify
8// it under the terms of the GNU General Public License as published by
9// the Free Software Foundation, either version 3 of the License, or
10// (at your option) any later version.
11//
12// This program is distributed in the hope that it will be useful,
13// but WITHOUT ANY WARRANTY; without even the implied warranty of
14// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15// GNU General Public License for more details.
16//
17// You should have received a copy of the GNU General Public License
18// along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20#define ARCH
21#define INIT
22#include "kernel.hh"
23
24void board_init ():
25    pll_init ()
26    // Stop all clocks, except the RTC and timer interrupt source.
27    CPM_CLKGR = 0x7fff & ~(CPM_CLKGR_RTC | CPM_CLKGR_TCU)
28    // Make sure the rtc is able to boot the device.
29    while !rtc_write_ready ():
30    rtc_enabled ()
31    while !rtc_write_ready ():
32    // Set wakeup assertion time, so it actually wakes up.
33    rtc_set_hrcr_val (0xfe0)
34    while !rtc_write_ready ():
35    // Set glitch detection to a low value.
36    rtc_set_hwfcr_val (0x1e0)
37    while !rtc_write_ready ():
38    // Allow rtc alarm to wake up device.
39    rtc_enable_alarm_wakeup ()
40    while !rtc_write_ready ():
41    // sdram memory.
42    gpio_as_sdram_16bit ()
43    // flash memory.
44    gpio_as_nand ()
45    // sound controller.
46    gpio_as_aic ()
47    // micro-sd controller.
48    gpio_as_msc ()
49    // display.
50    gpio_as_lcd_16bit ()
51    // buzzer.
52    gpio_as_pwm4 ()
53    // Set up memory.
54    setup_sdram ()
55    // Use some gpio pins for lcd.
56    gpio_as_gpio (2, (1 << 21) | (1 << 22) | (1 << 23))
57    gpio_as_output (2, (1 << 21) | (1 << 22) | (1 << 23))
58    // And some for sd/mmc.
59    gpio_as_gpio (3, (1 << 0) | (1 << 2))
60    gpio_as_output (3, 1 << 2)
61    gpio_as_input (3, 1 << 0)
62    gpio_disable_pull (3, (1 << 0) | (1 << 2))
63    // Disable power to sd/mmc by default.
64    gpio_set (3, 1 << 2)
65    // Set up timed interrupts.
66    tcu_start_timer_clock (0)
67    tcu_stop_counter (0)
68    tcu_select_extalclk (0)
69    tcu_select_clk_div4 (0)
70    tcu_disable_pwm_output (0)
71    tcu_set_full_data (0, JZ_EXTAL / HZ / 4)
72    tcu_mask_half_match_irq (0)
73    tcu_clear_full_match_flag (0)
74    tcu_unmask_full_match_irq (0)
75    tcu_start_counter (0)
76    #ifndef NDEBUG
77    setup_uart (true)
78    kdebug ("\n\nSerial port initialized\n")
79    #endif
80
81static void sync_serial ():
82    #ifndef NDEBUG
83    // Wait for serial port to be done.
84    while !(UART0_LSR & UARTLSR_TEMT):
85    #endif
86
87void arch_reboot ():
88    sync_serial ()
89    // Reboot.
90    wdt_select_extalclk ()
91    wdt_select_clk_div1 ()
92    wdt_set_data (1)
93    wdt_set_count (0)
94    wdt_start ()
95    // Wait for wdt to trigger reboot.
96    while true:
97
98void arch_poweroff ():
99    // Make sure the rtc is running; it wakes the device up.
100    cpm_start_rtc ()
101    while !rtc_write_ready ():
102    rtc_enabled ()
103    while !rtc_write_ready ():
104    rtc_set_hwfcr_val (0x1e0)
105    while !rtc_write_ready ():
106    rtc_set_hrcr_val (0x7f)
107    while !rtc_write_ready ():
108    kdebug ("Power down.\n")
109    sync_serial ()
110    rtc_power_down ()
111    // Wait for power down to work.
112    while true:
113        asm ("wait")
114
115void arch_suspend ():
116    sync_serial ()
117    // Suspend the system: go into SLEEP mode.
118    cpm_sleep_mode ()
119    asm ("wait")
120    cpm_idle_mode ()
121
122// Boot into another kernel.
123void arch_boot (unsigned address, unsigned arg):
124    sync_serial ()
125    arch_flush_cache ()
126    ((void (*)(unsigned))address) (arg)
127

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