Root/
| 1 | OUTPUT_ARCH(mips) |
| 2 | ENTRY(__start) |
| 3 | MEMORY |
| 4 | { |
| 5 | ram : ORIGIN = 0x80003000 , LENGTH = 0x800 |
| 6 | } |
| 7 | |
| 8 | SECTIONS |
| 9 | { |
| 10 | /* Start with the part containing the interrupt and exception code. */ |
| 11 | .text : { mips/board/mips_board_stage1_elf-stage1.o(.text*) } > ram |
| 12 | .text : { *(.text*) } > ram |
| 13 | |
| 14 | .rodata : { *(.rodata*) *(.note*) } > ram |
| 15 | .sdata : { *(.sdata*) } > ram |
| 16 | .data : { *(.data*) *(.scommon*) *(.reginfo*) } > ram |
| 17 | |
| 18 | _gp = ABSOLUTE(.); |
| 19 | |
| 20 | .got : { *(.got*) } > ram |
| 21 | .sbss : { *(.sbss*) } > ram |
| 22 | .bss : { *(.bss*) } > ram |
| 23 | } |
| 24 |
Branches:
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