Root/modules/INFO

Source at commit 2f182e5e37b3781bea11563754a36af593e4eca8 created 8 years 3 months ago.
By Adam Wang, bga.fpd: added module for Altera 484-FineLine BGA(FBGA) and Xilinx FG(G)484 Fine-Pitch BGA, 1.00 mm pitch
1#
2# Tags:
3#
4# F Footprint name (must be first)
5# N Data sheet identifier (N tag of BOOKSHELF; can be omitted if equal to F)
6#
7
8# Printed 8:10 card contacs
9F: 8_10-card
10
11# BGA
12F: bga
13# - 484-Pin FineLine BGA(FBGA), from Altera
14# http://www.altera.com/devicepackaging/04R00416-02.pdf
15#
16# - FG(G)484 Fine-Pitch BGA, from Xilinx
17# http://www.xilinx.com/support/documentation/user_guides/ug385.pdf
18#
19
20
21# EUS (R-PDSS-T6)
22F: eus
23#
24# - for example: the PTH04000WAH data sheet, it's EUS
25# http://www.ti.com/lit/ds/symlink/pth04000w.pdf
26#
27
28# Fiducial (1 mm copper pad, 2 mm solder mask clearance)
29F: fiducial
30
31# IR Receiver Module
32F: ir
33#
34# From Vishay:
35#
36# - the TSOP322.., TSOP324.., TSOP348.., TSOP344.. data sheet
37# http://www.vishay.com/docs/81732/tsop348.pdf
38
39# MDIP
40F: mdip
41#
42# From FAIRCHILD:
43#
44# - the 6N138S data sheet
45# http://www.fairchildsemi.com/ds/6N/6N138.pdf
46#
47# Package Type:
48#
49# - MDIP 8L
50# http://www.fairchildsemi.com/package/packageDetails.html?id=PN_192-B08
51#
52# Package Drawing:
53#
54# http://www.fairchildsemi.com/dwg/N0/N08H.pdf
55
56# Mini-USB B receptable (SMT; almost generic)
57F: mini_usb_b
58
59# Solder pads and test points
60F: pads
61
62# "Generic" simple QFN
63F: qfn
64#
65# The information for these packages comes from various sources:
66#
67# - the C8051F326 data sheet, for the QFN28 footprint (N: mcu)
68# - the AT86F326 data sheet, for the QFN32 package dimensions (N: txrx)
69# - Atmel's general recommendations for QFN land patterns (N: atmel-qfn)
70# - NXP's SOT617-1 and SOT617-3, for package and land pattern:
71# http://www.nxp.com/package/SOT617-1.html
72# http://www.nxp.com/package/SOT617-3.html
73#
74# Solder paste:
75#
76# Footprint Center pad Closest NXP (with complete land pattern)
77# QFN28-Atmel 2.4 mm for further study
78# QFN28-SiLabs 3.3 mm use SiLab's specification
79# QFN32-VHHD-2 3.7 mm between SOT818-1 and SOT788-1
80# QFN32-VHHD-6 3.4 mm SOT818-1
81#
82# From NXP:
83#
84# Package Pad Paste zone Islands Isl. size Isl. gap
85# SiLabs 3.25 3.1 3 x 3 0.9
86# SOT818-1 3.4 1.75 2 x 2 0.75 0.25
87# SOT788-1 4.0 2.4 3 x 3 0.6 0.3
88#
89# NXP rules (AN10365):
90# - paste zone = 35% of pad area
91# - paste coverge = 20% of pad area
92#
93# Our parameters:
94#
95# Package Pad Paste zone Islands Isl. size Isl. gap Zone Coverage
96# QFN32-VHHD-2 3.7 2.15 3 x 3 0.55 0.25 34% 20%
97# QFN32-VHHD-6 3.4 1.95 2 x 2 0.75 0.45 33% 19%
98#
99# Known bugs:
100#
101# - really ought to merge all the various QFN definitions (we have more
102# over at gta02-core) into a single QFN file with a big mean table of
103# everything
104#
105N: sot617-3-lp
106
107# "Generic" simple QFP (for now, just for Silabs' C8051F320)
108F: qfp
109#
110# - the C8051F320 data sheet
111# http://www.silabs.com/Support%20Documents/TechnicalDocs/C8051F32x.pdf
112#
113# according to MAXIM web: http://www.maxim-ic.com/design/packaging/
114# the LQPF48/TQFP48 referred to the same package drawing and land pattern
115#
116# - LQFP48, TQFP48: C48 -> package drawing
117# http://pdfserv.maxim-ic.com/package_dwgs/21-0054.PDF
118#
119# - LQFP48, TQFP48: C48 -> package land pattern
120# http://pdfserv.maxim-ic.com/land_patterns/90-0093.PDF
121#
122# - LQFP64, JEDEC MS-026-BCD for example: the ADV7181CBSTZ data sheet, package drawing
123# http://www.analog.com/static/imported-files/data_sheets/ADV7181C.pdf
124#
125# - LQFP64, C64 -> package drawing
126# http://pdfserv.maxim-ic.com/package_dwgs/21-0083.PDF
127#
128# - LQFP64, C64 -> package land pattern
129# http://pdfserv.maxim-ic.com/land_patterns/90-0141.PDF
130#
131
132# SOIC
133F: soic
134#
135# From TI:
136#
137# - the SN75HVD12DR data sheet
138# http://www.ti.com/lit/ds/symlink/sn75hvd12.pdf
139#
140# Package Drawing:
141#
142# - D(JEDEC)
143# - R-PDSO-G8
144# http://www-s.ti.com/sc/psheets/msoi002j/msoi002j.pdf
145# - R-PDSO-G14
146# http://www-s.ti.com/sc/psheets/mpds177g/mpds177g.pdf
147# - R-PDSO-G16
148# http://www-s.ti.com/sc/psheets/mpds178g/mpds178g.pdf
149
150F: sot
151
152# Standard rectangular passive components
153F: stdpass
154
155# SOT-323 package with counter-clockweise or clockwise pin assignment
156F: sot-323
157N: mmst3904
158
159# http://www.nxp.com/#/page/content=[f=/packages/SOT341-1.xml]
160# http://www.nxp.com/packages/SOT341-1.html
161# http://www.nxp.com/documents/reflow_soldering/SSOP-TSSOP-VSO-REFLOW.pdf
162
163# experimental generic SOT footprint; currently only for
164#
165# - SOT-323 aka SC-70
166# http://www.onsemi.com/pub_link/Collateral/BAV99WT1-D.PDF
167# - SOT-363 aka SC-88 aka SC-70-6
168# http://www.onsemi.com/pub_link/Collateral/MBT3946DW1T1-D.PDF
169# - SOT-523
170# http://www.diodes.com/datasheets/ds31784.pdf
171# - SOT-563
172# http://www.onsemi.com/pub_link/Collateral/NTZD3155C-D.PDF
173#
174# some conflicts with the outline exist
175
176# "Generic" simple SSOP
177F: ssop
178#
179# - TSSOP14: for example: the MIC2550AYTS data sheet, package drawing
180# http://www.micrel.com/_PDF/mic2550a.pdf
181#
182# - TSSOP14: from NXP -> package land pattern
183# http://www.nxp.com/packages/SOT402-1.html
184# http://www.nxp.com/documents/reflow_soldering/sot402-1_fr.pdf
185 
186
187# "Generic" simple TSOP
188F: tsop
189#
190# - the JS28F256J3F105 data sheet, it's TSOP-56
191# http://www.micron.com/parts/nor-flash/parallel-nor-flash/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/6062319942_J3_65_256M_MLC_DS.ashx
192#
193# according to MAXIM web: http://www.maxim-ic.com/design/packaging/
194# the TSOP32 referred to the same package drawing and land pattern
195#
196# - TSOP28: Z28 -> package drawing
197# http://pdfserv.maxim-ic.com/package_dwgs/21-0273.PDF
198#
199# - TSOP28: Z28 -> package land pattern
200# http://pdfserv.maxim-ic.com/land_patterns/90-0319.PDF
201#
202#
203# - TSOP32: Z32 -> package drawing
204# http://pdfserv.maxim-ic.com/package_dwgs/21-0274.PDF
205#
206# - TSOP32: Z32 -> package land pattern
207# http://pdfserv.maxim-ic.com/land_patterns/90-0320.PDF
208#
209#
210# - TSOP66: for example: the MT46V32M16P-5B:F data sheet, it's 400 mil, package drawing
211# http://download.micron.com/pdf/datasheets/dram/ddr/512MBDDRx4x8x16.pdf
212#
213# - TSOP66: currently referred to M1rc3 design files land pattern:
214# width of pad -> 0.4 mm, it's rectangle not round one
215# length of pad -> 1.25 mm
216# Width of body -> 400 mil
217
218# "Generic" simple TO-252, TO-263
219F: to
220#
221# - TO-252 for example: the LP38690DT-3.3 data sheet, it's TO-252
222# http://www.ti.com/lit/ds/symlink/lp38690.pdf
223#
224# - JEDEC Spec: TO-252 AA -> package drawing and land pattern
225# http://www.national.com/packaging/mkt/td03b.pdf
226#
227# - TO-263 for example: the LP38511TJ-ADJ/NOPB data sheet, it's TO-263
228# http://www.ti.com/lit/ds/symlink/lp38511-adj.pdf
229#
230# - JEDEC Spec: TO-263 THIN -> package drawing and land pattern
231# http://www.national.com/packaging/mkt/tj5a.pdf
232#
233
234# USB A plug for SMT
235#
236# Note: the signal pads are enlarged by 0.2 mm and their center is shifted by
237# 0.1 mm with respect to the reference.
238#
239# According to the data sheet, the leads terminate at (2.00+/-0.10 mm)/2+
240# 2.48 mm = 3.48+/-0.10 mm from the center. The reference footprint puts the
241# edge of the pads at (2.00+/-0.10 mm)/2+2.6 mm = 3.6 mm+/-0.10 mm, so the
242# maximum lead end could be at 3.58 mm while the minimum pad edge could be at
243# 3.5 mm.
244#
245# Assuming that the pad is intended to extend a bit beyond the lead, we need
246# to add 0.2 mm to compensate for these tolerances. (The pad tolerance may not
247# be intended to be used this way, however, we still have to consider small
248# errors in registration, which also amount to about 0.1 mm, so the calculation
249# remains valid.)
250#
251F: usb_a_plug_smt
252
253# USB 2.0 from usb_20_040908, page 99
254F: usb-a-pcb
255
256
257

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