Root/modules/dvi-recept-ra.fpd

Source at commit 7f3f9267cb007e13eca0af273f9eedad0c6c5659 created 1 year 6 months ago.
By Werner Almesberger, components/stm32.lib: add STM32L052x6/8 in QFN32 (KxU) package
1/* MACHINE-GENERATED ! */
2
3frame Cpins {
4    table
5        { n, dx, dy }
6        { 1, -1, 1 }
7        { 2, 1, 1 }
8        { 3, -1, -1 }
9        { 4, 1, -1 }
10        { 5, 0, 2 }
11        { 5, 0, -2 }
12
13    __0: vec @(dx*Cpitch/2, dy*Cpitch/2)
14    __1: vec .(Cr/2, Cr/2)
15    __2: vec __0(-Cr/2, -Cr/2)
16    hole . __1
17    __3: vec __0(factor*Cr/2, -factor*Cr/2)
18    __4: vec __0(-factor*Cr/2, factor*Cr/2)
19    rpad "C$n" . __3 bare
20}
21
22frame shield {
23    table
24        { n, dx }
25        { 25, -1 }
26        { 26, 1 }
27
28    __0: vec @(dx*shieldx/2, 0mm)
29    __1: vec .(shr/2, shr/2)
30    __2: vec __0(-shr/2, -shr/2)
31    hole . __1
32    __3: vec __0(factor*shr/2, -factor*shr/2)
33    __4: vec __0(-factor*shr/2, factor*shr/2)
34    rpad "$n" . __3 bare
35}
36
37frame ckt17pins {
38    set n = i+17
39
40    __0: vec @(i*cktpitch, 0mm)
41    __1: vec .(cktr/2, cktr/2)
42    __2: vec __0(-cktr/2, -cktr/2)
43    hole . __1
44    __3: vec __0(-factor*cktr/2, factor*cktr/2)
45    __4: vec __0(factor*cktr/2, -factor*cktr/2)
46    rpad "$n" __3 . bare
47}
48
49frame ckt9pins {
50    set n = i+9
51
52    __0: vec @(i*cktpitch, 0mm)
53    __1: vec .(cktr/2, cktr/2)
54    __2: vec __0(-cktr/2, -cktr/2)
55    hole . __1
56    __3: vec __0(-factor*cktr/2, factor*cktr/2)
57    __4: vec __0(factor*cktr/2, -factor*cktr/2)
58    rpad "$n" __3 . bare
59}
60
61frame ckt1pins {
62    set n = i+1
63
64    __0: vec @(i*cktpitch, 0mm)
65    __1: vec .(cktr/2, cktr/2)
66    __2: vec __0(-cktr/2, -cktr/2)
67    hole . __1
68    __3: vec __0(-factor*cktr/2, factor*cktr/2)
69    __4: vec __0(factor*cktr/2, -factor*cktr/2)
70    rpad "$n" __3 . bare
71}
72
73frame ckt {
74    loop i = 0, 7
75
76    __0: vec @(0mm, -ckt1to17y/2)
77    frame ckt9pins .
78    __1: vec .(0mm, -ckt1to17y/2)
79    frame ckt17pins .
80    __2: vec .(i*cktpitch, 0mm)
81    frame ckt1pins @
82}
83
84frame npth {
85    table
86        { dx }
87        { -1 }
88        { 1 }
89
90    __0: vec @(dx*npthx/2, 0mm)
91    __1: vec .(-npthr/2, npthr/2)
92    __2: vec __0(npthr/2, -npthr/2)
93    hole __1 .
94}
95
96frame outline {
97    __0: vec @(-L/2, -(npth2edgey+frontmetaly))
98    __1: vec .(L, PCBy+frontmetaly)
99    rect __0 . w
100    __2: vec .(0mm, -PCBy)
101    __3: vec __0(0mm, frontmetaly)
102    line . __2 w
103    __4: vec @(0mm, -(npth2edgey+frontmetaly))
104    __5: vec .(0mm, -face2outlety)
105    __6: vec .(-face2outletx/2, 0mm)
106    __7: vec __4(face2outletx/2, 0mm)
107    rect __6 . w
108}
109
110package "DVI-RECEPT-RA"
111unit mm
112
113set npthx = 19.05mm
114
115set npthr = 1.93mm
116
117set npth2edgey = 1.93mm
118
119set shr = 1.93mm
120
121set ckt1to17y = 3.81mm
122
123set ckt17y = 3.3mm
124
125set ckt1toPCBedgey = 9.63mm
126
127set cktpitch = 1.91mm
128
129set cktr = 0.86mm
130
131set face2outlety = 6.5mm
132
133set face2outletx = 24.03mm
134
135set factor = 1.6
136
137set shieldx = 30.73mm
138
139set C4y = 3.94mm
140
141set C5y = 2.67mm
142
143set Cpitch = 2.54mm
144
145set Cr = 0.66mm
146
147set L = 36.83mm
148
149set PCBy = 10.95mm
150
151set frontmetaly = ckt1toPCBedgey-ckt1to17y-ckt17y-npth2edgey
152
153set w = 5mil
154
155__0: vec @(-npthx/2, ckt17y+ckt1to17y)
156frame ckt .
157__1: vec @(0mm, ckt17y)
158frame shield .
159__2: vec @(npthx/2-Cpitch/2, C4y+Cpitch/2)
160frame Cpins .
161frame npth @
162frame outline @
163meas npth.__0 >> npth.__0 -(npthr/2+0.5mm)
164meas __0 >> ckt1pins.__0 factor*cktr/2+0.5mm
165measy shield.__0 << npth.__0 shieldx-factor*shr/2-0.5mm
166measy shield.__0 >> __0 factor*shr+0.7mm
167measx Cpins.__0 -> Cpins.__0 -(Cpitch-Cr/2)
168measx Cpins.__0 >> Cpins.__0 -Cpitch
169meas Cpins.__0 >> Cpins.__0 -Cpitch
170measy Cpins.__0 << npth.__0 -Cpitch/2
171measy Cpins.__0 -> Cpins.__0
172meas ckt.__1 -> ckt.__2 -(factor*cktr/2+0.5mm)
173measx outline.__0 >> outline.__1 PCBy+frontmetaly+1.5mm
174measy outline.__3 >> outline.__1 2.2mm
175meas shield.__0 >> shield.__0 6.5mm
176measy outline.__3 -> npth.__0 0.8mm
177measy outline.__0 >> __0 1.5mm
178measx outline.__6 >> outline.__7 -0.8mm
179measy outline.__6 >> outline.__4 0.8mm
180measy outline.__6 >> outline.__1 (L-face2outletx)/2+3mm
181measy outline.__0 -> npth.__0 -factor*shr
182

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