Age Message
6 years 11 months First functional example, ADC an Framebuffer Test
6 years 11 months Adding PS2, capacitive keyboard examples
7 years 1 day Adding bases to the code generator. Code text edit, fixing input/output ID control, etc.
7 years 11 days Updating prototype of SIE code generator.
7 years 25 days Adding RFM22b Example.
7 years 25 days Adding RFM22b Example.
7 years 30 days First commit for sie code generator project.
7 years 1 month Removing MM lm32 board
7 years 1 month fixing xmode initial delay
7 years 1 month Fixing cai9n loader for lm32 errors
Commit 43de1a582cae639ee5d44fafba2bccd110b9460f, by Carlos Camargo
7 years 1 month lm32 loader
7 years 1 month logic fixed
Commit ece832aa3a3866378a14232abb21e6adc498f9ab, by César Pedraza
7 years 1 month fixed logic for Evalfit peripheral
Commit 5fbd9db02f9bc966892cf290383d940e7e990da4, by César Pedraza
7 years 1 month ..
Commit c48feff62c7e8a7b8a432184839eae88c58f6343, by César Pedraza
7 years 1 month Adding bootloader for lm32
7 years 1 month Removing battery circuit

Adding UMP1: 5V voltage regulator, allowing Input voltages up to 13V

Adding USB - DC jack switching circuit:
When USB cable is plugged in:
USWAA PIN1 = 0V, USWBB PIN2 = 0V, VGate Q2 = 0, VGS Q2 = -USB_5V => Q2 ON VBAT= USB_5V

When DC WALL ADAPTER is pugged in:
USWAA PIN1 = 5V, USWBB PIN2 = 5V, VGate Q2 = 5V, VGS Q2 = 0V ???, => Q2 OFF, VBAT = UMP1 out.

if plugg USB cable and DC wall adapter:

USWAA PIN1 = 5V, USWBB PIN2 = 5V, VGate Q2 = 5V, VGS Q2 = 5V ???, => Q2 OFF, VBAT = UMP1 out.
USB_5V & VBAT are isolated
7 years 1 month Fixing some errors on SAKC Examples
7 years 1 month fixing DRC errors
7 years 1 month Adding SPI serial flash component x25x64mb.lib
7 years 1 month Change ADC from Texas to Microchip MCP3008.

Adding mcp3008 component
Adding SPI seerial flash X25X64MB.
Adding hierarchical label SRAM_CS, we want to use a serial SRAM for FPGA.
7 years 1 month Adding serial flash to FPGA
7 years 1 month Merging J6 and J7 in J67 4x2 connector.
7 years 1 month Connecting FPGA GPIOs to U6 (max3223) allowing RS232 serial communication

Change J6-J7 layout allowing the creation of a serial communication channel between ingenic CPU and FPGA.
Changing LCD analog ground, according to LCD datasheet
7 years 1 month Adding evolvable hardware example
Commit 1f2712e4de97836c6e99779486cad2be794228a6, by Carlos Camargo
7 years 1 month Adding qmake.conf sample file
Commit 5459532f078bf4e35ca36e00c1c5494dbb7ae483, by Carlos Camargo

Branches:
master



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