Date:2010-10-01 16:03:07 (3 years 10 months ago)
Author:Carlos Camargo
Commit:1f2712e4de97836c6e99779486cad2be794228a6
Message:Adding evolvable hardware example

Files: Examples/drivers/blink/Makefile (1 diff)
Examples/ehw4/logic/Makefile (1 diff)
Examples/ehw4/logic/counters.vhd (1 diff)
Examples/ehw4/logic/dpram624x1.ngc (1 diff)
Examples/ehw4/logic/dpram624x31.ngc (1 diff)
Examples/ehw4/logic/dpram624x32.ngc (1 diff)
Examples/ehw4/logic/ehw.ucf (1 diff)
Examples/ehw4/logic/ehw.v (1 diff)
Examples/ehw4/logic/evalfit_peripheral.vhd (1 diff)
Examples/ehw4/logic/mt.vhd (1 diff)
Examples/ehw4/logic/reg_bank.v (1 diff)
Examples/ehw4/src/Makefile (1 diff)
Examples/ehw4/src/funlut.dat (0 diffs)
Examples/ehw4/src/genetic.c (1 diff)
Examples/ehw4/src/genetic.h (1 diff)
Examples/ehw4/src/puertas.dat (0 diffs)
Examples/ehw4/src/sintesishw.h (1 diff)
Examples/ehw4/src/sintesishw_client.c (1 diff)
Examples/ehw4/src/sintesishw_client.h (1 diff)
Examples/ehw4/src/sintesishw_server.c (1 diff)
Examples/ehw4/src/sintesishw_server.h (1 diff)
Examples/ehw4/src/test/Makefile (1 diff)
Examples/ehw4/src/test/enable_irq.c (1 diff)
Examples/ehw4/src/test/enable_rx.c (1 diff)
Examples/ehw4/src/test/jz47xx_gpio.c (1 diff)
Examples/ehw4/src/test/jz47xx_gpio.h (1 diff)
Examples/ehw4/src/test/jz47xx_gpio.o (0 diffs)
Examples/ehw4/src/test/jz47xx_mmap.c (1 diff)
Examples/ehw4/src/test/jz47xx_mmap.h (1 diff)
Examples/ehw4/src/test/jz47xx_mmap.o (0 diffs)
Examples/ehw4/src/test/jz_init_sram.c (1 diff)
Examples/ehw4/src/test/jz_test_gpio.c (1 diff)
Examples/ehw4/src/test/xburst (0 diffs)
Examples/ehw4/src/test/xburst.c (1 diff)
Examples/ehw4/src/test/xburst.h (1 diff)
KICAD_design_files/SAKC_PCB_v2/SAKC.drl (1 diff)
binaries/reflash/Makefile (1 diff)
lm32/logic/sakc/firmware/boot0-serial/Makefile (1 diff)
lm32/logic/sakc/firmware/boot0-serial/image.lst (1 diff)
lm32/logic/sakc/firmware/boot0-serial/image.srec (1 diff)
lm32/logic/sakc/system_tb.v (1 diff)
plasma/bootldr/bootldr.c (2 diffs)
plasma/gpio/Makefile (1 diff)
plasma/logic/ram_image.vhd (4 diffs)

Change Details

Examples/drivers/blink/Makefile
11EXTRA_CFLAGS += -Wall
22CC = mipsel-openwrt-linux-gcc
33OPENWRT_BASE = /home/cain/Embedded/ingenic/sakc/build/openwrt-xburst
4KERNEL_SRC = $(OPENWRT_BASE)/build_dir/linux-xburst_qi_lb60/linux-2.6.32.10/
4KERNEL_SRC = $(OPENWRT_BASE)/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/
55CROSS_COMPILE = mipsel-openwrt-linux-
66
77obj-m += blinker.o
Examples/ehw4/logic/Makefile
1DESIGN = ehw
2PINS = $(DESIGN).ucf
3DEVICE = xc3s500e-VQ100-4
4BGFLAGS = -g TdoPin:PULLNONE -g DonePin:PULLUP \
5                  -g CRC:enable -g StartUpClk:CCLK
6
7SIM_CMD = /opt/cad/modeltech/bin/vsim
8SIM_COMP_SCRIPT = simulation/$(DESIGN)_TB.do
9#SIM_INIT_SCRIPT = simulation/$(DESIGN)_init.do
10SIMGEN_OPTIONS = -p $(FPGA_ARCH) -lang $(LANGUAGE)
11SAKC_IP = 192.168.254.101
12
13SRC = $(DESIGN).v reg_bank.v
14SRC_HDL = evalfit_peripheral.vhd counters.vhd mt.vhd
15all: bits
16
17remake: clean-build all
18
19clean:
20    rm -f *~ */*~ a.out *.log *.key *.edf *.ps trace.dat
21
22clean-build: clean
23    rm -rf build
24
25cleanall: clean
26    rm -rf build $(DESIGN).bit
27
28bits: $(DESIGN).bit
29
30#
31# Synthesis
32#
33build/project.src:
34    @[ -d build ] || mkdir build
35    @rm -f $@
36#If you don't have logicores disable this line
37    cp *ngc build/
38    for i in $(SRC); do echo verilog work ../$$i >> $@; done
39    for i in $(SRC_HDL); do echo VHDL work ../$$i >> $@; done
40
41build/project.xst: build/project.src
42    echo "run" > $@
43    echo "-top $(DESIGN) " >> $@
44    echo "-p $(DEVICE)" >> $@
45    echo "-opt_mode Area" >> $@
46    echo "-opt_level 1" >> $@
47    echo "-ifn project.src" >> $@
48    echo "-ifmt mixed" >> $@
49    echo "-ofn project.ngc" >> $@
50    echo "-ofmt NGC" >> $@
51    echo "-rtlview yes" >> $@
52
53build/project.ngc: build/project.xst $(SRC)
54    cd build && xst -ifn project.xst -ofn project.log
55
56build/project.ngd: build/project.ngc $(PINS)
57    cd build && ngdbuild -p $(DEVICE) project.ngc -uc ../$(PINS)
58
59build/project.ncd: build/project.ngd
60    cd build && map -pr b -p $(DEVICE) project
61
62build/project_r.ncd: build/project.ncd
63    cd build && par -w project project_r.ncd
64
65build/project_r.twr: build/project_r.ncd
66    cd build && trce -v 25 project_r.ncd project.pcf
67
68$(DESIGN).bit: build/project_r.ncd build/project_r.twr
69    cd build && bitgen project_r.ncd -l -w $(BGFLAGS)
70    @mv -f build/project_r.bit $@
71sim:
72    cd simulation; $(SIM_CMD) -do $(DESIGN)_TB.do
73
74upload: $(DESIGN).bit
75    scp $(DESIGN).bit root@$(SAKC_IP):
Examples/ehw4/logic/counters.vhd
1-------------------------------------------------------------------------------
2-- --
3-- MT32 - Mersenne Twister --
4-- Copyright (C) 2007 HT-LAB --
5-- --
6-- Contact : Use feedback form on the website. --
7-- Web: http://www.ht-lab.com --
8-- --
9-- MT32 files are released under the GNU General Public License. --
10-- --
11-------------------------------------------------------------------------------
12-- --
13-- This library is free software; you can redistribute it and/or --
14-- modify it under the terms of the GNU Lesser General Public --
15-- License as published by the Free Software Foundation; either --
16-- version 2.1 of the License, or (at your option) any later version. --
17-- --
18-- This library is distributed in the hope that it will be useful, --
19-- but WITHOUT ANY WARRANTY; without even the implied warranty of --
20-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --
21-- Lesser General Public License for more details. --
22-- --
23-- Full details of the license can be found in the file "copying.txt". --
24-- --
25-- You should have received a copy of the GNU Lesser General Public --
26-- License along with this library; if not, write to the Free Software --
27-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA --
28-- --
29-------------------------------------------------------------------------------
30-- --
31-- Counters, instantiated in top level --
32-------------------------------------------------------------------------------
33LIBRARY ieee;
34USE ieee.std_logic_1164.all;
35USE ieee.std_logic_arith.all;
36USE ieee.std_logic_unsigned.all;
37
38ENTITY counters IS
39   GENERIC(
40      M : integer := 397;
41      N : integer := 623
42   );
43   PORT(
44      clk : IN std_logic;
45      resetn : IN std_logic;
46      ena : IN std_logic;
47      wea : OUT std_logic;
48      kk_cnt : OUT std_logic_vector (9 DOWNTO 0);
49      km_cnt : OUT std_logic_vector (9 DOWNTO 0);
50      kp_cnt : OUT std_logic_vector (9 DOWNTO 0);
51      wr_cnt : OUT std_logic_vector (9 DOWNTO 0)
52   );
53
54END counters ;
55
56--
57ARCHITECTURE rtl OF counters IS
58
59signal kk_cnt_s : std_logic_vector (9 DOWNTO 0);
60signal km_cnt_s : std_logic_vector (9 DOWNTO 0);
61signal kp_cnt_s : std_logic_vector (9 DOWNTO 0);
62
63signal wr_cnt_s : std_logic_vector (9 DOWNTO 0);
64
65BEGIN
66
67process (clk,resetn)
68    begin
69        if (resetn='0') then
70            wea <= '0';
71        elsif (rising_edge(clk)) then
72            wea <= ena; -- wea is delayed by 1 clock cycle to
73        end if; -- prevent writing outside the dpram address
74end process; -- address range (0..623)
75
76
77-------------------------------------------------------------------------------
78-- Write counter which is equal to kk-1
79-- Required to achieve single cycle read/write
80-------------------------------------------------------------------------------
81process (clk,resetn)
82    begin
83        if (resetn='0') then
84            wr_cnt_s <= (others => '1');
85        elsif (rising_edge(clk)) then
86           if (wr_cnt_s = CONV_STD_LOGIC_VECTOR(N,10)) then
87                wr_cnt_s <= (others => '0');
88           elsif ena='1' then
89                wr_cnt_s <= wr_cnt_s + '1';
90           end if;
91        end if;
92end process;
93wr_cnt <= wr_cnt_s;
94
95
96-------------------------------------------------------------------------------
97-- kk Counter
98-------------------------------------------------------------------------------
99process (clk,resetn)
100    begin
101        if (resetn='0') then
102            kk_cnt_s <= (others => '0');
103        elsif (rising_edge(clk)) then
104           if (kk_cnt_s = CONV_STD_LOGIC_VECTOR(N,10)) then
105                kk_cnt_s <= (others => '0');
106           elsif ena='1' then
107                kk_cnt_s <= kk_cnt_s + '1';
108           end if;
109        end if;
110end process;
111kk_cnt <= kk_cnt_s;
112
113-------------------------------------------------------------------------------
114-- kp Counter
115-------------------------------------------------------------------------------
116process (clk,resetn)
117    begin
118        if (resetn='0') then
119            kp_cnt_s <= "0000000001";
120        elsif (rising_edge(clk)) then
121           if (kp_cnt_s = CONV_STD_LOGIC_VECTOR(N,10)) then
122                kp_cnt_s <= (others => '0');
123           elsif ena='1' then
124                kp_cnt_s <= kp_cnt_s + '1';
125           end if;
126        end if;
127end process;
128kp_cnt <= kp_cnt_s;
129
130-------------------------------------------------------------------------------
131-- km Counter
132-------------------------------------------------------------------------------
133process (clk,resetn)
134    begin
135        if (resetn='0') then
136            km_cnt_s <= CONV_STD_LOGIC_VECTOR(M,10);
137        elsif (rising_edge(clk)) then
138           if (km_cnt_s = CONV_STD_LOGIC_VECTOR(N,10)) then
139                km_cnt_s <= (others => '0');
140           elsif ena='1' then
141                km_cnt_s <= km_cnt_s + '1';
142           end if;
143        end if;
144end process;
145km_cnt <= km_cnt_s;
146
147end architecture rtl;
Examples/ehw4/logic/dpram624x1.ngc
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Examples/ehw4/logic/dpram624x31.ngc
1XILINX-XDB 0.1 STUB 0.1 ASCII
2XILINX-XDM V1.4e
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Examples/ehw4/logic/dpram624x32.ngc
1XILINX-XDB 0.1 STUB 0.1 ASCII
2XILINX-XDM V1.4e
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Examples/ehw4/logic/ehw.ucf
1NET clk LOC = "P38";
2NET reset LOC = "P30"; #WARNING change to another pin
3NET led LOC = "P44";
4NET irq_pin LOC = "P71";
5
6
7#ADDRESS BUS
8NET "addr<12>" LOC = "P90";
9NET "addr<11>" LOC = "P91";
10NET "addr<10>" LOC = "P85";
11NET "addr<9>" LOC = "P92";
12NET "addr<8>" LOC = "P94";
13NET "addr<7>" LOC = "P95";
14NET "addr<6>" LOC = "P98";
15NET "addr<5>" LOC = "P3";
16NET "addr<4>" LOC = "P2";
17NET "addr<3>" LOC = "P78";
18NET "addr<2>" LOC = "P79";
19NET "addr<1>" LOC = "P83";
20NET "addr<0>" LOC = "P84";
21
22#DATA BUS
23NET "sram_data<7>" LOC = "P4";
24NET "sram_data<6>" LOC = "P5";
25NET "sram_data<5>" LOC = "P9";
26NET "sram_data<4>" LOC = "P10";
27NET "sram_data<3>" LOC = "P11";
28NET "sram_data<2>" LOC = "P12";
29NET "sram_data<1>" LOC = "P15";
30NET "sram_data<0>" LOC = "P16";
31
32#CONTROL BUS
33NET "nwe" LOC = "P88";
34NET "noe" LOC = "P86";
35NET "ncs" LOC = "P69";
36
37
Examples/ehw4/logic/ehw.v
1`timescale 1ns / 1ps
2module ehw(clk, sram_data, addr, nwe, ncs, noe, reset, led,
3                irq_pin);
4
5    parameter B = (7);
6
7    input clk, addr, nwe, ncs, noe, reset;
8    inout [B:0] sram_data;
9    output led;
10    output irq_pin;
11
12    // synchronize signals
13    reg sncs, snwe;
14    reg [12:0] buffer_addr;
15    reg [B:0] buffer_data;
16     wire led;
17
18    // bram-cpu interfaz
19    reg we;
20    reg w_st=0;
21    reg [B:0] wdBus;
22    reg [B:0] rdBus;
23    wire [12:0] addr;
24    reg [7:0] bae;
25
26
27    // bram-evalfit interfaz
28    wire we_eval, en_ev;
29    wire [63:0] ev_do;
30    wire [63:0] ev_di;
31
32    // Interconnection
33    wire [31:0] mt_rnd;
34    wire [31:0] reg0;
35    wire [31:0] reg1;
36    wire [31:0] reg2;
37    wire [31:0] reg3;
38    wire [31:0] reg4;
39    wire [7:0] status;
40    wire [15:0] error;
41    wire [8:0] evalfit_addr;
42
43    wire en_fit;
44    wire [15:0] max_com;
45    wire [3:0] max_lev;
46    wire [7:0] control;
47
48    reg [7:0] reg_bank [31:0];
49    wire enReg;
50    wire [4:0] address;
51
52// Test : LED blinking
53    reg [25:0] counter;
54    always @(posedge clk) begin
55        if (~reset)
56            counter <= {25{1'b0}};
57        else
58            counter <= counter + 1;
59    end
60    assign led = counter[24];
61
62// Data Bus direction control
63    wire T = ~noe | ncs;
64    assign sram_data = T?8'bZ:rdBus;
65
66// synchronize assignment
67    always @(negedge clk)
68    begin
69        sncs <= ncs;
70        snwe <= nwe;
71        buffer_data <= sram_data;
72        buffer_addr <= addr;
73    end
74
75// write access cpu to bram
76    always @(posedge clk)
77    if(~reset) {w_st, we, wdBus} <= 0;
78      else begin
79        wdBus <= buffer_data;
80        case (w_st)
81          0: begin
82              we <= 0;
83              if(sncs | snwe) w_st <= 1;
84          end
85          1: begin
86            if(~(sncs | snwe)) begin
87              we <= 1;
88              w_st <= 0;
89            end
90            else we <= 0;
91          end
92        endcase
93      end
94
95
96 // Address Decoder
97 // We have 2 memory blocks 1: 512 x 64 bits memory 32kb = 4kB 0000 - 0FFF buffer_addr[12] = 0
98 // 2: Register Bank 1000 - 101F buffer_addr[12] = 1
99
100 // SIE has an eight bits data bus, this module generate the required signals to create a 64 bits word.
101  always @(buffer_addr)
102   begin
103     if(~buffer_addr[12]) begin
104        case (buffer_addr[2:0])
105          0: bae <= 8'h01;
106          1: bae <= 8'h02;
107          2: bae <= 8'h04;
108          3: bae <= 8'h08;
109          4: bae <= 8'h10;
110          5: bae <= 8'h20;
111          6: bae <= 8'h40;
112          7: bae <= 8'h80;
113        endcase
114     end
115     else
116       bae <= 8'h00;
117   end
118    wire en1, en2; // enable memory signals
119    assign en0 = bae[0] | bae[1] | bae[2] | bae[3];
120    assign en1 = bae[4] | bae[5] | bae[6] | bae[7];
121
122    reg[31:0] DIA_Aux;
123    always @ (posedge clk) begin
124        if (bae[0]) DIA_Aux[7:0] = wdBus[7:0];
125        if (bae[1]) DIA_Aux[15:8] = wdBus[7:0];
126        if (bae[2]) DIA_Aux[23:16] = wdBus[7:0];
127        if (bae[3]) DIA_Aux[31:24] = wdBus[7:0];
128        if (bae[4]) DIA_Aux[7:0] = wdBus[7:0];
129        if (bae[5]) DIA_Aux[15:8] = wdBus[7:0];
130        if (bae[6]) DIA_Aux[23:16] = wdBus[7:0];
131        if (bae[7]) DIA_Aux[31:24] = wdBus[7:0];
132    end
133
134    reg [2:0] state, nextstate; //FSM for write in 32bit mode to memory
135    wire we0, we1;
136    wire nreset;
137    assign nreset = ~reset;
138    parameter S0 = 3'b000;
139    parameter S1 = 3'b001;
140    parameter S2 = 3'b010;
141
142  always @ (posedge clk, posedge nreset)
143    if (nreset) state <= S0;
144    else state <= nextstate;
145    // next state logic
146    always@(*)
147      case (state)
148        S0:if (bae[3]&we) nextstate = S1;
149           else
150             if (bae[7]&we) nextstate = S2;
151             else nextstate = S0;
152        S1: nextstate = S0;
153        S2: nextstate = S0;
154        default: nextstate = S0;
155      endcase
156  // output logic
157  assign we0 = (state == S1);
158  assign we1 = (state == S2);
159
160// Read control
161    reg [7:0] MemDOA;
162    wire [63:0] DOA_Aux;
163
164    always @(posedge clk)
165      if(~reset)begin
166         rdBus = 8'h00;
167            end
168      else begin
169    if(enReg)
170      rdBus = reg_bank[address];
171      else
172                    rdBus = MemDOA[7:0];
173      end
174// memory output mux
175  always @(buffer_addr[2:0])
176    case (buffer_addr[2:0])
177      0 : MemDOA = DOA_Aux[7:0];
178      1 : MemDOA = DOA_Aux[15:8];
179      2 : MemDOA = DOA_Aux[23:16];
180      3 : MemDOA = DOA_Aux[31:24];
181      4 : MemDOA = DOA_Aux[39:32];
182      5 : MemDOA = DOA_Aux[47:40];
183      6 : MemDOA = DOA_Aux[55:48];
184      7 : MemDOA = DOA_Aux[63:56];
185    default: MemDOA = 8'h00;
186  endcase
187
188// Store Inputs
189    always @(posedge clk)
190     begin
191      if(enReg) begin
192    reg_bank[20] = error[7:0];
193    reg_bank[21] = error[15:8];
194    reg_bank[22] = status[7:0];
195    reg_bank[24] = mt_rnd[7:0];
196    reg_bank[25] = mt_rnd[15:8];
197    reg_bank[26] = mt_rnd[23:16];
198    reg_bank[27] = mt_rnd[31:24];
199      end
200     end
201
202    assign address[4:0] = buffer_addr[4:0];
203    assign enReg = buffer_addr[12];
204
205    assign reg0[7:0] = reg_bank[0];
206    assign reg0[15:8] = reg_bank[1];
207    assign reg0[23:16] = reg_bank[2];
208    assign reg0[31:24] = reg_bank[3];
209    assign reg1[7:0] = reg_bank[4];
210    assign reg1[15:8] = reg_bank[5];
211    assign reg1[23:16] = reg_bank[6];
212    assign reg1[31:24] = reg_bank[7];
213    assign reg2[7:0] = reg_bank[8];
214    assign reg2[15:8] = reg_bank[9];
215    assign reg2[23:16] = reg_bank[10];
216    assign reg2[31:24] = reg_bank[11];
217    assign reg3[7:0] = reg_bank[12];
218    assign reg3[15:8] = reg_bank[13];
219    assign reg3[23:16] = reg_bank[14];
220    assign reg3[31:24] = reg_bank[15];
221    assign reg4[7:0] = reg_bank[16];
222    assign reg4[15:8] = reg_bank[17];
223    assign reg4[23:16] = reg_bank[18];
224    assign reg4[31:24] = reg_bank[19];
225
226    assign max_lev = reg_bank[28];
227    assign control = reg_bank[29];
228    assign max_com[7:0] = reg_bank[30];
229    assign max_com[15:8] = reg_bank[31];
230    // Write control
231    always @(negedge clk)
232    if(we & enReg) begin
233      case (address)
234         0: reg_bank[0] = wdBus;
235         1: reg_bank[1] = wdBus;
236         2: reg_bank[2] = wdBus;
237         3: reg_bank[3] = wdBus;
238         4: reg_bank[4] = wdBus;
239         5: reg_bank[5] = wdBus;
240         6: reg_bank[6] = wdBus;
241         7: reg_bank[7] = wdBus;
242         8: reg_bank[8] = wdBus;
243         9: reg_bank[9] = wdBus;
244         10: reg_bank[10] = wdBus;
245         11: reg_bank[11] = wdBus;
246         12: reg_bank[12] = wdBus;
247         13: reg_bank[13] = wdBus;
248         14: reg_bank[14] = wdBus;
249         15: reg_bank[15] = wdBus;
250         16: reg_bank[16] = wdBus;
251         17: reg_bank[17] = wdBus;
252         18: reg_bank[18] = wdBus;
253         19: reg_bank[19] = wdBus;
254         28: reg_bank[28] = wdBus;
255         29: reg_bank[29] = wdBus;
256         30: reg_bank[30] = wdBus;
257         31: reg_bank[31] = wdBus;
258      endcase
259    end
260
261RAMB16_S36_S36 #(.INIT_00(256'hABCDEF00_00000000_00000000_00000000_00000000_00000000_00000000_76543210) )
262    mem0 ( .CLKA(~clk), .ENA(en0), .SSRA(1'b0), .ADDRA(buffer_addr[11:3]), .WEA(we0), .DIA(DIA_Aux[31:0]), .DIPA(0'b0), .DOA(DOA_Aux[31:0]),
263           .CLKB(~clk), .ENB(en_ev), .SSRB(1'b0), .ADDRB(evalfit_addr), .WEB(we_eval), .DIB(ev_do[31:0]), .DIPB(0'b0), .DOB(ev_di[31:0]));
264
265RAMB16_S36_S36 mem1( .CLKA(~clk), .ENA(en1), .SSRA(1'b0), .ADDRA(buffer_addr[11:3]), .WEA(we1), .DIA(DIA_Aux[31:0]), .DIPA(0'b0), .DOA(DOA_Aux[63:32]),
266                  .CLKB(~clk), .ENB(en_ev),.SSRB(1'b0), .ADDRB(evalfit_addr), .WEB(we_eval), .DIB(ev_do[63:32]), .DIPB(0'b0), .DOB(ev_di[63:32]));
267
268// evalfit_peripheral
269evalfit_peripheral evalfit( .clk(clk), .reset(~reset), .habilita(control[0]), .maxcombs(max_com), .nivel_max(max_lev),
270                            .peripheral_mem_in(ev_di), .peripheral_mem_en(en_eval), .peripheral_mem_out(ev_do), .peripheral_mem_we(we_eval),
271                            .peripheral_mem_addr(evalfit_addr), .evalfit3_estado(status), .errores(error),
272                            .fin_ack(irq_pin), .reg0_s(reg0), .reg1_s(reg1), .reg2_s(reg2), .reg3_s(reg3), .reg4_s(reg4));
273
274// MersenneTwister
275 mt_mem random( .clk(clk), .ena(1'b1), .resetn(reset), .random(mt_rnd));
276
277endmodule
278
Examples/ehw4/logic/evalfit_peripheral.vhd
1-- 07/11/08
2-- Evalfit_peripheral
3-- Evalua un arbol de 5 pentarboles, por ahora es valido hasta para *** 14 variables ***
4-- Funciona hasta con 14 vars.
5-- mapa:
6    -- 0 - 0x3F Cromosoma
7    -- 0x40 - 0x13F Objetivo. 16384 bits. Se empieza por el bit 0 MSB.
8
9
10-- Cromosoma en memoria
11    -- bit bit Contenido
12    -- 28 a 31 Nivel del arbol
13    -- 32 a 47 LUT o tabla del arbol
14    -- 48 a 63 Variables de entrada del arbol (4 bits por variable)
15
16library IEEE;
17use IEEE.STD_LOGIC_1164.ALL;
18use IEEE.STD_LOGIC_ARITH.ALL;
19use IEEE.STD_LOGIC_UNSIGNED.ALL;---- Uncomment the following library declaration if instantiating
20---- any Xilinx primitives in this code.
21library UNISIM;
22use UNISIM.VComponents.all;
23
24entity evalfit_peripheral is
25    Port ( clk, reset, habilita: in STD_LOGIC;
26            maxcombs : in STD_LOGIC_VECTOR (0 to 15);
27              nivel_max : in STD_LOGIC_VECTOR (0 to 3);
28                       peripheral_mem_in : in STD_LOGIC_VECTOR (0 to 63);
29            peripheral_mem_en : out std_logic;
30                       peripheral_mem_out : out STD_LOGIC_VECTOR (0 to 63);
31            peripheral_mem_we : out STD_LOGIC;
32            peripheral_mem_addr : out STD_LOGIC_VECTOR (0 to 8);
33            evalfit3_estado : out std_logic_vector(0 to 7);
34            errores : out STD_LOGIC_VECTOR (0 to 15);
35            fin_ack : out std_logic;
36            reg0_s : out STD_LOGIC_VECTOR (0 to 31);
37            reg1_s : out STD_LOGIC_VECTOR (0 to 31);
38            reg2_s : out STD_LOGIC_VECTOR (0 to 31);
39            reg3_s : out STD_LOGIC_VECTOR (0 to 31);
40            reg4_s : out STD_LOGIC_VECTOR (0 to 31)
41            );
42end evalfit_peripheral;
43
44architecture Behavioral of evalfit_peripheral is
45
46function mux16(sel: in std_logic_vector(0 to 3); ent: in std_logic_vector(0 to 15)) return std_logic is
47begin
48  case sel is
49    when "0000" => return ent(15);
50    when "0001" => return ent(14);
51    when "0010" => return ent(13);
52    when "0011" => return ent(12);
53    when "0100" => return ent(11);
54    when "0101" => return ent(10);
55    when "0110" => return ent(9);
56    when "0111" => return ent(8);
57    when "1000" => return ent(7);
58    when "1001" => return ent(6);
59    when "1010" => return ent(5);
60    when "1011" => return ent(4);
61    when "1100" => return ent(3);
62    when "1101" => return ent(2);
63    when "1110" => return ent(1);
64    when others => return ent(0);
65  end case;
66end mux16;
67
68function mux4(sel: in std_logic_vector(0 to 1); ent: in std_logic_vector(0 to 3)) return std_logic is
69begin
70  case sel is
71    when "00" => return ent(3);
72    when "01" => return ent(2);
73    when "10" => return ent(1);
74    when others => return ent(0);
75  end case;
76end mux4;
77
78-- senales para evaluar funciones
79signal reg0, reg1, reg2, reg3, reg4, regn3, regn4:STD_LOGIC_VECTOR (0 to 31);
80signal reg0_sig, reg1_sig, reg2_sig, reg3_sig, reg4_sig, regn3_sig, regn4_sig :STD_LOGIC_VECTOR (0 to 31);
81signal sel_aux0, sel_aux1, sel_aux2, sel_aux3, sel_aux4, sel_auxn3, sel_auxn4, sal_arbol, minter_n3, minter_n4 : std_logic_vector(0 to 3);
82signal salida_s, fin_ack_sig, fifow_wrreq_sig: std_logic;
83signal entrada, errores_aux, errores_sig, salida_nivel : STD_LOGIC_VECTOR (0 to 15);
84
85-- senales para las memorias, guardan resultados de arboles intermedios
86signal DO_n2, DI_n2, DO_n3, DI_n3, DO_n4, DI_n4: std_logic_vector(3 downto 0);
87signal ADDR_n2, ADDR_n3, ADDR_n4: std_logic_vector(0 to 13);
88signal WE_n2, WE_n3, WE_n4: std_logic_vector(3 downto 0);
89signal WE_n2_sig, WE_n3_sig, WE_n4_sig: std_logic_vector(3 downto 0);
90signal EN_n2, SSR, EN_n3, EN_n4: std_logic;
91
92-- senales para el control
93type estado is (reset1, reset2, inicio, proceso, n1, n2, n3, n4, precuenta, cuenta, final, final2);
94signal ep, es: estado;
95signal nivel, nivel_sig, nivel_reg: std_logic_vector(0 to 3);
96signal c1, c1_sig, c2, c2_sig, c3, c3_sig, c4, c4_sig: std_logic_vector(0 to 1);
97signal conta, conta_sig, conta2, conta2_sig: std_logic_vector(0 to 15);
98signal estado_evalf3, estado_evalf3_sig: std_logic_vector(0 to 7);
99signal peripheral_mem_addr_aux, peripheral_mem_addr_sig, peripheral_mem_addr_crom_sig,peripheral_mem_addr_crom : STD_LOGIC_VECTOR (0 to 8);
100
101begin
102
103
104process(ep, habilita, reg0, reg1, reg2, reg3, reg4, regn3, regn4, nivel, c1, c2, c3, c4, conta,
105        salida_s, salida_nivel, WE_n2, WE_n3, WE_n4, nivel_max,
106        maxcombs, peripheral_mem_in, peripheral_mem_addr_crom, peripheral_mem_addr_aux)
107begin
108es <= reset1;
109WE_n2_sig <= "0000";
110WE_n3_sig <= "0000";
111WE_n4_sig <= "0000";
112reg0_sig <= reg0;
113reg1_sig <= reg1;
114reg2_sig <= reg2;
115reg3_sig <= reg3;
116reg4_sig <= reg4;
117regn3_sig <= regn3;
118regn4_sig <= regn4;
119conta_sig <= conta;
120conta2_sig <= conta2;
121c1_sig <= c1;
122c2_sig <= c2;
123c3_sig <= c3;
124c4_sig <= c4;
125DI_n2 <= "0000";
126DI_n3 <= "0000";
127DI_n4 <= "0000";
128fin_ack_sig <= '0';
129peripheral_mem_addr_sig <= peripheral_mem_addr_aux;
130peripheral_mem_addr_crom_sig <= peripheral_mem_addr_crom;
131peripheral_mem_we <= '0';
132peripheral_mem_en <= '0';
133errores_sig <= errores_aux;
134nivel_sig <= nivel_reg;
135estado_evalf3_sig <= x"FF";
136case ep is
137    when reset1 => --poner la memoria a 0000
138            WE_n2_sig <= "1111";
139            WE_n3_sig <= "1111";
140            WE_n4_sig <= "1111";
141            conta2_sig <= (others => '0');
142            es <= reset2;
143    when reset2 =>
144            DI_n2 <= "0000";
145            DI_n3 <= "0000";
146            DI_n4 <= "0000";
147            if(conta2 = maxcombs)then
148                WE_n2_sig <= "0000";
149                WE_n3_sig <= "0000";
150                WE_n4_sig <= "0000";
151                conta2_sig <= (others => '0');
152                es <= inicio;
153            else
154                WE_n2_sig <= "1111";
155                WE_n3_sig <= "1111";
156                WE_n4_sig <= "1111";
157                conta2_sig <= conta2 + 1;
158                es <= reset2;
159            end if;
160
161    when inicio =>
162            if(habilita = '0') then
163                es <= inicio;
164                conta_sig <= (others => '0');
165                conta2_sig <= (others => '0');
166                peripheral_mem_addr_sig <= (others => '0');
167                c1_sig <= "00";
168                c2_sig <= "00";
169                c3_sig <= "00";
170                c4_sig <= "00";
171                errores_sig <= x"0000";
172            else
173                es <= proceso;
174                peripheral_mem_en <= '1';
175            end if;
176            estado_evalf3_sig <= x"01";
177
178    when proceso =>
179            peripheral_mem_en <= '1';
180            if(nivel = "0001")then
181                case c1 is
182                    when "00" => reg0_sig <= peripheral_mem_in(32 to 63);
183                    when "01" => reg1_sig <= peripheral_mem_in(32 to 63);
184                    when "10" => reg2_sig <= peripheral_mem_in(32 to 63);
185                    when others => reg3_sig <= peripheral_mem_in(32 to 63);
186                end case;
187                es <= n1;
188            elsif(nivel = "0010")then
189                reg4_sig <= peripheral_mem_in(32 to 63);
190                WE_n2_sig(conv_integer(c2)) <= '1';
191                DI_n2(conv_integer(c2)) <= salida_nivel(2);
192                es <= n2;
193            elsif(nivel = "0011")then
194                regn3_sig <= peripheral_mem_in(32 to 63);
195                WE_n3_sig(conv_integer(c3)) <= '1';
196                DI_n3(conv_integer(c3)) <= salida_nivel(3);
197                es <= n3;
198            elsif(nivel = "0100")then
199                regn4_sig <= peripheral_mem_in(32 to 63);
200                WE_n4_sig(conv_integer(c4)) <= '1';
201                DI_n4(conv_integer(c4)) <= salida_nivel(4);
202                es <= n4;
203            elsif(nivel = "1111")then
204                es <= final2;
205            end if;
206            peripheral_mem_addr_sig <= peripheral_mem_addr_aux + 1;
207            peripheral_mem_addr_crom_sig <= peripheral_mem_addr_aux + 1;
208            nivel_sig <= nivel;
209            estado_evalf3_sig <= x"02";
210
211    when n1 =>
212            peripheral_mem_en <= '1';
213            c1_sig <= c1 + 1;
214            peripheral_mem_addr_sig <= peripheral_mem_addr_aux;
215            es <= proceso;
216            estado_evalf3_sig <= x"03";
217
218    when n2 =>
219            WE_n2_sig(conv_integer(c2)) <= '1';
220            DI_n2(conv_integer(c2)) <= salida_nivel(2);
221            peripheral_mem_en <= '1';
222            peripheral_mem_addr_sig <= "001000000" + ('0' & conta(2 to 9));-- esto es para que evalue el pentarbol y guarde en memoria la salida
223            es <= precuenta;
224            conta2_sig <= (others => '0');
225            estado_evalf3_sig <= x"04";
226
227    when n3 =>
228            WE_n3_sig(conv_integer(c3)) <= '1';
229            DI_n3(conv_integer(c3)) <= salida_nivel(3);
230            peripheral_mem_en <= '1';
231            peripheral_mem_addr_sig <= "001000000" + ('0' & conta(2 to 9));--
232            es <= precuenta;
233            conta2_sig <= (others => '0');
234            estado_evalf3_sig <= x"05";
235
236    when n4 =>
237            WE_n4_sig(conv_integer(c4)) <= '1';
238            DI_n4(conv_integer(c4)) <= salida_nivel(4);
239            peripheral_mem_en <= '1';
240            peripheral_mem_addr_sig <= "001000000" + ('0' & conta(2 to 9));--
241            es <= precuenta;
242            conta2_sig <= (others => '0');
243            estado_evalf3_sig <= x"06";
244
245    when precuenta =>
246            WE_n2_sig <= WE_n2;
247            WE_n3_sig <= WE_n3;
248            WE_n4_sig <= WE_n4;
249            DI_n2(conv_integer(c2)) <= salida_nivel(2);
250            DI_n3(conv_integer(c3)) <= salida_nivel(3);
251            DI_n4(conv_integer(c4)) <= salida_nivel(4);
252            peripheral_mem_en <= '1';
253            peripheral_mem_addr_sig <= "001000000" + ('0' & conta2(2 to 9));
254            conta_sig <= conta;
255            conta2_sig <= conta + 1;
256            es <= cuenta;
257            estado_evalf3_sig <= x"07";
258
259    when cuenta =>
260            DI_n2(conv_integer(c2)) <= salida_nivel(2);
261            DI_n3(conv_integer(c3)) <= salida_nivel(3);
262            DI_n4(conv_integer(c4)) <= salida_nivel(4);
263            peripheral_mem_en <= '1';
264            if(conta = maxcombs)then
265                WE_n2_sig <= "0000";
266                WE_n3_sig <= "0000";
267                WE_n4_sig <= "0000";
268                conta_sig <= (others => '0');
269                conta2_sig <= (others => '0');
270                peripheral_mem_addr_sig <= peripheral_mem_addr_crom; --direccion de mem donde esta el cromosoma
271                es <= final;
272            else
273                WE_n2_sig <= WE_n2;
274                WE_n3_sig <= WE_n3;
275                WE_n4_sig <= WE_n4;
276                conta_sig <= conta + 1;
277                conta2_sig <= conta2 + 1;
278                peripheral_mem_addr_sig <= "001000000" + ('0' & conta2(2 to 9));--crear señal conta futura
279                if(conta(10 to 15) = "111111")then
280                    es <= precuenta;
281                else
282                    es <= cuenta;
283                end if;
284            end if;
285            if(nivel_reg = nivel_max)then
286                if(salida_nivel(conv_integer(nivel_max)) = peripheral_mem_in(conv_integer(conta(10 to 15))))then
287                    errores_sig <= errores_aux;
288                else
289                    errores_sig <= errores_aux + 1;
290                end if;
291            else
292                errores_sig <= errores_aux;
293            end if;
294
295            estado_evalf3_sig <= x"08";
296
297    when final =>
298             if(nivel_reg = "0010")then
299                c2_sig <= c2 + 1;
300            elsif(nivel_reg = "0011")then
301                c3_sig <= c3 + 1;
302            elsif(nivel_reg = "0100")then
303                c4_sig <= c4 + 1;
304            end if;
305            peripheral_mem_en <= '1';
306            peripheral_mem_addr_sig <= peripheral_mem_addr_crom;
307            es <= proceso;
308            estado_evalf3_sig <= x"09";
309
310    when final2 =>
311            if(habilita = '1') then
312                es <= final2;
313            else
314                es <= inicio;
315            end if;
316            fin_ack_sig <= '1';
317            estado_evalf3_sig <= x"0A";
318    when others => es <= inicio;
319
320    end case;
321end process;
322
323
324process(clk, reset)
325begin
326    if(reset = '1')then
327        ep <= reset1;
328        c1 <= "00";
329        c2 <= "00";
330        c3 <= "00";
331        c4 <= "00";
332        WE_n2 <= "0000";
333        WE_n3 <= "0000";
334        WE_n4 <= "0000";
335        reg0 <= x"00000000";
336        reg1 <= x"00000000";
337        reg2 <= x"00000000";
338        reg3 <= x"00000000";
339        reg4 <= x"00000000";
340        regn3 <= x"00000000";
341        regn4 <= x"00000000";
342        conta <= (others => '0');
343        conta2 <= (others => '0');
344        fin_ack <= '0';
345        peripheral_mem_addr_aux <= "000000000";
346         peripheral_mem_addr_crom <= "000000000";
347        errores_aux <= (others => '0');
348        nivel_reg <= "0000";
349        estado_evalf3 <= x"00";
350    elsif(rising_edge(clk))then
351        ep <= es;
352        c1 <= c1_sig;
353        c2 <= c2_sig;
354        c3 <= c3_sig;
355        c4 <= c4_sig;
356        WE_n2 <= WE_n2_sig;
357        WE_n3 <= WE_n3_sig;
358        WE_n4 <= WE_n4_sig;
359        reg0 <= reg0_sig;
360        reg1 <= reg1_sig;
361        reg2 <= reg2_sig;
362        reg3 <= reg3_sig;
363        reg4 <= reg4_sig;
364        regn3 <= regn3_sig;
365        regn4 <= regn4_sig;
366        conta <= conta_sig;
367        conta2 <= conta2_sig;
368        fin_ack <= fin_ack_sig;
369        peripheral_mem_addr_aux <= peripheral_mem_addr_sig;
370        peripheral_mem_addr_crom <= peripheral_mem_addr_crom_sig;
371        errores_aux <= errores_sig;
372        nivel_reg <= nivel_sig;
373        estado_evalf3 <= estado_evalf3_sig;
374    end if;
375end process;
376
377process(nivel_reg, conta, conta2)
378begin
379case nivel_reg is
380    when "0000" =>
381        ADDR_n2 <= conta(2 to 15);
382        ADDR_n3 <= conta(2 to 15);
383        ADDR_n4 <= conta(2 to 15);
384    when "0010" =>
385        ADDR_n2 <= conta(2 to 15);
386        ADDR_n3 <= conta(2 to 15);
387        ADDR_n4 <= conta(2 to 15);
388    when "0011" =>
389        ADDR_n2 <= conta2(2 to 15);
390        ADDR_n3 <= conta(2 to 15);
391        ADDR_n4 <= conta(2 to 15);
392    when "0100" =>
393        ADDR_n2 <= conta(2 to 15);
394        ADDR_n3 <= conta2(2 to 15);
395        ADDR_n4 <= conta(2 to 15);
396    when others =>
397        ADDR_n2 <= conta2(2 to 15);
398        ADDR_n3 <= conta2(2 to 15);
399        ADDR_n4 <= conta2(2 to 15);
400end case;
401
402end process;
403
404
405errores <= errores_aux;
406peripheral_mem_addr <= peripheral_mem_addr_aux;
407nivel <= peripheral_mem_in(28 to 31);
408EN_n2 <= '1';
409EN_n3 <= '1';
410EN_n4 <= '1';
411SSR <= '0';
412minter_n3 <= DO_n2;
413minter_n4 <= DO_n3;
414entrada <= conta;
415
416evalfit3_estado <= estado_evalf3;
417reg0_s <= reg0;
418reg1_s <= reg1;
419reg2_s <= reg2;
420reg3_s <= reg3;
421reg4_s <= reg4;
422salida_nivel(1) <= sal_arbol(3);
423
424sel_aux0(3) <= mux16(reg0(28 to 31), entrada);
425sel_aux0(2) <= mux16(reg0(24 to 27), entrada);
426sel_aux0(1) <= mux16(reg0(20 to 23), entrada);
427sel_aux0(0) <= mux16(reg0(16 to 19), entrada);
428sal_arbol(3) <= mux16(sel_aux0, reg0(0 to 15)); -- reg0(0 to 15) = dato_lut
429
430sel_aux1(3) <= mux16(reg1(28 to 31), entrada);
431sel_aux1(2) <= mux16(reg1(24 to 27), entrada);
432sel_aux1(1) <= mux16(reg1(20 to 23), entrada);
433sel_aux1(0) <= mux16(reg1(16 to 19), entrada);
434sal_arbol(2) <= mux16(sel_aux1, reg1(0 to 15));
435
436sel_aux2(3) <= mux16(reg2(28 to 31), entrada);
437sel_aux2(2) <= mux16(reg2(24 to 27), entrada);
438sel_aux2(1) <= mux16(reg2(20 to 23), entrada);
439sel_aux2(0) <= mux16(reg2(16 to 19), entrada);
440sal_arbol(1) <= mux16(sel_aux2, reg2(0 to 15));
441
442sel_aux3(3) <= mux16(reg3(28 to 31), entrada);
443sel_aux3(2) <= mux16(reg3(24 to 27), entrada);
444sel_aux3(1) <= mux16(reg3(20 to 23), entrada);
445sel_aux3(0) <= mux16(reg3(16 to 19), entrada);
446sal_arbol(0) <= mux16(sel_aux3, reg3(0 to 15));
447
448sel_aux4(3) <= mux4(reg4(30 to 31), sal_arbol); --arbol de 2do nivel
449sel_aux4(2) <= mux4(reg4(26 to 27), sal_arbol);
450sel_aux4(1) <= mux4(reg4(22 to 23), sal_arbol);
451sel_aux4(0) <= mux4(reg4(18 to 19), sal_arbol);
452salida_nivel(2) <= mux16(sel_aux4, reg4(0 to 15));
453
454sel_auxn3(3) <= mux4(regn3(30 to 31), minter_n3); --arboles de 3er nivel
455sel_auxn3(2) <= mux4(regn3(26 to 27), minter_n3);
456sel_auxn3(1) <= mux4(regn3(22 to 23), minter_n3);
457sel_auxn3(0) <= mux4(regn3(18 to 19), minter_n3);
458salida_nivel(3) <= mux16(sel_auxn3, regn3(0 to 15));
459
460sel_auxn4(3) <= mux4(regn4(30 to 31), minter_n4); --arboles de 4to nivel
461sel_auxn4(2) <= mux4(regn4(26 to 27), minter_n4);
462sel_auxn4(1) <= mux4(regn4(22 to 23), minter_n4);
463sel_auxn4(0) <= mux4(regn4(18 to 19), minter_n4);
464salida_nivel(4) <= mux16(sel_auxn4, regn4(0 to 15));
465
466ram_nivel20:RAMB16_S1 port map(DO => DO_n2(3 downto 3), ADDR => ADDR_n2, CLK => clk, DI => DI_n2(3 downto 3), EN => EN_n2, SSR => SSR, WE => WE_n2(3));
467ram_nivel21:RAMB16_S1 port map(DO => DO_n2(2 downto 2), ADDR => ADDR_n2, CLK => clk, DI => DI_n2(2 downto 2), EN => EN_n2, SSR => SSR, WE => WE_n2(2));
468ram_nivel22:RAMB16_S1 port map(DO => DO_n2(1 downto 1), ADDR => ADDR_n2, CLK => clk, DI => DI_n2(1 downto 1), EN => EN_n2, SSR => SSR, WE => WE_n2(1));
469ram_nivel23:RAMB16_S1 port map(DO => DO_n2(0 downto 0), ADDR => ADDR_n2, CLK => clk, DI => DI_n2(0 downto 0), EN => EN_n2, SSR => SSR, WE => WE_n2(0));
470
471ram_nivel30:RAMB16_S1 port map(DO => DO_n3(3 downto 3), ADDR => ADDR_n3, CLK => clk, DI => DI_n3(3 downto 3), EN => EN_n3, SSR => SSR, WE => WE_n3(3));
472ram_nivel31:RAMB16_S1 port map(DO => DO_n3(2 downto 2), ADDR => ADDR_n3, CLK => clk, DI => DI_n3(2 downto 2), EN => EN_n3, SSR => SSR, WE => WE_n3(2));
473ram_nivel32:RAMB16_S1 port map(DO => DO_n3(1 downto 1), ADDR => ADDR_n3, CLK => clk, DI => DI_n3(1 downto 1), EN => EN_n3, SSR => SSR, WE => WE_n3(1));
474ram_nivel33:RAMB16_S1 port map(DO => DO_n3(0 downto 0), ADDR => ADDR_n3, CLK => clk, DI => DI_n3(0 downto 0), EN => EN_n3, SSR => SSR, WE => WE_n3(0));
475
476ram_nivel40:RAMB16_S1 port map(DO => DO_n4(3 downto 3), ADDR => ADDR_n4, CLK => clk, DI => DI_n4(3 downto 3), EN => EN_n4, SSR => SSR, WE => WE_n4(3));
477ram_nivel41:RAMB16_S1 port map(DO => DO_n4(2 downto 2), ADDR => ADDR_n4, CLK => clk, DI => DI_n4(2 downto 2), EN => EN_n4, SSR => SSR, WE => WE_n4(2));
478ram_nivel42:RAMB16_S1 port map(DO => DO_n4(1 downto 1), ADDR => ADDR_n4, CLK => clk, DI => DI_n4(1 downto 1), EN => EN_n4, SSR => SSR, WE => WE_n4(1));
479ram_nivel43:RAMB16_S1 port map(DO => DO_n4(0 downto 0), ADDR => ADDR_n4, CLK => clk, DI => DI_n4(0 downto 0), EN => EN_n4, SSR => SSR, WE => WE_n4(0));
480
481end Behavioral;
482
Examples/ehw4/logic/mt.vhd
1-------------------------------------------------------------------------------
2-- --
3-- MT32 - Mersenne Twister --
4-- Copyright (C) 2007 HT-LAB --
5-- --
6-- Contact : Use feedback form on the website. --
7-- Web: http://www.ht-lab.com --
8-- --
9-- MT32 files are released under the GNU General Public License. --
10-- --
11-------------------------------------------------------------------------------
12-- --
13-- This library is free software; you can redistribute it and/or --
14-- modify it under the terms of the GNU Lesser General Public --
15-- License as published by the Free Software Foundation; either --
16-- version 2.1 of the License, or (at your option) any later version. --
17-- --
18-- This library is distributed in the hope that it will be useful, --
19-- but WITHOUT ANY WARRANTY; without even the implied warranty of --
20-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --
21-- Lesser General Public License for more details. --
22-- --
23-- Full details of the license can be found in the file "copying.txt". --
24-- --
25-- You should have received a copy of the GNU Lesser General Public --
26-- License along with this library; if not, write to the Free Software --
27-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA --
28-- --
29-------------------------------------------------------------------------------
30-- --
31-- Top Level (Synthesis) --
32-------------------------------------------------------------------------------
33LIBRARY ieee;
34USE ieee.std_logic_1164.all;
35USE ieee.std_logic_unsigned.all;
36USE ieee.std_logic_arith.all;
37
38ENTITY mt_mem IS
39   PORT(
40      clk : IN std_logic;
41      ena : IN std_logic;
42      resetn : IN std_logic;
43      random : OUT std_logic_vector (31 DOWNTO 0)
44   );
45
46END mt_mem ;
47
48LIBRARY ieee;
49
50ARCHITECTURE struct OF mt_mem IS
51
52   -- Architecture declarations
53
54   -- internal signal declarations
55    signal kk_cnt : std_logic_vector(9 downto 0);
56    signal km_cnt : std_logic_vector(9 downto 0);
57    signal kp_cnt : std_logic_vector(9 downto 0);
58    signal mt_kk31 : std_logic_vector(0 downto 0);
59    signal mt_kk_s : std_logic_vector(31 downto 0);
60    signal mt_km : std_logic_vector(31 downto 0);
61    signal mt_kp : std_logic_vector(30 downto 0);
62    signal wea : std_logic;
63    signal wea_s : std_logic_vector(0 downto 0);
64    signal wr_cnt : std_logic_vector(9 downto 0);
65
66
67    signal xor1_s : std_logic_vector(31 downto 0);
68    signal xor2_s : std_logic_vector(31 downto 0);
69    signal xor3_s : std_logic_vector(31 downto 0);
70    signal y_s : std_logic_vector(31 downto 0);
71    signal mag01_s : std_logic_vector(31 downto 0);
72
73   -- Component Declarations
74   COMPONENT counters
75   GENERIC (
76      M : integer := 397;
77      N : integer := 623
78   );
79   PORT (
80      clk : IN std_logic ;
81      resetn : IN std_logic ;
82      ena : IN std_logic ;
83      wea : OUT std_logic ;
84      kk_cnt : OUT std_logic_vector (9 DOWNTO 0);
85      km_cnt : OUT std_logic_vector (9 DOWNTO 0);
86      kp_cnt : OUT std_logic_vector (9 DOWNTO 0);
87      wr_cnt : OUT std_logic_vector (9 DOWNTO 0)
88   );
89   END COMPONENT;
90   COMPONENT dpram624x1
91   PORT (
92      addra : IN std_logic_VECTOR (9 DOWNTO 0);
93      addrb : IN std_logic_VECTOR (9 DOWNTO 0);
94      clka : IN std_logic;
95      clkb : IN std_logic;
96      dina : IN std_logic_VECTOR (0 DOWNTO 0);
97      wea : IN std_logic_VECTOR (0 DOWNTO 0);
98      doutb : OUT std_logic_VECTOR (0 DOWNTO 0)
99   );
100   END COMPONENT;
101   COMPONENT dpram624x31
102   PORT (
103      addra : IN std_logic_VECTOR (9 DOWNTO 0);
104      addrb : IN std_logic_VECTOR (9 DOWNTO 0);
105      clka : IN std_logic;
106      clkb : IN std_logic;
107      dina : IN std_logic_VECTOR (30 DOWNTO 0);
108      wea : IN std_logic_VECTOR (0 DOWNTO 0);
109      doutb : OUT std_logic_VECTOR (30 DOWNTO 0)
110   );
111   END COMPONENT;
112   COMPONENT dpram624x32
113   PORT (
114      addra : IN std_logic_VECTOR (9 DOWNTO 0);
115      addrb : IN std_logic_VECTOR (9 DOWNTO 0);
116      clka : IN std_logic;
117      clkb : IN std_logic;
118      dina : IN std_logic_VECTOR (31 DOWNTO 0);
119      wea : IN std_logic_VECTOR (0 DOWNTO 0);
120      doutb : OUT std_logic_VECTOR (31 DOWNTO 0)
121   );
122   END COMPONENT;
123
124
125BEGIN
126   -- Architecture concurrent statements
127   -- HDL Embedded Text Block 1 eb1
128   -- eb1 1
129   wea_s(0) <= wea; -- wonderful VHDL
130
131   -- HDL Embedded Text Block 2 XOR_CHAIN1
132   -- eb1 1
133   xor1_s <= mt_kk_s XOR ("00000000000"&mt_kk_s(31 downto 11));
134   xor2_s <= xor1_s XOR (xor1_s(24 downto 0)&"0000000" AND X"9D2C5680");
135   xor3_s <= xor2_s XOR (xor2_s(16 downto 0)&"000000000000000" AND X"EFC60000");
136   random <= xor3_s XOR "000000000000000000"&xor3_s(31 downto 18);
137
138   -- HDL Embedded Text Block 3 eb3
139   y_s <= mt_kk31(0)&mt_kp(30 downto 0);
140   mag01_s <= X"00000000" when y_s(0)='0' else X"9908B0DF";
141   mt_kk_s <= mt_km XOR ('0'&y_s(31 downto 1)) XOR mag01_s;
142
143
144   -- Instance port mappings.
145   U_7 : counters
146      GENERIC MAP (
147         M => 397,
148         N => 623
149      )
150      PORT MAP (
151         clk => clk,
152         resetn => resetn,
153         ena => ena,
154         wea => wea,
155         kk_cnt => kk_cnt,
156         km_cnt => km_cnt,
157         kp_cnt => kp_cnt,
158         wr_cnt => wr_cnt
159      );
160   U_0 : dpram624x1
161      PORT MAP (
162         clka => clk,
163         dina => mt_kk_s(31 DOWNTO 31),
164         addra => wr_cnt,
165         wea => wea_s,
166         clkb => clk,
167         addrb => kk_cnt,
168         doutb => mt_kk31
169      );
170   U_1 : dpram624x31
171      PORT MAP (
172         clka => clk,
173         dina => mt_kk_s(30 DOWNTO 0),
174         addra => wr_cnt,
175         wea => wea_s,
176         clkb => clk,
177         addrb => kp_cnt,
178         doutb => mt_kp
179      );
180   U_2 : dpram624x32
181      PORT MAP (
182         clka => clk,
183         dina => mt_kk_s,
184         addra => wr_cnt,
185         wea => wea_s,
186         clkb => clk,
187         addrb => km_cnt,
188         doutb => mt_km
189      );
190
191END struct;
Examples/ehw4/logic/reg_bank.v
1`timescale 1ns / 1ps
2
3module reg_bank(clk, reset, en, we, wdBus, rdBus, address, reg0, reg1, reg2, reg3, reg4, regMT, error, status, max_lev, max_com, control);
4
5  input clk, reset, en, we;
6
7  input [7:0] wdBus;
8  output [7:0] rdBus;
9  input [4:0] address;
10
11  input [31:0] reg0;
12  input [31:0] reg1;
13  input [31:0] reg2;
14  input [31:0] reg3;
15  input [31:0] reg4;
16  input [31:0] regMT;
17  input [16:0] error;
18  input [7:0] status;
19  output [15:0] max_com;
20  output [7:0] max_lev;
21  output [7:0] control;
22
23
24  reg [7:0] reg_bank [31:0];
25  reg [7:0] rdBus;
26
27
28
29    // Read control
30    always @(posedge clk)
31      if(reset)
32          rdBus = 8'h00;
33      else begin
34        rdBus = reg_bank[address];
35      end
36
37
38     // Store Inputs
39    always @(posedge clk)
40     begin
41      if(en) begin
42        reg_bank[0] = reg0[7:0];
43        reg_bank[1] = reg0[15:8];
44        reg_bank[2] = reg0[23:16];
45        reg_bank[3] = reg0[31:24];
46
47        reg_bank[4] = reg1[7:0];
48        reg_bank[5] = reg1[15:8];
49        reg_bank[6] = reg1[23:16];
50        reg_bank[7] = reg1[31:24];
51
52        reg_bank[8] = reg2[7:0];
53        reg_bank[9] = reg2[15:8];
54        reg_bank[10] = reg2[23:16];
55        reg_bank[11] = reg2[31:24];
56
57        reg_bank[12] = reg3[7:0];
58        reg_bank[13] = reg3[15:8];
59        reg_bank[14] = reg3[23:16];
60        reg_bank[15] = reg3[31:24];
61
62        reg_bank[16] = reg4[7:0];
63        reg_bank[17] = reg4[15:8];
64        reg_bank[18] = reg4[23:16];
65        reg_bank[19] = reg4[31:24];
66
67        reg_bank[20] = error[7:0];
68        reg_bank[21] = error[15:8];
69
70        reg_bank[22] = { 4'b0, status};
71
72// reg_bank[23] = regMT[7:0];
73// reg_bank[24] = regMT[15:8];
74// reg_bank[25] = regMT[23:16];
75// reg_bank[26] = regMT[31:24];
76      end
77     end
78
79
80     assign max_com[7:0] = reg_bank[26];
81     assign max_com[15:8] = reg_bank[27];
82     assign max_lev = reg_bank[28];
83     assign control = reg_bank[29];
84
85    // Write control
86    always @(negedge clk)
87      if(we & en) begin
88        case (address)
89          27: reg_bank[26] = wdBus;
90          28: reg_bank[27] = wdBus;
91          29: reg_bank[28] = wdBus;
92          30: reg_bank[29] = wdBus;
93        endcase
94      end
95
96endmodule
Examples/ehw4/src/Makefile
1CC = mipsel-openwrt-linux-gcc
2
3all: jz_init_sram jz_test_gpio enable_rx enable_irq
4
5DEBUG = -O3 -g0
6
7COMMON_SOURCES = jz47xx_gpio.c jz47xx_mmap.c
8
9H_SOURCES = jz47xx_gpio.h jz47xx_mmap.h
10
11INCLUDE = -I.
12
13WARNINGS= -Wcast-align -Wpacked -Wpadded -Wall
14
15CCFLAGS = ${INCLUDE} ${DEBUG} ${WARNINGS}
16
17LDFLAGS =
18
19COMMON_OBJECTS = $(COMMON_SOURCES:.c=.o)
20
21NANO_IP = 192.168.254.101
22
23genetic.o: genetic.c genetic.h
24    ${CC} -lm -I. -c genetic.c -o genetic.o
25
26client: sintesishw_client.c genetic.o sintesishw_client.h
27    ${CC} sintesishw_client.c genetic.o -o sintesishw_client -lm -I.
28
29server: sintesishw_server.c genetic.o
30    ${CC} sintesishw_server.c genetic.o -o sintesishw_server -lm -lpthread -I.
31
32clean:
33    rm -f *.o sintesishw_client sintesishw_server ${EXEC} *~
Examples/ehw4/src/funlut.dat
Examples/ehw4/src/genetic.c
1#include "stdio.h"
2#include "termios.h"
3#include "sys/mman.h"
4#include "stdlib.h"
5#include "sys/types.h"
6#include "sys/stat.h"
7#include "fcntl.h"
8#include "time.h"
9#include "math.h"
10#include "pthread.h"
11#include "sys/socket.h"
12#include "netinet/in.h"
13#include "netdb.h"
14#include "errno.h"
15#include "sys/un.h"
16#include "genetic.h"
17
18/**************************************************************************************************************************************
19    imprime un cromosoma completo */
20void mostrar_indiv(char *cromo, int pentarboles, int vars)
21{
22char *ap, i, fn[8] = {'!', '&', '^', '|', '_'}; //NOT, AND, XOR, OR, NADA o YES
23char vn[] = {'A', 'B', 'C', 'D', 'E' , 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P', '.'};
24char f1,f2,f3;
25char a;
26
27ap = cromo;
28
29for(i = 0; i < ARBOLES_INDIV; i++){
30        if(*(cromo + 7) == 1)
31        {
32            vn[vars] = '.';
33            printf("%0x%c%c%c%c %i ", *(unsigned short int *)ap, vn[(*(ap+2) >> 4) & 0xF], vn[*(ap+2) & 0xF], vn[(*(ap+3) >> 4) & 0xF], vn[*(ap+3) & 0xF], *(ap+6));
34        }
35        else
36        {
37            vn[4] = '.';
38            printf("%0x%c%c%c%c %i", *(unsigned short int *)ap, vn[(*(ap+2) >> 4) & 0xF], vn[*(ap+2) & 0xF], vn[(*(ap+3) >> 4) & 0xF], vn[*(ap+3) & 0xF], *(ap+6));
39        }
40// printf("\t %0x %0x ", *(short int *)(ap+2), *(ap+6) );
41    ap = ap + LONG_ARBOL;
42}
43
44printf(" ");
45for(i = 0; i < LONG_INDIV; i++)
46{ a=*(char *)(cromo+i) & 0xff;
47    printf("%hhu,",a);
48}
49//fflush(stdout);
50}
51
52/**************************************************************************************************************************************
53    imprime un arbol completo */
54mostrar_arbol(char *cromo, int vars)
55{
56    char *ap, i, fn[8] = {'!', '&', '^', '|', '_'}; //NOT, AND, XOR, OR, NADA o YES
57    char vn[] = {'A', 'B', 'C', 'D', 'E' , 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P', '.'};
58    ap = cromo;
59
60        if(*(cromo + 7) == 1)
61        {
62            vn[vars] = '.';
63            printf("LUT:%04x VARS:%c%c%c%c %0x", *(unsigned short int *)ap, vn[*(ap+2) >> 4], vn[*(ap+2) & 0xF], vn[*(ap+3) >> 4], vn[*(ap+3) & 0xF], *(ap+6));
64        }
65        else
66        {
67            vn[4] = '.';
68            printf("LUT:%04x VARS:%c%c%c%c %0x", *(unsigned short int *)ap, vn[*(ap+2) >> 4], vn[*(ap+2) & 0xF], vn[*(ap+3) >> 4], vn[*(ap+3) & 0xF], *(ap+6));
69        }
70        printf("\tVARS:%04x \tLUT_index:%0x \t", *(unsigned short int *)(ap+2), *(ap+6) );
71    for(i = 0; i < LONG_ARBOL; i++)
72    {
73        printf("%0x,",*(cromo+i));
74    }
75    printf("\n");
76}
77
78/**************************************************************************************************************************************
79    genera un numero de forma aleatoria hasta max inclusive*/
80char random_var(int max)
81{
82    char variable, mascara;
83    int i;
84    mascara = 1;
85    do
86    {
87        mascara = (mascara << 1) + 1;
88    }while(max > mascara);
89
90    if(HW_ENABLE == 1) variable = (*(int *)(evalfit_ptr1 + EVALFIT_RDREG8)) & mascara;
91    else variable = random() & mascara;
92
93    while(variable > max)
94    {
95        variable = variable - max;
96    }
97    return variable;
98}
99
100/**************************************************************************************************************************************
101    Genera un arbol de forma aleatoria
102        Las funciones y variables son representadas por enteros del 0 al 3 o mas...
103    - el arbol se encuentra compuesto de tres funciones, dos de entrada y una de salida.
104*/
105void gen_arbol(char *ap, int variables)
106{
107    int lut;
108    short int dato_lut;
109    lut = (random_var(FUNCIONES)*25) + (random_var(FUNCIONES) * 5) + random_var(FUNCIONES);//random_var(FUNCOMBS-1);
110    dato_lut = (*(funlut_ap+(lut*2)) << 8) + (*(funlut_ap+(lut*2)+1));
111    *(short int *)ap = ntohs(dato_lut); //Se cambia endianismo para cuando se ejecute en 386, que es distinto a PPC
112    *(ap+2) = *(ap+3) = 0;
113    *(ap+2) = random_var(variables) + (random_var(variables) << 4);
114    *(ap+3) = random_var(variables) + (random_var(variables) << 4);
115    *(ap+6) = lut;
116// mostrar_arbol(ap);
117}
118
119
120/**************************************************************************************************************************************
121    genera un individuo de forma aleatoria */
122void gen_indiv(char *cromo, int pentarboles, int vars)
123{
124char i=0;
125int n1, n2, n3, n4, n5, c1, c2, c3, c4, c5, sig, indice;
126
127n1 = n2 = n3 = n4 = n5 = 0;
128c1 = c2 = c3 = c4 = c5 = 0;
129indice = 0;
130
131sig=1;
132
133
134do
135{
136
137if((sig == 1) && (c1 < nivel1))
138{
139    gen_arbol(cromo + (indice * LONG_ARBOL), vars-1);
140    *(cromo +(indice*LONG_ARBOL) + 7) = 1;
141    n1 ++;
142    c1 ++;
143    indice ++;
144    if(n1 < 4)
145        sig = 1;
146    else
147    {
148        sig = 2;
149        n1 = 0;
150    }//printf("1");
151}
152else
153{
154    if((sig == 2) && (c2 < *(nivel2+pentarboles)))
155    {
156        gen_arbol(cromo + (indice*LONG_ARBOL), 3);
157        *(cromo +(indice*LONG_ARBOL) + 7) = 2;
158        n2++;
159        c2 ++;
160        indice ++;
161        if(c2 == *(nivel2+pentarboles))
162            sig = 3;
163        else
164        {
165            if(n2 < 4)
166                sig = 1;
167            else
168            {
169                sig = 3;
170                n2 = 0;
171            }
172        }//printf("2");
173    }
174    else
175    {
176        if((sig == 3) && (c3 < *(nivel3+pentarboles)))
177        {
178            gen_arbol(cromo + (indice*LONG_ARBOL), 3);
179            *(cromo +(indice*LONG_ARBOL) + 7) = 3;
180            n3++;
181            c3++;
182            indice++;
183            if(c3 == *(nivel3+pentarboles))
184                sig = 4;
185            else
186            {
187                if(n3 < 4)
188                    sig = 1;
189                else
190                {
191                    sig = 4;
192                    n3 = 0;
193                }
194            }//printf("3");
195        }
196        else
197        {
198            if((sig == 4) && (c4 < *(nivel4+pentarboles)))
199            {
200                gen_arbol(cromo + (indice*LONG_ARBOL), 3);
201                *(cromo +(indice*LONG_ARBOL) + 7) = 4;
202                n4++;
203                c4++;
204                indice++;
205                if(c4 == *(nivel4+pentarboles))
206                    sig = 5;
207                else
208                {
209                    if(n4 < 4)
210                        sig = 1;
211                    else
212                    {
213                        sig = 5;
214                        n4 = 0;
215                    }
216                }//printf("4");
217            }
218            else
219            {
220                if((sig == 5) && (c5 < *(nivel5+pentarboles)))
221                {
222                    gen_arbol(cromo + (indice*LONG_ARBOL), 3);
223                    *(cromo +(indice*LONG_ARBOL) + 7) = 5;
224                    c5++;
225                    indice++;
226                    if(c5 == *(nivel5+pentarboles))
227                        sig = 1;
228                    else
229                        sig = 1;
230                }
231            }
232
233        }
234    }
235
236}
237/* mostrar_indiv(cromo, 1,vars); //*/
238}while(indice < ARBOLES_INDIV);
239
240}
241
242
243/**************************************************************************************************************************************
244    genera una poblacion completa */
245void gen_poblacion(char *cromo, int pentarboles, int vars, int indivs)
246{
247    int i;
248    for(i=0; i < indivs; i++)
249    {
250        gen_indiv(cromo + ( i * LONG_INDIV), pentarboles, vars);
251    }
252}
253
254
255/**************************************************************************************************************************************
256    halla la salida de un arbol para una entrada de x de un cromo basado en LUT*/
257int eval_func_lut(char *ap, int x, int vars ) //var apunta al valor de las variables
258{
259char Y;
260char var[vars], i, a, b, c, d;
261int lut;
262
263for(i=0;i <= vars-1;i++)
264{
265    var[i] = (x >> i) & 0x1;
266// printf("-%i",var[i]);
267}
268var[vars] = 0;
269
270a = *(ap + 3) & 0xF;
271b = (*(ap + 3) >> 4) & 0xF;
272c = *(ap + 2) & 0xF;
273d = (*(ap + 2) >> 4) & 0xF;
274i = var[a] + (var[b]*2) + (var[c]*4) + (var[d]*8);
275lut = *(short int *)ap;
276Y = (lut >> i) & 0x1;
277
278return Y;
279}
280
281/**************************************************************************************************************************************
282    retorna las salidas de un cromosoma de 5 arboles*/
283void eval_pentarbol_sw(char *ap, int *salida, int *entrada, int vars)
284{
285    int i, k ;
286    char salidas[ARBOLES][COMBS], aux[COMBS];
287
288    for(i=0; i <= ARBOLES-2; i++){ //se evaluan las salidas de los primeros arboles y se almacenan en salidas
289        for(k=0; k<= (COMBS-1); k++)
290        {
291            salidas[i][k] = eval_func_lut((ap+(i*LONG_ARBOL)), k, vars);
292        }
293    }
294
295    //se calculan los minterminos para el arbol de salida
296    for(k=0; k <= (COMBS-1); k++)
297    {
298        aux[k] = ((salidas[0][k])*1) + ((salidas[1][k])*2) + ((salidas[2][k])*4) + ((salidas[3][k])*8);
299    }
300
301    for(i=0; i <= (COMBS-1); i++)
302    {
303        *(salida + i) = eval_func_lut(ap + ((ARBOLES-1) * LONG_ARBOL), aux[i], vars);
304    }
305}
306
307
308/**************************************************************************************************************************************
309    retorna el numero de errores y las salidas de un cromosoma de 1 o mas pentarboles*/
310int eval_fit_sw(char *ap, int *objetivo, int num_min, int pentarboles, int vars )
311{
312    int *obj_min, *med_min2, *med_min3, *med_min4, *med_min5, *entrada, i, j, errores, puertas;
313    int *salida, n2, n3, n4, n5, x;
314
315    obj_min = malloc(sizeof(obj_min)*COMBS);
316    med_min2 = malloc(sizeof(med_min2)*COMBS);
317    med_min3 = malloc(sizeof(med_min3)*COMBS);
318    med_min4 = malloc(sizeof(med_min4)*COMBS);
319    med_min5 = malloc(sizeof(med_min5)*COMBS);
320    entrada = malloc(sizeof(entrada)*COMBS);
321    salida = malloc(sizeof(salida)*COMBS);
322    errores = 0;
323
324    for(i=0; i < COMBS; i++)
325    {
326        *(obj_min+i) = 0;
327        *(entrada+i) = i;
328        *(med_min2 + i) = 0;
329        *(med_min3 + i) = 0;
330        *(med_min4 + i) = 0;
331        *(med_min5 + i) = 0;
332    }
333
334    for(i = 0; i < num_min; i++)
335    {
336        *(obj_min + (*(objetivo + i))) = 1; //se convierte el objetivo a un arreglo
337    }
338
339    i = 0;
340    n2 = 0;
341    n3 = 0;
342    n4 = 0;
343    n5 = 0;
344
345    do
346    {
347        if(*(ap + (i * LONG_ARBOL) + 7) == 1)
348        {
349            eval_pentarbol_sw(ap + (i * LONG_ARBOL), salida, entrada, vars);
350            for(j = 0; j < COMBS; j++)
351            {
352                *(med_min2 + j) = *(med_min2 + j) + (*(salida + j) << n2);
353            }
354            if(n2 == 3) n2 = 0; else n2++;
355            i = i + 5;
356        }
357         else
358        {
359            if(*(ap + (i * LONG_ARBOL) + 7) == 3)
360            {
361                for(j = 0; j < COMBS; j++)
362                {
363                    *(salida + j) = eval_func_lut(ap + (i * LONG_ARBOL), *(med_min2 + j), vars);
364                }
365                for(j = 0; j < COMBS; j++)
366                {
367                    *(med_min3 + j) = *(med_min3 + j) + (*(salida + j) << n3);
368                }
369                if(n3 == 3) n3 = 0; else n3++;
370                i++;
371            }
372            else
373            {
374
375                if(*(ap + (i * LONG_ARBOL) + 7) == 4)
376                {
377                    for(j = 0; j < COMBS; j++)
378                    {
379                        *(salida + j) = eval_func_lut(ap + (i * LONG_ARBOL), *(med_min3 + j), vars);
380                    }
381                    for(j = 0; j < COMBS; j++)
382                    {
383                        *(med_min4 + j) = *(med_min4 + j) + (*(salida + j) << n4);
384                    }
385                    if(n4 == 3) n4 = 0; else n4++;
386                    i++;
387                }
388            }
389        }
390    }while(i <= (ARBOLES_INDIV-1));
391
392    if(*(ap + ((ARBOLES_INDIV-1) * LONG_ARBOL) + 7) == 2)
393    {
394        for(j = 0; j < COMBS; j++) //se evalua el arbol de salida
395        {
396            errores = errores + abs(*(med_min2 + j) - *(obj_min + j)); //errores
397/* printf("[%i]",*(med_min2 + j));*/
398        }
399    }
400
401    if(*(ap + ((ARBOLES_INDIV-1) * LONG_ARBOL) + 7) == 3)
402    {
403        for(j = 0; j < COMBS; j++) //se evalua el arbol de salida
404        {
405            errores = errores + abs(*(med_min3 + j) - *(obj_min + j)); //errores
406        }
407    }
408
409    if(*(ap + ((ARBOLES_INDIV-1) * LONG_ARBOL) + 7) == 4)
410    {
411        for(j = 0; j < COMBS; j++) //se evalua el arbol de salida
412        {
413            errores = errores + abs(*(med_min4 + j) - *(obj_min + j)); //errores
414        }
415    }
416
417    if(*(ap + ((ARBOLES_INDIV-1) * LONG_ARBOL) + 7) == 5)
418    {
419        for(j = 0; j < COMBS; j++) //se evalua el arbol de salida
420        {
421            errores = errores + abs(*(med_min5 + j) - *(obj_min + j)); //errores
422        }
423    }
424    free(obj_min);
425    free(med_min2);
426    free(med_min3);
427    free(med_min4);
428    free(med_min5);
429    free(entrada);
430    free(salida);
431
432    puertas = 0;
433
434    return ((errores * PESO_SALIDA) + puertas);
435}
436
437/**************************************************************************************************************************************
438    inicia la evaluacion de un cromosoma en un periferico*/
439int evalfit_hw_init(char *cromo, int pentarboles, int nivel_max, void *evalfit_ptr )
440{
441int i;
442
443/** insertar cromosoma en periferico **/
444    for(i = 0; i < ARBOLES_INDIV; i++)
445    {
446      *(int *)((evalfit_ptr) + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)) = *(char *)(cromo +(LONG_ARBOL*i)+7);
447// printf("\n%i: %0x",i,*(int *)(evalfit_ptr + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)));
448        *(int *)((evalfit_ptr) + EVALFIT_MEMOFFSET + (LONG_ARBOL*i) + 4) = *(int *)(cromo +(LONG_ARBOL*i));
449// printf(": %0x",*(int *)(evalfit_ptr + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)+4));
450    }
451    *(int *)((evalfit_ptr) + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)) = 0xF; //para terminar
452    i++;
453    *(int *)((evalfit_ptr) + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)) = 0xF; //para terminar
454
455/** Iniciar **/
456    *(int *)(evalfit_ptr + EVALFIT_CONTROL_OFFSET) = CONTROL_START_MASK;
457}
458
459/**************************************************************************************************************************************
460    espera y retorna el numero de errores y las salidas de un cromosoma de 1 o mas pentarboles*/
461int evalfit_hw_wait(char *cromo, int pentarboles, int nivel_max, void *evalfit_ptr )
462{
463int errores, puertas, i;
464
465   // tiempo1 = get_timestamp();
466   do{ }while((*(int *)(evalfit_ptr + EVALFIT_RDREG1) & DONE_MASK) != 1);
467    // tiempo2 = get_timestamp();
468    errores = *(int *)(evalfit_ptr + EVALFIT_RDREG2) & ERRORS_MASK; //errores
469    *(int *)(evalfit_ptr + EVALFIT_CONTROL_OFFSET) = 0; //terminar, bajar habilita
470
471    puertas = 0;
472    for(i = 0; i < ARBOLES_INDIV; i++)
473    {
474        puertas = puertas + *(puertas_ap + *(char *)(cromo +(LONG_ARBOL*i)+6));
475    }
476
477return ((errores * PESO_SALIDA) + (PESO_PUERTAS * puertas) + (PESO_NIVELES * nivel_max));
478}
479
480/**************************************************************************************************************************************
481    cruza dos cromosomas y almacena en destino. */
482void cruzar(char *padre1, char *padre2, char *destino1, char *destino2, int pentarboles)
483{
484int a, i;
485
486    a = (random() & 0x1F) + 1; //punto de corte, es un numero de arbol
487
488    while(a > (ARBOLES_INDIV))
489    {
490        a = a - ARBOLES_INDIV;//(pentarboles * ARBOLES);
491    }
492    a = a-1;
493// printf("\n%i",a);
494
495    for(i = 0; i < (a * LONG_ARBOL); i++)
496    {
497        *(destino1 + i) = *(padre1 + i); //padre1
498        *(destino2 + i) = *(padre2 + i); //padre1
499    }
500
501    for(i = (a * LONG_ARBOL); i < LONG_INDIV; i++) // +1 para el arbol de salida
502    {
503        *(destino1 + i) = *(padre2 + i); //padre2
504        *(destino2 + i) = *(padre1 + i); //padre2
505    }
506}
507
508/**************************************************************************************************************************************
509    cruza dos cromosomas y almacena en destino. */
510void cross2point(char *padre1, char *padre2, char *destino1, char *destino2, int pentarboles)
511{
512int a, b, i;
513
514    a = random_var((pentarboles*ARBOLES)-3);
515    b = random_var((pentarboles*ARBOLES)-a-2)+a;
516    a++;
517    b++;
518// printf("\n%i %i %i",a,b,pentarboles*ARBOLES);fflush(stdout);
519    for(i = 0; i < (a*LONG_ARBOL) ; i++)
520    {
521        *(destino1 + i) = *(padre1 + i); //
522        *(destino2 + i) = *(padre2 + i); //
523    }
524    for(i = a; i < (b*LONG_ARBOL) ; i++)
525    {
526        *(destino2 + i) = *(padre1 + i); //
527        *(destino1 + i) = *(padre2 + i); //
528    }
529    for(i = (b*LONG_ARBOL); i < LONG_INDIV; i++) // +1 para el arbol de salida
530    {
531        *(destino1 + i) = *(padre1 + i); //padre2
532        *(destino2 + i) = *(padre2 + i); //padre2
533    }
534}
535
536/**************************************************************************************************************************************
537    muta un cromosoma y almacena en destino. */
538
539void muta_indiv(char *padre, char *destino, int pentarboles, int vars)
540{
541    int a, i;
542
543    gen_indiv(destino, pentarboles, vars);
544
545    a = (random() & 0x1F) + 1; //punto de corte, es un numero de arbol
546
547    while(a > (ARBOLES_INDIV))
548    {
549        a = a - ARBOLES_INDIV;
550    }
551
552    for(i = 0; i < (a * LONG_ARBOL); i++)
553    {
554        *(destino + i) = *(padre + i); //padre1
555    }
556}
557
558/**************************************************************************************************************************************
559        Introducir minterminos **/
560void minterm2peripheral(int *fun_obj, int tamano, void *evalfit_ptr)
561{
562    int i, j, a;
563
564    for(i = 0; i < 512; i++) //rellenar con 0
565    {
566        *(int *)(evalfit_ptr + EVALFIT_OBJOFFSET + (i*4)) = 0;
567    }
568
569    for(i = 0; i < tamano; i++) //insertar 1's en segmento de mem objetivo
570    {
571        j=0;
572        a=fun_obj[i];
573        while(a > 31)
574        {
575            a -= 32;
576            j++;
577        }
578        *(int *)(evalfit_ptr + EVALFIT_OBJOFFSET + (j*4)) += (1 << (31-a));
579    }
580}
581
582/**************************************************************************************************************************************
583     inicializar periferico **/
584int init_peripheral(int offset_int, int basemem)
585{
586/* Variables para periferico*/
587int *aux, base_periferico, *evalfit_ptr;
588    off_t offset = offset_int; //Direccion base del periferico
589    base_periferico = (int *)mmap(NULL, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, basemem, offset & ~MAP_MASK);
590    evalfit_ptr = base_periferico + (offset & MAP_MASK);
591    printf("\r\nPeripheral_ptr: %0x", evalfit_ptr);
592    if( (int *)evalfit_ptr == (int *)MAP_FAILED)
593    { printf("error mmap!\n");
594    fflush(stdout);
595    return -1;
596    }
597    *(int *)(evalfit_ptr + EVALFIT_CONTROL_OFFSET) = CONTROL_RESET_MASK; //reset
598    *(int *)(evalfit_ptr + EVALFIT_CONTROL_OFFSET) = 0;
599    printf("\nDate + Status: %0x\n", *(int *)(evalfit_ptr + EVALFIT_STATUS_OFFSET));
600    return evalfit_ptr;
601}
602
603/**************************************************************************************************************************************
604     cerrar periferico **/
605int close_peripheral(char *evalfit_ptr)
606{
607    if(munmap(evalfit_ptr, MAP_SIZE)==-1)
608        perror("munmap");
609        printf("Error en unmap() (close_peripheral)\n");
610        exit(-1);
611}
612
613/**************************************************************************************************************************************
614     cambiar endianismo **/
615int big2little(int x)
616{
617int y, i, r;
618y=0;
619r=0;
620    for(i=0 ; i<=3; i++){
621        x = x >> r;
622        y = y << r;
623        y = y | (x & 0xFF);
624        r = 8;
625    }
626return y;
627}
628
629/**************************************************************************************************************************************
630    crea y evoluciona un cromosoma a partir de una funcion objetivo*/
631evolucionar(struct gen_datos_tipo *gen_datos)
632{
633int *generacion, k, a, i, j = 0, tamacromo, vars, aux, *aux_sal, T;
634int conta=0, aux1, aux2, *fitness, *fitness2, *entrada, *objetivo, tamaobj, pentarboles, *fitness_sal, fitness_entrada, nivel_max;
635char o, *ap, *cromo, *ordenpoblacion, *cromo_sal, *cromo_entrada;
636long int tiempo1, tiempo2;
637float tiempof1, tiempof2, tiempof3;
638
639/* Variables para almacenar datos para graficar*/
640    int *datos, x, puntos;
641    char ruta[]="sarsar.dat";
642    FILE *fich;
643/* datos = malloc(sizeof(datos)*maxgeneraciones*2); if(datos==0) printf("Error en malloc");*/
644/* x=0;*/
645
646    objetivo = gen_datos -> objetivo;
647    tamaobj = gen_datos -> tamaobj;
648    pentarboles = gen_datos -> pentarboles;
649    tamacromo = gen_datos -> tamacrom;
650    cromo_sal = gen_datos -> cromo_sal;
651    fitness_sal = gen_datos -> fitness;
652    cromo_entrada = gen_datos -> cromo_entrada;
653    fitness_entrada = gen_datos -> fitness_entrada;
654    nivel_max = gen_datos -> nivel_max;
655    vars = gen_datos -> vars;
656    generacion = gen_datos->generacion;
657    aux = gen_datos->aux;
658    aux_sal = gen_datos->aux_sal;
659
660    cromo = malloc(sizeof(cromo) * (poblacion + 2) * LONG_INDIV); if(cromo==0) printf("Error en malloc");
661    fitness = malloc(sizeof(fitness) * (poblacion+1)); if(fitness==0) printf("Error en malloc");
662    fitness2 = malloc(sizeof(fitness2) * (poblacion+1)); if(fitness2==0) printf("Error en malloc");
663    ordenpoblacion = malloc(sizeof(ordenpoblacion) * (poblacion+1)); if(ordenpoblacion==0) printf("Error en malloc");
664
665    if(gen_datos->en_cromo_entrada == 1)
666    {
667        for(i = 0; i < LONG_INDIV; i++ )
668        {
669            *(char *)(cromo + i) = *(char *)(cromo_entrada + i);
670        }
671    }
672
673    if(gen_datos->en_cromo_entrada==0) gen_poblacion(cromo, pentarboles, vars, poblacion);
674    else gen_poblacion(cromo + LONG_INDIV, pentarboles, vars, poblacion-1);
675
676    for(i = 0; i < poblacion; i++)
677    {
678        *(ordenpoblacion + i) = i; //se inicializa el stream para el orden poblacional
679        *(fitness + i) = 100000;
680        *(fitness2 + i) = 100000;
681    }
682
683/** copiar miniterminos a periferico **/
684    if(HW_ENABLE == 1) {
685        minterm2peripheral(objetivo, tamaobj, (int *)(evalfit_ptr1));
686         minterm2peripheral(objetivo, tamaobj, (int *)(evalfit_ptr2));
687        minterm2peripheral(objetivo, tamaobj, (int *)(evalfit_ptr3));
688        minterm2peripheral(objetivo, tamaobj, (int *)(evalfit_ptr4));
689    }
690
691/** Insertar maxcombs y nivel_max **/
692    if(HW_ENABLE == 1) {
693        *(int *)(evalfit_ptr1 + EVALFIT_WREG4) = (COMBS-1) + (nivel_max << 16);
694        *(int *)(evalfit_ptr2 + EVALFIT_WREG4) = (COMBS-1) + (nivel_max << 16);
695        *(int *)(evalfit_ptr3 + EVALFIT_WREG4) = (COMBS-1) + (nivel_max << 16);
696        *(int *)(evalfit_ptr4 + EVALFIT_WREG4) = (COMBS-1) + (nivel_max << 16);
697    }
698    o=0;
699    *generacion = 0;
700    T = aux >> 16;
701    do{
702
703// cruzar
704        for(i = ((poblacion*T)/8); i < ((poblacion*(T+1))/8); i=i+4) //salvar los primeros 4 y cruzar
705        {
706            cross2point(cromo+INDICE_PADRE1, cromo+INDICE_PADRE2, cromo+(*(ordenpoblacion+i)*LONG_INDIV), cromo+(*(ordenpoblacion+i+1)*LONG_INDIV), pentarboles);
707            cross2point(cromo+INDICE_PADRE1, cromo+INDICE_PADRE2, cromo+(*(ordenpoblacion+i+2)*LONG_INDIV), cromo+(*(ordenpoblacion+i+3)*LONG_INDIV), pentarboles);
708        }//cruzar
709
710// Mutacion
711        for(i = ((poblacion*(T+1))/8); i < ((poblacion*(T+2))/8); i++)
712        {
713            muta_indiv(cromo + INDICE_PADRE1, cromo + ((*(ordenpoblacion + i )) * LONG_INDIV), pentarboles, vars);
714        }
715        for(i = ((poblacion*(T+2))/8); i < ((poblacion*(T+3))/8); i++)
716        {
717            muta_indiv(cromo + INDICE_PADRE2, cromo + ((*(ordenpoblacion + i )) * LONG_INDIV), pentarboles, vars);
718        }
719
720//crear nuevos indiv reemplazar por taras
721        for(i = ((poblacion*(T+3))/8); i < poblacion; i++)
722        {
723            gen_indiv((cromo + ((*(ordenpoblacion + i)) * LONG_INDIV)), pentarboles, vars);
724        }
725
726// evaluar cromosomas de poblacion
727        o=0;
728// tiempo1 = get_timestamp();
729        for(i = 0; i < poblacion; i=i+4)
730        {
731            if(HW_ENABLE == 1)
732            {
733                evalfit_hw_init((cromo + (i * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr1);
734                evalfit_hw_init((cromo + ((i+1) * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr2);
735                evalfit_hw_init((cromo + ((i+2) * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr3);
736                evalfit_hw_init((cromo + ((i+3) * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr4);
737                *(fitness + i) = evalfit_hw_wait((cromo + (i * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr1);
738                *(fitness + i+1) = evalfit_hw_wait((cromo + ((i+1) * LONG_INDIV)), pentarboles,nivel_max, (int *)evalfit_ptr2);
739                *(fitness + i+2) = evalfit_hw_wait((cromo + ((i+2) * LONG_INDIV)), pentarboles,nivel_max, (int *)evalfit_ptr3);
740                *(fitness + i+3) = evalfit_hw_wait((cromo + ((i+3) * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr4);
741            }else{
742                *(fitness + i) = eval_fit_sw((cromo + (i * LONG_INDIV)), objetivo, tamaobj, pentarboles, vars);
743                *(fitness + i+1) = eval_fit_sw((cromo + ((i+1) * LONG_INDIV)), objetivo, tamaobj, pentarboles, vars);
744                *(fitness + i+2) = eval_fit_sw((cromo + ((i+2) * LONG_INDIV)), objetivo, tamaobj, pentarboles, vars);
745                *(fitness + i+3) = eval_fit_sw((cromo + ((i+3) * LONG_INDIV)), objetivo, tamaobj, pentarboles, vars);
746            }
747            *(fitness2 + i) = *(fitness + i);
748            *(fitness2 + i+1) = *(fitness + i+1);
749            *(fitness2 + i+2) = *(fitness + i+2);
750            *(fitness2 + i+3) = *(fitness + i+3);
751
752            if(*(fitness + i) < PESO_SALIDA)
753            {
754                o++; //incrementar numero de aciertos
755            }
756        }
757// tiempo2 = get_timestamp();
758        x++;
759
760    //seleccionar cromosomas para mutar y cruzar y para eliminar, se realiza una ordenacion en ordenpoblacion, solo se ordena el indice del cromosoma
761        for(i = 0; i < poblacion; i++)
762        {
763            *(ordenpoblacion + i) = i; //se inicializa el stream para el orden poblacional
764        }
765
766        for(i=0; i < poblacion; i++)
767        {
768            for(j=i+1; j < poblacion; j++)
769            {
770                if(*(fitness2 + j) < *(fitness2 + i))
771                {
772                    aux1 = *(ordenpoblacion + i);
773                    *(ordenpoblacion + i) = *(ordenpoblacion + j);
774                    *(ordenpoblacion + j) = aux1;
775                    aux2 = *(fitness2 + i);
776                    *(fitness2 + i) = *(fitness2 + j);
777                    *(fitness2 + j) = aux2;
778                }
779            }
780        }
781
782
783    //Se mide la evolucion del fitness en las generaciones, se saca la media por generacion
784        aux1 = 0;
785        for(i = 0; i < poblacion; i++)
786        {
787            aux1 = aux1 + *(fitness + i);
788        }
789        *(aux_sal + *generacion) = aux1 / poblacion;
790        *(aux_sal + maxgeneraciones + *generacion) = *fitness2;
791
792        (*generacion)++;
793
794// for(i=0; i < RESULTADOS; i++)
795// {
796// printf("\nfit%i: %i ", i, *(fitness+*(ordenpoblacion+i)), *(generacion+*(ordenpoblacion+i)));
797// mostrar_indiv(cromo + ( *(ordenpoblacion + i) * LONG_INDIV), pentarboles, vars);
798// }
799
800    }while(/* (o < RESULTADOS) && */ (*generacion < maxgeneraciones));
801
802    for(i = 0; i < RESULTADOS; i++)
803    {
804        for(j=0; j< LONG_INDIV;j++)
805        {
806            *(cromo_sal + (i*LONG_INDIV) + j) = *(cromo + (*(ordenpoblacion + i)*LONG_INDIV) + j);
807        }
808        *(fitness_sal + i) = *(fitness + *(ordenpoblacion + i));
809    }
810
811    free(cromo);
812    free(fitness);
813    free(fitness2);
814    free(ordenpoblacion);
815}
816
Examples/ehw4/src/genetic.h
1
2/** Genetic definitions **/
3#define HW_ENABLE 1 //cambiar en sintesishw_server.h habilitar hw, 0 se hace por SW
4#define PAR_ONLYFIT 0 //paralelizacion, 0 ALGORITMO ENTERO, 1 SOLO FITNESS
5
6#define FUNCIONES 4
7#define COMBS (int) pow(2,vars)
8#define FUNCOMBS (int) pow(FUNCIONES + 1, 3)
9#define FUN_NOT 0
10#define FUN_AND 1
11#define FUN_XOR 2
12#define FUN_OR 3
13#define YES FUNCIONES
14#define NOVAR vars
15#define PESO_SALIDA 100
16#define PESO_PUERTAS 5
17#define PESO_NIVELES 0
18
19#define RESULTADOS 2
20
21/* Numero de generaciones en el que se amplia la logitud del cromosoma*/
22#define UMBRAL_GENERACION (int) pow(3, pentarboles) * 33
23#define MAX_PENTARBOLES 16
24
25#define ARBOLES 5
26#define LONG_ARBOL 8
27
28int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
29int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4};
30int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1};
31int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0};
32
33#define nivel1 pentarboles * 4
34#define ARBOLES_INDIV (int)(nivel1 + *(nivel2+pentarboles) + *(nivel3+pentarboles) + *(nivel4+pentarboles) + *(nivel5+pentarboles))
35#define LONG_INDIV (int)(ARBOLES_INDIV * LONG_ARBOL)
36
37#define INDICE_PADRE1 ((*ordenpoblacion) * LONG_INDIV)
38#define INDICE_PADRE2 ((*(ordenpoblacion+1)) * LONG_INDIV)
39
40#define INDICE_TARA1 ((*(ordenpoblacion+poblacion-1)) * LONG_INDIV)
41#define INDICE_TARA2 ((*(ordenpoblacion+poblacion-2)) * LONG_INDIV)
42#define INDICE_TARA3 ((*(ordenpoblacion+poblacion-3)) * LONG_INDIV)
43#define INDICE_TARA4 ((*(ordenpoblacion+poblacion-4)) * LONG_INDIV)
44
45
46/************************** peripheral Definitions ***************************/
47
48#define USR_REGS 0x10
49#define MAP_SIZE 0x4000Ul
50#define MAP_MASK (MAP_SIZE - 1)
51
52#define DONE_MASK 0x1
53#define ERRORS_MASK 0xFFFF
54
55/** CONTROL REGISTERS **/
56#define EVALFIT_REGBASE_OFFSET 0
57
58#define EVALFIT_CONTROL_OFFSET EVALFIT_REGBASE_OFFSET + 0
59#define CONTROL_RESET_MASK 0x80000000
60#define CONTROL_START_MASK 0x40000000
61
62#define EVALFIT_STATUS_OFFSET EVALFIT_REGBASE_OFFSET + 0
63#define EVALFIT_SRCADDR_OFFSET EVALFIT_REGBASE_OFFSET + 4
64#define EVALFIT_DSTADDR_OFFSET EVALFIT_REGBASE_OFFSET + 8
65#define EVALFIT_TRANSFERSIZE_OFFSET EVALFIT_REGBASE_OFFSET + 12
66#define EVALFIT_REG_OFFSET EVALFIT_REGBASE_OFFSET + 16
67
68/** WRITE REGISTERS **/
69#define EVALFIT_WREG4 (EVALFIT_REGBASE_OFFSET + (4*4))
70#define EVALFIT_WREG5 (EVALFIT_REGBASE_OFFSET + (4*5))
71#define EVALFIT_wREG6 (EVALFIT_REGBASE_OFFSET + (4*6))
72#define EVALFIT_wREG7 (EVALFIT_REGBASE_OFFSET + (4*7))
73#define EVALFIT_wREG8 (EVALFIT_REGBASE_OFFSET + (4*8))
74
75/** READ REGISTERS **/
76#define EVALFIT_RDREG0 (EVALFIT_REGBASE_OFFSET)
77#define EVALFIT_RDREG1 (EVALFIT_REGBASE_OFFSET + (4*1))
78#define EVALFIT_RDREG2 (EVALFIT_REGBASE_OFFSET + (4*2))
79#define EVALFIT_RDREG3 (EVALFIT_REGBASE_OFFSET + (4*3))
80#define EVALFIT_RDREG4 (EVALFIT_REGBASE_OFFSET + (4*4))
81#define EVALFIT_RDREG5 (EVALFIT_REGBASE_OFFSET + (4*5))
82#define EVALFIT_RDREG6 (EVALFIT_REGBASE_OFFSET + (4*6))
83#define EVALFIT_RDREG7 (EVALFIT_REGBASE_OFFSET + (4*7))
84#define EVALFIT_RDREG8 (EVALFIT_REGBASE_OFFSET + (4*8))
85/** MEMORY **/
86#define EVALFIT_MEMOFFSET 0x1000
87#define EVALFIT_OBJOFFSET EVALFIT_MEMOFFSET + (0x40 * 8)
88
89/** CROMOSOMA **/
90#define CROMO_NIVEL_OFFSET
91
92/* Variables globales */
93char *funlut_ap, *puertas_ap;
94void *evalfit_ptr1, *evalfit_ptr4, *evalfit_ptr3, *evalfit_ptr2;
95int maxgeneraciones, poblacion;
96
97
98typedef long long timestamp_t;
99static timestamp_t
100        get_timestamp ()
101{
102    struct timeval now;
103    gettimeofday (&now, NULL);
104    return now.tv_usec + (timestamp_t)now.tv_sec *1000000 ;
105}
106
107struct gen_datos_tipo
108{
109    int *objetivo;
110    int tamaobj;
111    int pentarboles;
112    int vars;
113    int tamacrom;
114    int maxgen;
115    char *cromo_sal;
116    int *fitness;
117    char *cromo_entrada;
118    int fitness_entrada;
119    int nivel_max;
120    int en_cromo_entrada;
121    int *generacion;
122    int *tiempo;
123    int aux;
124    int *aux_sal;
125};
126
Examples/ehw4/src/puertas.dat
Examples/ehw4/src/sintesishw.h
1/** Genetic definitions **/
2
3#define HW_ENABLE 0 //habilitar hw, 0 se hace por SW
4#define VARS 8
5#define FUNCIONES 4
6#define COMBS (int) pow(2,VARS)
7#define FUNCOMBS (int) pow(FUNCIONES + 1, 3)
8#define FUN_NOT 0
9#define FUN_AND 1
10#define FUN_XOR 2
11#define FUN_OR 3
12#define YES FUNCIONES
13#define NOVAR VARS
14#define PESO_SALIDA 1
15#define PESO_PUERTAS 1
16
17#define MAXGENERACIONES 32
18#define RESULTADOS 4
19
20/* Numero de generaciones en el que se amplia la logitud del cromosoma*/
21#define UMBRAL_GENERACION (int) pow(3, pentarboles) * 5000
22#define MAX_PENTARBOLES 16
23
24#define POBLACION 4
25#define ARBOLES 5
26#define LONG_ARBOL 8
27
28
29
30/*
31POBLACION define el numero de individuos. minimo 6. 2 padres 4 taras
32ARBOLES define el numero de arboles en un individuo. Cada arbol tiene 3 funciones 4 variables.
33INDICES_XXX define el desplazamiento de un individuo en el cromosoma completo de la poblacion, cromo
34*/
35
36#define nivel1 pentarboles * 4
37#define ARBOLES_INDIV (int)(nivel1 + nivel2(pentarboles) + nivel3(pentarboles) + nivel4(pentarboles) + nivel5(pentarboles))
38#define LONG_INDIV (int)(ARBOLES_INDIV * LONG_ARBOL)
39
40#define INDICE_PADRE1 ((*ordenpoblacion) * LONG_INDIV)
41#define INDICE_PADRE2 ((*(ordenpoblacion+1)) * LONG_INDIV)
42
43#define INDICE_TARA1 ((*(ordenpoblacion+POBLACION-1)) * LONG_INDIV)
44#define INDICE_TARA2 ((*(ordenpoblacion+POBLACION-2)) * LONG_INDIV)
45#define INDICE_TARA3 ((*(ordenpoblacion+POBLACION-3)) * LONG_INDIV)
46#define INDICE_TARA4 ((*(ordenpoblacion+POBLACION-4)) * LONG_INDIV)
47
48
49
50/************************** peripheral Definitions ***************************/
51#define EVALFIT_PHYSBASE 0xcd800000
52#define USR_REGS 0x10
53#define MAP_SIZE 0x4000Ul
54#define MAP_MASK (MAP_SIZE - 1)
55
56#define DONE_MASK 0x1
57#define ERRORS_MASK 0xFFFF
58
59
60
61/** CONTROL REGISTERS **/
62#define EVALFIT_REGBASE_OFFSET 0
63
64#define EVALFIT_CONTROL_OFFSET EVALFIT_REGBASE_OFFSET + 0
65#define CONTROL_RESET_MASK 0x80000000
66#define CONTROL_START_MASK 0x40000000
67
68#define EVALFIT_STATUS_OFFSET EVALFIT_REGBASE_OFFSET + 0
69#define EVALFIT_SRCADDR_OFFSET EVALFIT_REGBASE_OFFSET + 4
70#define EVALFIT_DSTADDR_OFFSET EVALFIT_REGBASE_OFFSET + 8
71#define EVALFIT_TRANSFERSIZE_OFFSET EVALFIT_REGBASE_OFFSET + 12
72#define EVALFIT_REG_OFFSET EVALFIT_REGBASE_OFFSET + 16
73
74/** WRITE REGISTERS **/
75#define EVALFIT_WREG4 (EVALFIT_REGBASE_OFFSET + (4*4))
76#define EVALFIT_WREG5 (EVALFIT_REGBASE_OFFSET + (4*5))
77#define EVALFIT_wREG6 (EVALFIT_REGBASE_OFFSET + (4*6))
78#define EVALFIT_wREG7 (EVALFIT_REGBASE_OFFSET + (4*7))
79#define EVALFIT_wREG8 (EVALFIT_REGBASE_OFFSET + (4*8))
80
81/** READ REGISTERS **/
82#define EVALFIT_RDREG0 (EVALFIT_REGBASE_OFFSET)
83#define EVALFIT_RDREG1 (EVALFIT_REGBASE_OFFSET + (4*1))
84#define EVALFIT_RDREG2 (EVALFIT_REGBASE_OFFSET + (4*2))
85#define EVALFIT_RDREG3 (EVALFIT_REGBASE_OFFSET + (4*3))
86#define EVALFIT_RDREG4 (EVALFIT_REGBASE_OFFSET + (4*4))
87#define EVALFIT_RDREG5 (EVALFIT_REGBASE_OFFSET + (4*5))
88#define EVALFIT_RDREG6 (EVALFIT_REGBASE_OFFSET + (4*6))
89#define EVALFIT_RDREG7 (EVALFIT_REGBASE_OFFSET + (4*7))
90
91/** MEMORY **/
92#define EVALFIT_MEMOFFSET 0x1000
93#define EVALFIT_OBJOFFSET EVALFIT_MEMOFFSET + (0x40 * 8)
94
95/** CROMOSOMA **/
96#define CROMO_NIVEL_OFFSET
97
Examples/ehw4/src/sintesishw_client.c
1/*********************************************************************************************************
2** Programa para probar la sintesis combinacional mediante programacion genetica,
3** se usan sockets para repartir carga de trabajo a otros clientes
4** Se usa periferico evalfit del proyecto ehw3
5** se aceleran 5 arboles, que en el presente codigo se llama pentarbol
6** compilar con math.h -lm
7** compilar con threads: -lpthread
8** gcc sintesishw_client.c -lm -lpthread -o sintesishw_client_ppc
9** ejecutar:
10** ./sintesishw_client_386 vars poblacion generaciones pentarboles sar.dat sar2.dat
11**
12**********************************************************************************************************/
13
14#include <stdio.h>
15#include <termios.h>
16#include <sys/mman.h>
17#include <stdlib.h>
18#include <sys/types.h>
19#include <sys/stat.h>
20#include <fcntl.h>
21#include <time.h>
22#include <math.h>
23#include <pthread.h>
24#include <stdio.h>
25#include <sys/socket.h>
26#include <netinet/in.h>
27#include <netdb.h>
28#include <errno.h>
29#include <sys/un.h>
30#include <sintesishw_client.h>
31
32/**************************************************************************************************************************************
33    */
34create_connect_socket(char *addr, int *fd_ap)
35{
36    int fd;
37    struct sockaddr_in input_addr;
38    struct sockaddr_in server;
39     if (inet_aton(addr, &input_addr.sin_addr)==-1)
40    { perror("inet_aton");
41      exit(-1);
42    }
43
44       if ((fd=socket(AF_INET, SOCK_STREAM, 0))==-1){
45      printf("socket() error\n");
46      exit(-1);
47       }
48
49    server.sin_family = AF_INET;
50       server.sin_port = htons(PORT);
51       server.sin_addr = input_addr.sin_addr;
52       bzero(&(server.sin_zero),8);
53
54   if(connect(fd, (struct sockaddr *)&server, sizeof(struct sockaddr))==-1)
55    {
56 // printf("connect() error en %s\n",addr);
57      perror("connect");
58      exit(-1);
59       }
60/* printf(".");*/
61    *fd_ap = fd;
62}
63
64
65rx_cromo(int fd, void *data_socket_rx_ap, char *cromo_sal, int *fitness, int pentarboles, int *generacion, int *tiempo, int *aux_sal)
66{
67void *ap1;
68int i, j, numbytes_rx;
69int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
70int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4};
71int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1};
72int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0};
73
74
75    if ((numbytes_rx=recv(fd,data_socket_rx_ap,MAXDATASIZE,0)) == -1){
76      printf("Error en recv() \n");
77      perror("recv");
78      exit(-1);
79       }
80    ap1 = data_socket_rx_ap;
81/* printf("Rx:%i ",ntohl(*(int *)ap1));*/
82    ap1 = ap1 + 4;
83    for(i=0; i < RESULTADOS ;i++)
84    {
85        for(j=0; j < LONG_INDIV ;j++)
86        {
87            *(cromo_sal + j + (LONG_INDIV*i)) = *(char *)ap1;
88            ap1 ++;
89        }
90        *(fitness + i) = ntohl(*(int *)ap1) & 0xFFFF;
91        *(generacion + i) = ntohl(*(int *)ap1) >> 16;
92        ap1 = ap1 + 4;
93        *(tiempo+i) = ntohl(*(int *)ap1);
94        ap1 = ap1 + 4;
95    }
96    for(i = 0; i < maxgeneraciones*2 ;i++)
97    {
98        *(aux_sal + i) = ntohl(*(int *)ap1);
99        ap1 = ap1 + 4;
100    }
101}
102
103tx_cromo(struct gen_datos_tipo *gen_datos, int fd)
104{
105void *data_socket_tx_ap, *ap1;
106int *objetivo, i, numbytes_tx;
107
108    data_socket_tx_ap = malloc((gen_datos->tamaobj)*sizeof(int) + gen_datos->tamacrom + 0xFF);
109    ap1= data_socket_tx_ap;
110
111    *(int *)ap1 = htonl(gen_datos->tamaobj | (maxgeneraciones << 16));
112    ap1 = ap1 + 4;
113    objetivo = gen_datos->objetivo;
114    for(i=0; i < (gen_datos->tamaobj); i++)
115    {
116        *(int *)ap1 = htonl(objetivo[i]);
117        ap1 = ap1 + 4;
118    }
119    *(int *)ap1 = htonl(gen_datos->pentarboles | (gen_datos->vars << 16));
120    ap1 = ap1 + 4;
121    *(int *)ap1 = htonl(gen_datos->tamacrom | (poblacion << 16));
122    ap1 = ap1 + 4;
123
124    for(i = 0; i < (gen_datos->tamacrom); i++)
125    {
126        *(char *)(ap1) = *(char *)(gen_datos->cromo_entrada + i);
127        ap1 = ap1 + 1;
128    }
129
130    *(int *)ap1 = htonl(gen_datos->fitness_entrada); //fitness de entrada?
131    ap1 = ap1 + 4;
132    *(int *)ap1 = htonl((gen_datos->en_cromo_entrada<<16) | gen_datos->nivel_max);
133    ap1 = ap1 + 4;
134    *(int *)ap1 = htonl(gen_datos->aux); //datos varios
135    ap1 = ap1 + 4;
136    *(int *)ap1 = htonl(0xa55a9669); //datos varios
137    ap1 = ap1 + 4;
138    numbytes_tx = ap1 - data_socket_tx_ap;
139    send(fd, data_socket_tx_ap, numbytes_tx ,0); //enviar
140    free(data_socket_tx_ap);
141
142}
143
144
145
146/**************************************************************************************************************************************
147    crea una poblacion, y envia a placas para evolucionar */
148iniciar_evol(struct gen_datos_tipo *gen_datos)
149{
150int *generacion, k, a, i, j = 0, vars;
151int conta=0, aux1, aux2, *fitness, *fitness2, *entrada, *objetivo, tamaobj, pentarboles, maxgens, *fitness_sal, fitness_entrada, nivel_max, *aux_sal;
152char o, *ap, *cromo, *ordenpoblacion, *cromo_sal, *cromo_entrada;
153int *tiempo;
154int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
155int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4};
156int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1};
157int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0};
158
159/* variables para sockets */
160    int fds[8],fd1, fd2, fd3, fd4, fd5, fd6, fd7, fd8, numbytes_tx, numbytes_rx; /* ficheros descriptores para sockets*/
161    void *data_socket_rx_ap;
162    char server[][16] = {IP0, IP1, IP2, IP3, IP4, IP5, IP6, IP7};
163
164    pentarboles = gen_datos->pentarboles;
165    vars = gen_datos->vars;
166    generacion = gen_datos->generacion;
167    tiempo = gen_datos->tiempo;
168    aux_sal = gen_datos->aux_sal;
169
170    cromo = malloc(sizeof(cromo) * (poblacion + 2) * LONG_INDIV); if(cromo==0) printf("Error en malloc");
171    fitness = malloc(sizeof(fitness) * (poblacion+1)); if(fitness==0) printf("Error en malloc");
172    fitness2 = malloc(sizeof(fitness2) * (poblacion+1)); if(fitness2==0) printf("Error en malloc");
173    ordenpoblacion = malloc(sizeof(ordenpoblacion) * (poblacion+1)); if(ordenpoblacion==0) printf("Error en malloc");
174
175    for(i=0; i < nodos; i++) //enviar a nodos
176    {
177        create_connect_socket(server[i], &fds[i]);
178    }
179
180/* preparar socket para recibir */
181    data_socket_rx_ap = malloc(10000);
182
183if(PAR_ONLYFIT==1)
184{
185    gen_poblacion(cromo, pentarboles, vars);
186
187    // cruzar
188            for(i = ((poblacion*1)/8); i < ((poblacion*2)/8); i=i+4) //salvar los primeros 4 y cruzar
189            {
190                cross2point(cromo+i*LONG_INDIV, cromo + i*LONG_INDIV, cromo+((i)*LONG_INDIV), cromo+((i+1)*LONG_INDIV), pentarboles);
191                cross2point(cromo+i*LONG_INDIV, cromo + i*LONG_INDIV, cromo+((i+2)*LONG_INDIV), cromo+((i+3)*LONG_INDIV), pentarboles);
192            }//cruzar
193
194    // Mutacion
195            for(i = ((poblacion*2)/8); i < ((poblacion*3)/8); i++)
196            {
197                muta_indiv(cromo + i*LONG_INDIV, cromo + ((( i )) * LONG_INDIV), pentarboles, vars);
198            }
199            for(i = ((poblacion*3)/8); i < ((poblacion*4)/8); i++)
200            {
201                muta_indiv(cromo + i*LONG_INDIV, cromo + ((( i )) * LONG_INDIV), pentarboles, vars);
202            }
203
204    //crear nuevos indiv reemplazar por taras
205            for(i = ((poblacion*4)/8); i < poblacion; i++)
206            {
207                gen_indiv((cromo + ((( i)) * LONG_INDIV)), pentarboles, vars);
208            }
209
210            *generacion++;
211}
212
213    gen_datos->tamacrom = LONG_INDIV;
214
215for(j=0;j<1;j++)
216{
217    for(i=0; i<nodos;i++) //enviar a nodos
218    {
219        tx_cromo(gen_datos, fds[i]);
220    }
221
222    cromo_sal = gen_datos->cromo_sal;
223
224    for(i=0; i<nodos;i++) //recoger fitness o cromosomas resultantes
225    {
226        rx_cromo(fds[i], data_socket_rx_ap, cromo_sal+(LONG_INDIV*RESULTADOS*i), gen_datos->fitness+(RESULTADOS*i), pentarboles,generacion + (RESULTADOS*i),tiempo+(RESULTADOS*i), aux_sal+(maxgeneraciones*2*i));
227    }
228
229}
230
231    free(cromo);
232    free(fitness);
233    free(fitness2);
234    free(ordenpoblacion);
235    free(data_socket_rx_ap);
236    for(i=0; i<nodos;i++) close(fds[i]);
237}
238
239
240/*******************************************************************************************************************************/
241/*******************************************************************************************************************************/
242/*******************************************************************************************************************************/
243/*******************************************************************************************************************************/
244
245int main( int argc, char** argv )
246{
247    int *generacion, k, a, b, z, i, j= 0, error, nivel_max, vars, *tiempo, poblacion_total, m, p, iteraciones, T;
248    int conta=0, aux1, aux2, pentarboles, *fitness1, *fitness2, *entrada, *orderesult, aux, *aux_sal;
249    char o, *ap, *valor_devuelto;;
250    char *cromo_sal1, *cromo_sal2, *cromo_entrada;
251    int tamaobj, objetivo[8192], obj_combs;//= {0,254,123,16,87,56,34,76,89,155,199};
252    long int tiempo1, tiempo2;
253    float tiempof, tiempof2, Tfloat, float1, float2;
254
255    int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
256    int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4};
257    int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1};
258    int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0};
259
260/* Estructuras para datos de cromosomas*/
261    struct gen_datos_tipo data_struct1, data_struct2;
262    struct gen_datos_tipo *data_struct_ap1, *data_struct_ap2;
263    data_struct_ap1 = &data_struct1;
264    data_struct_ap2 = &data_struct2;
265
266/* Variables para tablas de lut*/
267    FILE *f1;
268    int size1;
269    srand ( (time(NULL)) );
270
271/* Variables para almacenar datos para graficar*/
272    int *datos, *datos2, x, media=4, puntos;
273    FILE *fich, *fich2;
274
275    char output_file_name[128], output_file_fitness_name[128];
276    sscanf(argv[1], "%i",&vars);
277    sscanf(argv[2], "%i", &poblacion_total);
278    sscanf(argv[3], "%i", &maxgeneraciones);
279    sscanf(argv[4], "%i", &nodos);
280    sscanf(argv[5], "%s", output_file_name);
281    sscanf(argv[6], "%s", output_file_fitness_name);
282// printf("\nvars: %i indivs:%i generations:%i nodos:%i ", vars, poblacion_total, maxgeneraciones, nodos);
283    fflush(stdout);
284
285    pentarboles = 1; //MODIFIQUE NIVEL_MAX
286    nivel_max = 2;
287    poblacion = poblacion_total/nodos;
288    m = 1; //datos a migrar
289    p = 8; //frecuencia de migracion
290    T = 4; //temperatura para crear nuevos indiv. A mayor T menor temperatura
291    i=0;
292    tamaobj=0;
293    aux = (T << 16) | p;
294    iteraciones = maxgeneraciones/p;
295    maxgeneraciones = p;
296
297    obj_combs = pow(2, (vars/2));
298
299/*Armar funcion objetivo comparador*/ /* OJO, SE ESTÁN METIENDO VALORES DE 1EXX EN LAS LUT Y ESOS INDIVIDUOS AL PARECER QUEDAN MAL */
300    for(a=0; a < obj_combs ;a++)
301    {
302        for(b=0; b < obj_combs ;b++)
303        {
304            if(a > b)z=1; if(a < b)z=2; if(a == b)z=4;
305            if((z & 0x4) != 0 )
306            {
307                objetivo[tamaobj] = i;
308                printf("%i ",objetivo[tamaobj]);
309                tamaobj++;
310            }
311            i++;
312        }
313    }
314// printf("Tama:%i ",tamaobj);
315
316/* Tabla para las LUT*/
317    f1 = fopen("funlut.dat","r");
318    if(f1 == NULL){
319        printf("\nError de lectura de archivo!");
320        return 0;}
321
322    fseek (f1, 0, SEEK_END);
323    size1 = ftell(f1);
324    funlut_ap = malloc(size1); if(funlut_ap==0) printf("Error en malloc");
325    rewind (f1);
326    fread(funlut_ap,1,size1,f1);
327    fclose(f1);
328
329    puntos = 16; /*numero de puntos para la grafica*/
330    datos = malloc(sizeof(datos)*puntos*3); if(datos==0) printf("Error en malloc");
331    fich=fopen(output_file_name,"wb");
332    datos2 = malloc(sizeof(datos2) * maxgeneraciones * p * nodos); if(datos2==0) printf("Error en malloc");
333    fich2=fopen(output_file_fitness_name,"wb");
334
335    cromo_sal1 = malloc(sizeof(cromo_sal1) * RESULTADOS * LONG_INDIV * nodos); if(cromo_sal1==0) printf("Error en malloc");
336    fitness1 = malloc(sizeof(fitness1) * RESULTADOS * nodos); if(fitness1==0) printf("Error en malloc");
337    cromo_sal2 = malloc(sizeof(cromo_sal2) * RESULTADOS * LONG_INDIV * nodos); if(cromo_sal2==0) printf("Error en malloc");
338    fitness2 = malloc(sizeof(fitness2) * RESULTADOS * nodos); if(fitness2==0) printf("Error en malloc");
339    cromo_sal2 = malloc(sizeof(cromo_sal2) * RESULTADOS * LONG_INDIV * nodos); if(cromo_sal2==0) printf("Error en malloc");
340    generacion = malloc(sizeof(generacion)* RESULTADOS * nodos); if(generacion==0) printf("Error en malloc");
341    tiempo = malloc(sizeof(tiempo)* RESULTADOS * nodos); if(tiempo==0) printf("Error en malloc");
342    cromo_entrada = malloc(sizeof(cromo_entrada)* LONG_INDIV * m); if(cromo_entrada==0) printf("Error en malloc");
343    orderesult = malloc(sizeof(orderesult) * nodos*RESULTADOS); if(orderesult==0) printf("Error en malloc");
344    aux_sal = malloc(sizeof(aux_sal) * nodos * maxgeneraciones * 2); if(aux_sal==0) printf("Error en malloc");
345
346    data_struct_ap1->objetivo = objetivo;
347    data_struct_ap1->tamaobj = tamaobj;
348    data_struct_ap1->pentarboles = pentarboles;
349    data_struct_ap1->maxgen = maxgeneraciones;
350    data_struct_ap1->cromo_sal = cromo_sal1;
351    data_struct_ap1->fitness = fitness1;
352    data_struct_ap1->cromo_entrada = cromo_entrada;
353    data_struct_ap1->fitness_entrada = 0;
354    data_struct_ap1->nivel_max = nivel_max;
355    data_struct_ap1->vars= vars;
356    data_struct_ap1->en_cromo_entrada = 0;
357    data_struct_ap1->generacion = generacion;
358    data_struct_ap1->tiempo = tiempo;
359    data_struct_ap1->aux = aux;
360    data_struct_ap1->aux_sal = aux_sal;
361
362/* printf("\npentarboles:%i nivel_max%i ", pentarboles ,nivel_max);*/
363/* fflush(stdout); */
364
365/* Iniciar evolucion */
366
367    x = 0;
368    fflush(stdout);
369    for(k = 0; k < iteraciones ; k++)
370    {
371        tiempo1 = get_timestamp();
372        iniciar_evol(data_struct_ap1);
373        tiempo2 = get_timestamp();
374        *tiempo = tiempo2 - tiempo1;
375        tiempof2 = *tiempo;
376        tiempof = tiempof2/(1000000);
377// printf("\n%i %i %i %5f",nodos, vars, poblacion_total, tiempof);
378        fprintf(fich, "\n%i %i %i %5f",nodos, vars, poblacion_total, tiempof);
379
380        for(i = 0; i < nodos*RESULTADOS; i++) //Organizar lo q llego, ¡solo se indexa orderesult, que dice en q orden estan los cromosomas!
381        {
382            *(orderesult + i) = i; //se inicializa el stream para el orden
383        }
384
385        for(i=0; i< nodos*RESULTADOS; i++)
386        {
387            for(j=i+1; j< nodos*RESULTADOS; j++)
388            {
389                if(*(fitness1 + j) < *(fitness1 + i))
390                {
391                    aux1 = *(orderesult + i);
392                    *(orderesult + i) = *(orderesult + j);
393                    aux2 = *(fitness1 + i);
394                    *(fitness1 + i) = *(fitness1 + j);
395                    *(orderesult + j) = aux1;
396                    *(fitness1 + j) = aux2;
397                    aux1 = *(generacion + i);
398                    *(generacion + i) = *(generacion + j);
399                    *(generacion + j) = aux1;
400                }
401            }
402        }
403
404        for(i = 0; i < maxgeneraciones; i=i+maxgeneraciones) //revisar mediciones
405        {
406            aux1 = 0;
407            aux2 = 0;
408            for(j = 0; j < nodos; j++)
409            {
410                aux1 = aux1 + *(aux_sal + (maxgeneraciones * 2 * j) + i);
411                aux2 = aux2 + *(aux_sal + (maxgeneraciones * 2 * j) + maxgeneraciones + i);
412            }
413            aux1 = aux1 / nodos;
414            aux2 = aux2 / nodos;
415            if((x&(((iteraciones*p)/puntos)-1)) == 0x0)
416                fprintf(fich2, "%i %i %i\n",(k*p)+i, aux1, aux2);
417
418// printf("%i %i %i %i\n",(k*p)+i, aux1, aux2, T);
419        }
420
421        for(i = 0; i < LONG_INDIV; i++ )
422        {
423           *(char *)(cromo_entrada + i) = *(char *)(cromo_sal1 + (*(orderesult)*LONG_INDIV) + i);
424        }
425        data_struct_ap1->en_cromo_entrada = 1;
426        x = x + p;
427        float1 = k;
428        float2 = iteraciones;
429        Tfloat = (float1/float2)*4;
430        T = 1 + (int)Tfloat;
431        aux = (T << 16) | p;
432           data_struct_ap1->aux = aux;
433    }
434
435    for(i=0; i < RESULTADOS-1 ;i++)
436    {
437        printf("\nfit%i:%i gnrcn:%i ", i, *(fitness1), *(generacion + *(orderesult + i)));
438        mostrar_indiv(cromo_sal1 + ( *orderesult * LONG_INDIV ), pentarboles, vars);
439    }
440
441    x++;
442
443    free(cromo_sal1);
444    free(fitness1);
445    free(cromo_sal2);
446    free(fitness2);
447    free(cromo_entrada);
448    free(orderesult);
449    free(generacion);
450    free(tiempo);
451    free(aux_sal);
452
453fclose(fich);
454fclose(fich2);
455
456free(datos);
457free(datos2);
458free(funlut_ap);
459
460return 0;
461}
Examples/ehw4/src/sintesishw_client.h
1
2/** Genetic definitions **/
3#define PAR_ONLYFIT 0 //paralelizacion, 0 ALGORITMO ENTERO, 1 SOLO FITNESS
4
5#define RESULTADOS 2
6
7/* Numero de generaciones en el que se amplia la logitud del cromosoma*/
8
9#define ARBOLES 5
10#define LONG_ARBOL 8
11
12#define nivel1 pentarboles * 4
13#define ARBOLES_INDIV (int)(nivel1 + *(nivel2+pentarboles) + *(nivel3+pentarboles) + *(nivel4+pentarboles) + *(nivel5+pentarboles))
14#define LONG_INDIV (int)(ARBOLES_INDIV * LONG_ARBOL)
15
16//sockets defs
17#define PORT 3550 /* El puerto que sera abierto */
18#define BACKLOG 2 /* El numero de conexiones permitidas */
19#define MAXDATASIZE 10000 /* El numero maximo de datos en bytes */
20#define IP0 "192.168.0.4"
21#define IP1 "192.168.0.6"
22#define IP2 "192.168.0.7"
23#define IP3 "192.168.0.8"
24#define IP4 "192.168.0.9"
25#define IP5 "192.168.0.10"
26#define IP6 "192.168.0.11"
27#define IP7 "192.168.0.12"
28
29//#define IP0 "193.147.52.150"
30//#define IP1 "193.147.52.139"
31
32/* Variables globales */
33char *funlut_ap, *puertas_ap;
34void *evalfit_ptr1, *evalfit_ptr4, *evalfit_ptr3, *evalfit_ptr2;
35int maxgeneraciones, poblacion, nodos;
36
37typedef long long timestamp_t;
38static timestamp_t
39        get_timestamp ()
40{
41    struct timeval now;
42    gettimeofday (&now, NULL);
43    return now.tv_usec + (timestamp_t)now.tv_sec *1000000 ;
44}
45
46struct gen_datos_tipo
47{
48    int *objetivo;
49    int tamaobj;
50    int pentarboles;
51    int vars;
52    int tamacrom;
53    int maxgen;
54    char *cromo_sal;
55    int *fitness;
56    char *cromo_entrada;
57    int fitness_entrada;
58    int nivel_max;
59    int en_cromo_entrada;
60    int *generacion;
61    int *tiempo;
62    int aux;
63    int *aux_sal;
64};
Examples/ehw4/src/sintesishw_server.c
1/*********************************************************************************************************
2** Programa para probar la sintesis combinacional mediante programacion genetica,
3** se usan sockets para repartir carga de trabajo a otros clientes
4** Se usa periferico evalfit del proyecto ehw3
5** se aceleran 5 arboles, que en el presente codigo se llama pentarbol
6** compilar con math.h -lm
7** compilar con threads: -lpthread
8** powerpc-405-linux-gnu-gcc sintesishw_server.c -lm -lpthread -o sintesishw_server_ppc
9**
10**
11**********************************************************************************************************/
12
13#include <stdio.h>
14#include <termios.h>
15#include <sys/mman.h>
16#include <stdlib.h>
17#include <sys/types.h>
18#include <sys/stat.h>
19#include <fcntl.h>
20#include <time.h>
21#include <math.h>
22#include <pthread.h>
23#include <stdio.h>
24#include <sys/socket.h>
25#include <netinet/in.h>
26#include <netdb.h>
27#include <errno.h>
28#include <sys/un.h>
29#include <sintesishw_server.h>
30
31/**************************************************************************************************************************************
32    crea socket */
33int crear_socket()
34{
35int fd;
36struct sockaddr_in server;
37
38   if ((fd=socket(AF_INET, SOCK_STREAM, 0)) == -1 ) /* Crear socket */
39    {
40      perror("socket");
41      exit(-1);
42       }
43   server.sin_family = AF_INET;
44   server.sin_port = htons(PORT); /* cambiar endianismo */
45   server.sin_addr.s_addr = INADDR_ANY; /* INADDR_ANY coloca nuestra direccion IP */
46   bzero(&(server.sin_zero),8); /* escribimos ceros en el resto de la estructura */
47    if (setsockopt(fd,SOL_SOCKET,SO_REUSEADDR,&server,sizeof(struct sockaddr)) == -1) /* permite reutilizar el puerto */
48    {
49        perror("setsockopt");
50        exit(1);
51    }
52   if(bind(fd,(struct sockaddr*) & server, sizeof(struct sockaddr))==-1) //se asigna el socket
53    {
54        perror("bind");
55        exit(EXIT_FAILURE);
56   }
57return fd;
58}
59
60
61/*******************************************************************************************************************************/
62/*******************************************************************************************************************************/
63/*******************************************************************************************************************************/
64/*******************************************************************************************************************************/
65
66int main()
67{
68    int k, a, i, j = 0, error, vars = 4, *tiempo;
69    int conta=0, aux1, aux2, pentarboles, *fitness1, *fitness2, *entrada, *generacion, aux, *aux_sal;
70    char o, *ap, *valor_devuelto;;
71    char *cromo_sal1, *cromo_sal2, *cromo_entrada, *cromo_ap_aux;
72    int objetivo[8192];//= {0,254,123,16,87,56,34,76,89,155,199};
73    struct gen_datos_tipo data_struct1, data_struct2;
74    struct gen_datos_tipo *data_struct_ap1, *data_struct_ap2;
75
76int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
77int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4};
78int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1};
79int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0};
80
81/* Variables para tablas de lut*/
82    FILE *f1, *f2;
83    int size1, size2;
84
85/* Variables para los sockets */
86    int fd, fd2, numbytes; /* punteros para sockets */
87    struct sockaddr_in server;
88    struct sockaddr_in client;
89    void *data_socket_rx_ap, *data_socket_tx_ap, *ap1;
90    int sin_size;
91
92/*para periferico*/
93    int basemem;
94
95    srand ( (time(NULL)) );
96
97/* Tabla para las LUT*/
98    f1 = fopen("funlut.dat","r");
99    if(f1 == NULL){ printf("\nError de lectura de archivo!");return 0;}
100    fseek (f1, 0, SEEK_END);
101    size1 = ftell(f1);
102    funlut_ap = malloc(size1); if(funlut_ap==0) printf("Error en malloc");
103    rewind (f1);
104    fread(funlut_ap,1,size1,f1);
105    fclose(f1);
106
107    f2 = fopen("puertas.dat","r");
108    if(f2 == NULL){ printf("\nError de lectura de archivo!");return 0;}
109    fseek (f2, 0, SEEK_END);
110    size2 = ftell(f2);
111    puertas_ap = malloc(size2); if(puertas_ap==0) printf("Error en malloc");
112    rewind (f2);
113    fread(puertas_ap,1,size2,f2);
114    fclose(f2);
115
116    basemem = open("/dev/mem", (O_RDWR | O_SYNC)); //abrir dispositivo memoria para mapear dir del periferico
117    if(basemem == -1)
118    { printf("Error al abrir /dev/mem \n");
119    return -1;}
120
121/** iniciar periferico **/
122    if(HW_ENABLE == 1){
123        evalfit_ptr1 = (int *)init_peripheral(EVALFIT_PHYSBASE1, basemem);
124        evalfit_ptr2 = (int *)init_peripheral(EVALFIT_PHYSBASE2, basemem);
125        evalfit_ptr3 = (int *)init_peripheral(EVALFIT_PHYSBASE3, basemem);
126        evalfit_ptr4 = (int *)init_peripheral(EVALFIT_PHYSBASE4, basemem);
127    }
128    data_struct_ap1 = &data_struct1;
129    data_struct_ap2 = &data_struct2;
130
131/* preparar socket para recibir */
132    data_socket_rx_ap = malloc(100000);
133    data_socket_tx_ap = malloc(100000);
134    fd = crear_socket();
135    if(listen(fd, BACKLOG) == -1)
136    { printf("error en listen()\n");
137      exit(-1);
138       }
139
140    //int err, sndsize=8192;
141        //err = setsockopt(fd2, SOL_SOCKET, SO_RCVBUF, (char *)&sndsize, (int)sizeof(sndsize));
142
143   while(1)
144    {
145          sin_size=sizeof(struct sockaddr_in);
146          if ((fd2 = accept(fd,(struct sockaddr *)&client, &sin_size))==-1) /* llamada a accept() */
147        {
148         printf("error en accept()\n");
149         exit(-1);
150          }
151/* printf("Se obtuvo una conexion desde %s\n", inet_ntoa(client.sin_addr) ); //mostrara la IP del cliente QUITAR PARA GANAR VELOCIDAD*/
152
153    numbytes=0;
154    do
155    {
156        if ((aux1=recv(fd2,data_socket_rx_ap+numbytes,8192,0)) == -1){ /* recibir datos del cliente*/
157              perror("recv");
158            printf("Error en recv() \n");
159              exit(-1);
160           }
161           numbytes = numbytes+aux1;
162    }while(*(int *)(data_socket_rx_ap+numbytes-4)!=htonl(0xa55a9669));
163
164        ap1 = data_socket_rx_ap; /* Cargar datos en la estructura para la evolucion */
165        data_struct_ap1->tamaobj = htonl(*(int *)ap1) & 0xFFFF;
166        maxgeneraciones = htonl(*(int *)ap1) >> 16;
167// printf("\ntama obj:%0x maxgens:%i numbytes:%i-- ", data_struct_ap1->tamaobj, maxgeneraciones,numbytes);
168        fflush(stdout);
169        ap1 = ap1 + 4;
170        for(i=0;i < (data_struct_ap1->tamaobj); i++)
171        {
172            objetivo[i] =htonl(*(int *)ap1); //XX
173// printf("obj:%i %i ",i,objetivo[i]);
174            ap1 = ap1 + 4;
175        }
176        data_struct_ap1->objetivo = objetivo;
177        data_struct_ap1->pentarboles = htonl(*(int *)ap1) & 0XFF;
178        pentarboles = data_struct_ap1->pentarboles;
179        vars = htonl(*(int *)ap1) >> 16;
180        data_struct_ap1->vars = vars;
181        ap1 = ap1 + 4;
182        data_struct_ap1->tamacrom = htonl(*(int *)ap1) & 0xFFFF;
183        poblacion = htonl(*(int *)ap1) >> 16;
184// printf("\ntamacrom:%0x poblacion:%i vars:%i pentarboles:%i maxgeneraciones:%i ", data_struct_ap1->tamacrom, poblacion,vars,pentarboles,maxgeneraciones);
185        ap1 = ap1 + 4;
186        cromo_entrada = malloc(sizeof(cromo_entrada) * RESULTADOS * LONG_INDIV); if(cromo_entrada==0) printf("Error en malloc");
187        data_struct_ap1->cromo_entrada = cromo_entrada;
188
189        for(i = 0; i < (data_struct_ap1 -> tamacrom); i++)
190        {
191            *(char *)(cromo_entrada + i) = *(char *)ap1;
192            ap1 = ap1 + 1;
193        }
194
195        data_struct_ap1->fitness_entrada = htonl(*(int *)ap1);
196        ap1 = ap1 + 4;
197        data_struct_ap1->nivel_max = htonl(*(int *)ap1) & 0xFFFF;
198        data_struct_ap1->en_cromo_entrada = htonl(*(int *)ap1) >> 16; //han enviado un cromosoma?
199        ap1 = ap1 + 4;
200        data_struct_ap1->aux = htonl(*(int *)ap1);
201/* printf("\nnivel_max:%0x-- ", data_struct_ap1->nivel_max);*/
202        data_struct_ap1->maxgen = maxgeneraciones;
203
204        cromo_sal1 = malloc(sizeof(cromo_sal1) * RESULTADOS * LONG_INDIV); if(cromo_sal1==0) printf("Error en malloc"); /* reservar para cromosomas */
205        fitness1 = malloc(sizeof(fitness1) * RESULTADOS); if(fitness1==0) printf("Error en malloc");
206        cromo_sal2 = malloc(sizeof(cromo_sal2) * RESULTADOS * LONG_INDIV); if(cromo_sal2==0) printf("Error en malloc");
207        fitness2 = malloc(sizeof(fitness2) * RESULTADOS); if(fitness2==0) printf("Error en malloc");
208        generacion = malloc(sizeof(generacion)); if(generacion==0) printf("Error en malloc");
209        tiempo = malloc(sizeof(tiempo)* RESULTADOS ); if(tiempo==0) printf("Error en malloc");
210        aux_sal = malloc(sizeof(aux_sal)* maxgeneraciones * 2 ); if(aux_sal==0) printf("Error en malloc");
211
212        data_struct_ap1->generacion = generacion;
213        data_struct_ap1->cromo_sal = cromo_sal1;
214        data_struct_ap1->fitness = fitness1;
215        data_struct_ap1->fitness_entrada = 0;
216        data_struct_ap1->tiempo = tiempo;
217        data_struct_ap1->aux_sal = aux_sal;
218
219        *generacion = 0;
220
221        evolucionar(data_struct_ap1); // evolucionar
222
223/* for(i=0; i < RESULTADOS ;i++)*/
224/* {*/
225/* printf(" %i-- fit:%i \t",i , *(fitness1 + i));*/
226/* mostrar_indiv(cromo_sal1 + (i*LONG_INDIV), pentarboles, vars);*/
227/* }*/
228
229        ap1 = data_socket_tx_ap; /* devolver resultados */
230        *(int *)ap1 = ntohl(LONG_INDIV);
231        ap1 = ap1 + 4;
232
233        for(i=0; i < RESULTADOS ;i++)
234        {
235            for(j=0; j < LONG_INDIV ;j++)
236            {
237                *(char *)ap1 = *(cromo_sal1 + j + (LONG_INDIV * i));
238                ap1 ++;
239            }
240            *(int *)ap1 = ntohl(((*generacion) << 16) | (*(fitness1 + i)));
241            ap1 = ap1 + 4;
242            *(int *)ap1 = ntohl(*tiempo);
243            ap1 = ap1 + 4;
244        }
245        for(i=0; i < maxgeneraciones*2 ;i++) //devolver mediciones
246        {
247            *(int *)ap1 = ntohl(*(aux_sal+i));
248            ap1 = ap1 + 4;
249        }
250        numbytes = ap1 - data_socket_tx_ap;
251          send(fd2, data_socket_tx_ap, numbytes, 0); /* devuelve cromosoma y fitness al cliente */
252/* printf("\n");*/
253
254          close(fd2);
255        free(cromo_entrada);
256        free(cromo_sal1);
257        free(fitness1);
258        free(cromo_sal2);
259        free(fitness2);
260        free(generacion);
261        free(tiempo);
262        free(aux_sal);
263       }
264
265
266if(HW_ENABLE == 1){
267    close_peripheral(evalfit_ptr1);
268    close_peripheral(evalfit_ptr2);
269    close_peripheral(evalfit_ptr3);
270    close_peripheral(evalfit_ptr4);
271}
272close(basemem);
273
274
275free(funlut_ap);
276free(puertas_ap);
277free(data_socket_rx_ap);
278free(data_socket_tx_ap);
279shutdown(fd, SHUT_RDWR);
280close(fd);
281
282return 0;
283}
Examples/ehw4/src/sintesishw_server.h
1
2/** Genetic definitions **/
3#define HW_ENABLE 1 //cambiar en genetic.h habilitar hw, 0 se hace por SW
4
5#define RESULTADOS 2
6
7#define ARBOLES 5
8#define LONG_ARBOL 8
9
10#define nivel1 pentarboles * 4
11#define ARBOLES_INDIV (int)(nivel1 + *(nivel2+pentarboles) + *(nivel3+pentarboles) + *(nivel4+pentarboles) + *(nivel5+pentarboles))
12#define LONG_INDIV (int)(ARBOLES_INDIV * LONG_ARBOL)
13
14#define EVALFIT_PHYSBASE1 0xcd800000
15#define EVALFIT_PHYSBASE2 0xcd820000
16#define EVALFIT_PHYSBASE3 0xcd840000
17#define EVALFIT_PHYSBASE4 0xcd860000
18
19//sockets defs
20#define PORT 3550 /* El puerto que sera abierto */
21#define BACKLOG 2 /* El numero de conexiones permitidas */
22#define MAXDATASIZE 10000 /* El numero maximo de datos en bytes */
23
24/* Variables globales */
25char *funlut_ap, *puertas_ap;
26void *evalfit_ptr1, *evalfit_ptr4, *evalfit_ptr3, *evalfit_ptr2;
27int maxgeneraciones, poblacion;
28
29
30typedef long long timestamp_t;
31static timestamp_t
32        get_timestamp ()
33{
34    struct timeval now;
35    gettimeofday (&now, NULL);
36    return now.tv_usec + (timestamp_t)now.tv_sec *1000000 ;
37}
38
39struct gen_datos_tipo
40{
41    int *objetivo;
42    int tamaobj;
43    int pentarboles;
44    int vars;
45    int tamacrom;
46    int maxgen;
47    char *cromo_sal;
48    int *fitness;
49    char *cromo_entrada;
50    int fitness_entrada;
51    int nivel_max;
52    int en_cromo_entrada;
53    int *generacion;
54    int *tiempo;
55    int aux;
56    int *aux_sal;
57};
58
Examples/ehw4/src/test/Makefile
1#OBJS := start.o main.o jz_serial.o
2
3CROSS := mipsel-openwrt-linux-
4INCLUDE = -I. -lm
5CCFLAGS = ${INCLUDE} ${DEBUG} ${WARNINGS}
6#CFLAGS := -O2 -G 0 -mno-abicalls -fno-pic -mips32 -Iinclude
7AFLAGS = -D__ASSEMBLY__ $(CFLAGS)
8LDFLAGS := -T ld.script -nostdlib -EL
9COMMON_SOURCES = jz47xx_gpio.c jz47xx_mmap.c
10COMMON_OBJECTS = $(COMMON_SOURCES:.c=.o)
11H_SOURCES = jz47xx_gpio.h jz47xx_mmap.h
12
13NANO_IP = 192.168.254.101
14
15all: xburst
16
17xburst: xburst.c xburst.h $(COMMON_OBJECTS)
18    $(CROSS)gcc $(COMMON_OBJECTS) xburst.c -o xburst ${CCFLAGS}
19
20.c.o:
21    $(CROSS)gcc $(CCFLAGS) -c $< -o $@
22.S.o:
23    $(CROSS)gcc $(AFLAGS) -c $< -o $@
24
25indent:
26    indent -bad -bap -nbc -bl -nce -i2 --no-tabs --line-length120 $(COMMON_SOURCES) $(H_SOURCES)
27
28upload: xburst
29    scp xburst root@$(NANO_IP):binaries
Examples/ehw4/src/test/enable_irq.c
1/*
2  JZ47xx test gpio
3
4  Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com
5                          Carlos Camargo cicamargoba@unal.edu.co
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
20
21#include <stdio.h>
22#include <unistd.h>
23
24#include "jz47xx_gpio.h"
25
26#define IRQ_PORT JZ_GPIO_PORT_C
27#define IRQ_PIN 15
28
29int
30main ()
31{
32  JZ_PIO *pio = jz_gpio_map (IRQ_PORT);
33
34  if (!pio)
35    return -1;
36
37  jz_gpio_as_irq (pio, IRQ_PIN);
38
39  return 0;
40}
Examples/ehw4/src/test/enable_rx.c
1/*
2  JZ47xx test gpio
3
4  Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com
5                          Carlos Camargo cicamargoba@unal.edu.co
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
20
21#include <stdio.h>
22#include <unistd.h>
23
24#include "jz47xx_gpio.h"
25
26#define RXD_PORT JZ_GPIO_PORT_D
27#define RXD_PIN 26
28
29int
30main ()
31{
32  JZ_PIO *pio = jz_gpio_map (RXD_PORT);
33
34  if (!pio)
35    return -1;
36
37  jz_gpio_as_func (pio, RXD_PIN, 1);
38
39  return 0;
40}
Examples/ehw4/src/test/jz47xx_gpio.c
1/*
2  JZ47xx GPIO at userspace
3
4  Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com
5
6This program is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
10
11This program is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with this program; if not, write to the Free Software
18Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
19
20#include <stdio.h>
21#include <stdlib.h>
22#include <unistd.h>
23
24#include <jz47xx_gpio.h>
25#include <jz47xx_mmap.h>
26
27
28#define JZ_GPIO_BASE 0x10010000
29
30void
31jz_gpio_as_output (JZ_PIO * pio, unsigned int o)
32{
33  pio->PXFUNC = (1 << (o));
34  pio->PXSELC = (1 << (o));
35  pio->PXDIRS = (1 << (o));
36}
37
38void
39jz_gpio_as_input (JZ_PIO * pio, unsigned int o)
40{
41  pio->PXFUNC = (1 << (o));
42  pio->PXSELC = (1 << (o));
43  pio->PXDIRC = (1 << (o));
44}
45
46void
47jz_gpio_as_irq (JZ_PIO * pio, unsigned int o)
48{
49  pio->PXFUNC = (1 << (o));
50  pio->PXSELS = (1 << (o));
51  pio->PXDIRC = (1 << (o));
52}
53
54void
55jz_gpio_set_pin (JZ_PIO * pio, unsigned int o)
56{
57  pio->PXDATS = (1 << (o));
58}
59
60void
61jz_gpio_clear_pin (JZ_PIO * pio, unsigned int o)
62{
63  pio->PXDATC = (1 << (o));
64}
65
66void
67jz_gpio_out (JZ_PIO * pio, unsigned int o, unsigned int val)
68{
69  if (val == 0)
70    pio->PXDATC = (1 << (o));
71  else
72    pio->PXDATS = (1 << (o));
73}
74
75unsigned int
76jz_gpio_get_pin (JZ_PIO * pio, unsigned int o)
77{
78  return (pio->PXPIN & (1 << o)) ? 1 : 0;
79}
80
81int
82jz_gpio_as_func (JZ_PIO * pio, unsigned int o, int func)
83{
84  switch (func)
85    {
86    case 0:
87      pio->PXFUNS = (1 << o);
88      pio->PXTRGC = (1 << o);
89      pio->PXSELC = (1 << o);
90      pio->PXPES = (1 << o);
91      return 1;
92
93    case 1:
94      pio->PXFUNS = (1 << o);
95      pio->PXTRGC = (1 << o);
96      pio->PXSELS = (1 << o);
97      pio->PXPES = (1 << o);
98      return 1;
99
100    case 2:
101      pio->PXFUNS = (1 << o);
102      pio->PXTRGS = (1 << o);
103      pio->PXSELC = (1 << o);
104      pio->PXPES = (1 << o);
105      return 1;
106    }
107  return 0;
108}
109
110JZ_PIO *
111jz_gpio_map (int port)
112{
113  JZ_PIO *pio;
114
115  pio = (JZ_PIO *) jz_mmap (JZ_GPIO_BASE);
116  pio = (JZ_PIO *) ((unsigned int) pio + port * 0x100);
117
118  return pio;
119}
Examples/ehw4/src/test/jz47xx_gpio.h
1/*
2  JZ47xx GPIO at userspace
3
4  Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com
5
6This program is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
10
11This program is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with this program; if not, write to the Free Software
18Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
19
20#ifndef __jz47xx_gpio_h__
21#define __jz47xx_gpio_h__
22
23#define JZ_GPIO_PORT_A 0
24#define JZ_GPIO_PORT_B 1
25#define JZ_GPIO_PORT_C 2
26#define JZ_GPIO_PORT_D 3
27
28typedef volatile unsigned int JZ_REG; /* Hardware register definition */
29
30typedef struct _JZ_PIO
31{
32  JZ_REG PXPIN; /* PIN Level Register */
33  JZ_REG Reserved0;
34  JZ_REG Reserved1;
35  JZ_REG Reserved2;
36  JZ_REG PXDAT; /* Port Data Register */
37  JZ_REG PXDATS; /* Port Data Set Register */
38  JZ_REG PXDATC; /* Port Data Clear Register */
39  JZ_REG Reserved3;
40  JZ_REG PXIM; /* Interrupt Mask Register */
41  JZ_REG PXIMS; /* Interrupt Mask Set Reg */
42  JZ_REG PXIMC; /* Interrupt Mask Clear Reg */
43  JZ_REG Reserved4;
44  JZ_REG PXPE; /* Pull Enable Register */
45  JZ_REG PXPES; /* Pull Enable Set Reg. */
46  JZ_REG PXPEC; /* Pull Enable Clear Reg. */
47  JZ_REG Reserved5;
48  JZ_REG PXFUN; /* Function Register */
49  JZ_REG PXFUNS; /* Function Set Register */
50  JZ_REG PXFUNC; /* Function Clear Register */
51  JZ_REG Reserved6;
52  JZ_REG PXSEL; /* Select Register */
53  JZ_REG PXSELS; /* Select Set Register */
54  JZ_REG PXSELC; /* Select Clear Register */
55  JZ_REG Reserved7;
56  JZ_REG PXDIR; /* Direction Register */
57  JZ_REG PXDIRS; /* Direction Set Register */
58  JZ_REG PXDIRC; /* Direction Clear Register */
59  JZ_REG Reserved8;
60  JZ_REG PXTRG; /* Trigger Register */
61  JZ_REG PXTRGS; /* Trigger Set Register */
62  JZ_REG PXTRGC; /* Trigger Set Register */
63  JZ_REG Reserved9;
64  JZ_REG PXFLG; /* Port Flag Register */
65  JZ_REG PXFLGC; /* Port Flag clear Register */
66} JZ_PIO, *PJZ_PIO;
67
68void jz_gpio_as_output (JZ_PIO * pio, unsigned int o);
69
70void jz_gpio_as_input (JZ_PIO * pio, unsigned int o);
71
72void jz_gpio_set_pin (JZ_PIO * pio, unsigned int o);
73
74void jz_gpio_clear_pin (JZ_PIO * pio, unsigned int o);
75
76void jz_gpio_out (JZ_PIO * pio, unsigned int o, unsigned int val);
77
78unsigned int jz_gpio_get_pin (JZ_PIO * pio, unsigned int o);
79
80int jz_gpio_as_func (JZ_PIO * pio, unsigned int o, int func);
81
82JZ_PIO *jz_gpio_map (int port);
83
84#endif
Examples/ehw4/src/test/jz47xx_gpio.o
Examples/ehw4/src/test/jz47xx_mmap.c
1/*
2 * JZ47xx GPIO lines
3 *
4 * Written 2010 by Andres Calderon andres.calderon@emqbit.com
5 */
6
7#include <stdio.h>
8#include <sys/mman.h>
9#include <fcntl.h>
10#include <stdlib.h>
11#include <termios.h>
12#include <unistd.h>
13
14#include <jz47xx_mmap.h>
15
16
17void *
18jz_mmap (off_t address)
19{
20  int fd;
21
22  void *pio;
23
24  if ((fd = open ("/dev/mem", O_RDWR | O_SYNC)) == -1)
25    {
26      fprintf (stderr, "Cannot open /dev/mem.\n");
27      return 0;
28    }
29
30  pio = (void *) mmap (0, getpagesize (), PROT_READ | PROT_WRITE, MAP_SHARED, fd, address);
31
32  if (pio == (void *) -1)
33    {
34      fprintf (stderr, "Cannot mmap.\n");
35      return 0;
36    }
37
38  return pio;
39}
40
41void *
42jz_fpga_map (off_t address)
43{
44  int fd;
45
46  void *fpga;
47
48  if ((fd = open ("/dev/mem", O_RDWR | O_SYNC)) == -1)
49    {
50      fprintf (stderr, "Cannot open /dev/mem.\n");
51      return 0;
52    }
53
54  fpga = (void *) mmap (0, FPGA_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, address);
55
56  if (fpga == (void *) -1)
57    {
58      fprintf (stderr, "Cannot mmap.\n");
59      return 0;
60    }
61
62  return fpga;
63}
64
Examples/ehw4/src/test/jz47xx_mmap.h
1/*
2 * JZ47xx GPIO lines
3 *
4 * Written 2010 by Andres Calderon andres.calderon@emqbit.com
5 */
6
7#ifndef __jz47xx_mmap_h__
8#define __jz47xx_mmap_h__
9
10#include <sys/mman.h>
11
12#define FPGA_SIZE (1 << 15)
13
14void *jz_mmap (off_t address);
15void *jz_fpga_map (off_t address);
16
17#endif
Examples/ehw4/src/test/jz47xx_mmap.o
Examples/ehw4/src/test/jz_init_sram.c
1/* SAKC FPGA/SRAM interface test
2
3Copyright (C) 2010 Carlos Camargo cicamargoba@unal.edu.co
4                               Andres Calderon andres.calderon@emqbit.com
5
6This program is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
10
11This program is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with this program; if not, write to the Free Software
18Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
19
20#include <stdio.h>
21#include <unistd.h>
22#include <stdlib.h>
23
24#include "jz47xx_gpio.h"
25#include "jz47xx_mmap.h"
26
27#define CS2_PORT JZ_GPIO_PORT_B
28#define CS2_PIN 26
29
30int
31main ()
32{
33  int i;
34  JZ_PIO *pio;
35  int *virt_addr;
36
37  pio = jz_gpio_map (CS2_PORT);
38  jz_gpio_as_func (pio, CS2_PIN, 0);
39
40  virt_addr = (int *) jz_mmap (0x13010000) + 0x18/sizeof(int);
41
42  if (*virt_addr != 0xFFF7700)
43    { // 0 WS, 8 bits
44      *virt_addr = 0xFFF7700;
45      printf ("Configuring CS2 8 bits \n");
46    }
47  else
48    printf ("CS3, already configured\n");
49
50  virt_addr = (int *) jz_fpga_map (0x15000000);
51
52  printf ("Writing Memory..\n");
53
54  srand48(0x3c);
55
56  for (i = 0; i < FPGA_SIZE/4; i++)
57      virt_addr[i] = (lrand48() & 0x00ff);
58
59  printf ("Reading Memory..\n");
60
61
62  srand48(0x3c);
63
64  for (i = 0; i < FPGA_SIZE/4; i++){
65    printf("%X\n", virt_addr[i]);
66    if (virt_addr[i] != (lrand48() & 0x00ff)){
67      printf ("FPGA - Xburst connection test failed on Address:0x%x\n", i);
68      return 1; /* Error */
69    }
70  }
71  printf ("%d\n", i);
72      printf ("FPGA - Xburst connection test passed\n");
73
74  return 0;
75}
Examples/ehw4/src/test/jz_test_gpio.c
1/*
2  JZ47xx test gpio
3
4  Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com
5                          Carlos Camargo cicamargoba@unal.edu.co
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
20
21#include <stdio.h>
22#include <unistd.h>
23
24#include "jz47xx_gpio.h"
25
26//#define TEST_PORT JZ_GPIO_PORT_C
27//#define TEST_PIN 17
28
29int
30main (int argc,char *argv[])
31
32{
33  int TEST_PORT, TEST_PIN;
34
35  if(argc != 3){
36    fprintf(stderr,"\nUsage: %s TEST_PIN_PORT(A=0, B=1, C=2, D=3) TEST_PIN \n",argv[0]);
37  }
38
39  TEST_PORT = JZ_GPIO_PORT_C;
40  TEST_PIN = 17;
41  JZ_PIO *pio = jz_gpio_map (TEST_PORT);
42
43  if (!pio)
44    return -1;
45
46  jz_gpio_as_output (pio, TEST_PIN);
47
48  int tg = 1;
49
50  while (1)
51    {
52      jz_gpio_out (pio, TEST_PIN, tg);
53      printf ("[%d]", jz_gpio_get_pin (pio, TEST_PIN));
54      fflush (stdout);
55      usleep (500 * 1000);
56      tg = !tg;
57    }
58  return 0;
59}
Examples/ehw4/src/test/xburst
Examples/ehw4/src/test/xburst.c
1#include <stdio.h>
2#include <stdlib.h>
3#include "fcntl.h"
4#include <sys/mman.h>
5#include <xburst.h>
6#include "jz47xx_gpio.h"
7#include <jz47xx_mmap.h>
8
9#define CS2_PORT JZ_GPIO_PORT_B
10#define CS2_PIN 26
11
12int periph_map(off_t offset)
13{
14int basemem, baseperiph;
15    basemem = open("/dev/mem", (O_RDWR | O_SYNC)); //abrir dispositivo memoria para mapear dir del periferico
16    if(basemem == -1)
17    {
18        printf("Error to open /dev/mem \n");
19        return -1;
20    }
21    baseperiph = (int )mmap(NULL, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, basemem, offset);// & ~MAP_MASK);
22    if (baseperiph == -1)
23    {
24        printf ("Cannot mmap.\n");
25        return -1;
26    }
27return baseperiph;
28}
29
30
31int main(){
32int i, j;
33int basemem, base_periferico, *ConfigRegsBase_ptr;
34void *peripheral1_ptr;
35void *pio;
36
37printf("Xburst Test...");
38
39basemem = open("/dev/mem", (O_RDWR | O_SYNC)); //abrir dispositivo memoria para mapear dir del periferico
40if(basemem == -1)
41{
42    printf("Error al abrir /dev/mem \n");
43    return -1;
44}
45
46pio = jz_gpio_map(CS2_PORT);
47jz_gpio_as_func (pio, CS2_PIN, 0);
48
49ConfigRegsBase_ptr = (int *)periph_map(CONFIG_REGS_BASE);// + SACR2_OFFSET/sizeof(int);//SMCR2_OFFSET/sizeof(int);
50printf("\n%0x ", *(ConfigRegsBase_ptr + SMCR2_OFFSET/sizeof(int)));
51munmap(ConfigRegsBase_ptr, MAP_SIZE);
52
53peripheral1_ptr = (int *)periph_map(0x14000000);
54
55for(i = 0; i < 0xfff; i=i+4){
56    j = rand();
57// *(int *)(peripheral1_ptr + i) = j;
58// if(j != *(int *)(peripheral1_ptr + i)){
59// printf("\nError at %0x offset:%i\n", (int *)(peripheral1_ptr + i), i); exit(0);
60// }
61    printf("\nReg %i: write:%0x read:%0x", i, j, *(int *)(peripheral1_ptr + i) );
62}
63printf("\nPassed Test\n");
64munmap(peripheral1_ptr, MAP_SIZE);
65
66//munmap(base_periferico, MAP_SIZE);
67close(basemem);
68exit(0);
69}
70
Examples/ehw4/src/test/xburst.h
1
2#define CONFIG_REGS_BASE 0x13010000
3#define SMCR2_OFFSET 0x18
4#define SACR2_OFFSET 0x38
5
6#define MAP_SIZE 0x10000Ul
7#define MAP_MASK (MAP_SIZE - 1)
8#define XBURST_PHYSBASE1 0x14000000
9
10//SMCR2 reset:0x0FFF7700 Address: 0x13010018
KICAD_design_files/SAKC_PCB_v2/SAKC.drl
11M48
2;DRILL file {PCBnew (20090216-final)} date Fri 23 Apr 2010 01:13:58 PM COT
3;FORMAT={-.-/ absolute / inch / decimal}
2;DRILL file {PCBnew (20090216-final)} date Tue 28 Sep 2010 03:28:56 PM COT
3;FORMAT={-.-/ absolute / metric / decimal}
44R,T
55VER,1
66FMAT,2
7INCH,TZ
7METRIC,TZ
88TCST,OFF
99ICI,OFF
1010ATC,ON
11T1C0.012
12T2C0.030
13T3C0.034
14T4C0.038
15T5C0.040
16T6C0.042
17T7C0.052
18T8C0.118
11T1C0.300
12T2C0.762
13T3C0.864
14T4C0.965
15T5C1.016
16T6C1.067
17T7C1.321
18T8C2.997
1919%
2020M47
2121G05
22M72
22M71
2323T1
24X6.466Y5.799
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466480T0
467481M30
binaries/reflash/Makefile
22# Written 2010, by Xiangfu Liu.
33#
44
5LOADER=openwrt-xburst-qi_lb60-u-boot.bin
6KERNEL=openwrt-xburst-qi_lb60-uImage.bin
7ROOTFS_UBI=openwrt-xburst-qi_lb60-root.ubi
8ROOTFS_UBIFS =openwrt-xburst-qi_lb60-root.ubifs
9ROOTFS_TGZ=openwrt-xburst-qi_lb60-rootfs.tar.gz
5LOADER = openwrt-xburst-qi_lb60-u-boot.bin
6KERNEL = openwrt-xburst-qi_lb60-uImage.bin
7ROOTFS_UBI = openwrt-xburst-qi_lb60-root.ubi
8ROOTFS_UBIFS = openwrt-xburst-qi_lb60-root.ubifs
9ROOTFS_TGZ = openwrt-xburst-qi_lb60-rootfs.tar.gz
1010
1111QI_IMAGE_URL=http://downloads.qi-hardware.com/software/images/Ben_NanoNote_2GB_NAND/latest/
1212QI_MIRKO_URL=http://downloads.qi-hardware.com/people/mirko/testing/
lm32/logic/sakc/firmware/boot0-serial/Makefile
3030
3131image.bin: image
3232    $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.bin
33    $(LM32_OBJCOPY) $(SEGMENTS) -O binary image image_bin.bin
3334
3435image.srec: image image.lst
3536    $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec
lm32/logic/sakc/firmware/boot0-serial/image.lst
1
2image: file format elf32-lm32
3
4Sections:
5Idx Name Size VMA LMA File off Algn
6  0 .text 00000270 00000000 00000000 00000054 2**2
7                  CONTENTS, ALLOC, LOAD, CODE
8  1 .rodata 0000001c 00000270 00000270 000002c4 2**2
9                  CONTENTS, ALLOC, LOAD, READONLY, DATA
10  2 .data 0000000c 0000028c 0000028c 000002e0 2**2
11                  CONTENTS, ALLOC, LOAD, DATA
12  3 .bss 00000004 00000298 00000298 000002ec 2**2
13                  ALLOC
14  4 .debug_abbrev 00000219 00000000 00000000 000002ec 2**0
15                  CONTENTS, READONLY, DEBUGGING
16  5 .debug_info 000003d0 00000000 00000000 00000505 2**0
17                  CONTENTS, READONLY, DEBUGGING
18  6 .debug_line 000002d8 00000000 00000000 000008d5 2**0
19                  CONTENTS, READONLY, DEBUGGING
20  7 .debug_frame 000000a0 00000000 00000000 00000bb0 2**2
21                  CONTENTS, READONLY, DEBUGGING
22  8 .debug_loc 000000fb 00000000 00000000 00000c50 2**0
23                  CONTENTS, READONLY, DEBUGGING
24  9 .debug_pubnames 000000bc 00000000 00000000 00000d4b 2**0
25                  CONTENTS, READONLY, DEBUGGING
26 10 .debug_aranges 00000040 00000000 00000000 00000e07 2**0
27                  CONTENTS, READONLY, DEBUGGING
28 11 .debug_ranges 00000018 00000000 00000000 00000e47 2**0
29                  CONTENTS, READONLY, DEBUGGING
30 12 .debug_str 0000017b 00000000 00000000 00000e5f 2**0
31                  CONTENTS, READONLY, DEBUGGING
32 13 .comment 00000011 00000000 00000000 00000fda 2**0
33                  CONTENTS, READONLY
34
35Disassembly of section .text:
36
3700000000 <_ftext>:
38   0: 98 00 00 00 xor r0,r0,r0
39   4: d0 00 00 00 wcsr IE,r0
40   8: 78 01 00 00 mvhi r1,0x0
41   c: 38 21 00 00 ori r1,r1,0x0
42  10: d0 e1 00 00 wcsr EBA,r1
43  14: f8 00 00 03 calli 20 <_crt0>
44  18: 34 00 00 00 nop
45  1c: 34 00 00 00 nop
46
4700000020 <_crt0>:
48  20: 78 1c 00 00 mvhi sp,0x0
49  24: 3b 9c 0f fc ori sp,sp,0xffc
50  28: 78 1a 00 00 mvhi gp,0x0
51  2c: 3b 5a 02 a0 ori gp,gp,0x2a0
52  30: 78 01 00 00 mvhi r1,0x0
53  34: 38 21 02 98 ori r1,r1,0x298
54  38: 78 03 00 00 mvhi r3,0x0
55  3c: 38 63 02 9c ori r3,r3,0x29c
56
5700000040 <.clearBSS>:
58  40: 44 23 00 04 be r1,r3,50 <.callMain>
59  44: 58 20 00 00 sw (r1+0),r0
60  48: 34 21 00 04 addi r1,r1,4
61  4c: e3 ff ff fd bi 40 <.clearBSS>
62
6300000050 <.callMain>:
64  50: 34 01 00 00 mvi r1,0
65  54: 34 02 00 00 mvi r2,0
66  58: 34 03 00 00 mvi r3,0
67  5c: f8 00 00 1d calli d0 <main>
68
6900000060 <irq_enable>:
70  60: 34 01 00 01 mvi r1,1
71  64: d0 01 00 00 wcsr IE,r1
72  68: c3 a0 00 00 ret
73
740000006c <irq_mask>:
75  6c: 34 01 00 0f mvi r1,15
76  70: d0 21 00 00 wcsr IM,r1
77  74: c3 a0 00 00 ret
78
7900000078 <irq_disable>:
80  78: 34 01 00 00 mvi r1,0
81  7c: d0 01 00 00 wcsr IE,r1
82  80: c3 a0 00 00 ret
83
8400000084 <jump>:
85  84: c0 20 00 00 b r1
86
8700000088 <halt>:
88  88: e0 00 00 00 bi 88 <halt>
89
900000008c <read_uint32>:
91 */
92#include "soc-hw.h"
93
94/* prototypes */
95uint32_t read_uint32()
96{
97  8c: 37 9c ff f8 addi sp,sp,-8
98  90: 5b 8b 00 08 sw (sp+8),r11
99  94: 5b 9d 00 04 sw (sp+4),ra
100    uint32_t val = 0, i;
101
102    for (i = 0; i < 4; i++) {
103        val <<= 8;
104        val += (uint8_t)uart_getchar();
105  98: f8 00 00 57 calli 1f4 <uart_getchar>
106uint32_t read_uint32()
107{
108    uint32_t val = 0, i;
109
110    for (i = 0; i < 4; i++) {
111        val <<= 8;
112  9c: 3c 2b 00 08 sli r11,r1,8
113        val += (uint8_t)uart_getchar();
114  a0: f8 00 00 55 calli 1f4 <uart_getchar>
115  a4: b5 61 08 00 add r1,r11,r1
116uint32_t read_uint32()
117{
118    uint32_t val = 0, i;
119
120    for (i = 0; i < 4; i++) {
121        val <<= 8;
122  a8: 3c 2b 00 08 sli r11,r1,8
123        val += (uint8_t)uart_getchar();
124  ac: f8 00 00 52 calli 1f4 <uart_getchar>
125  b0: b5 61 08 00 add r1,r11,r1
126uint32_t read_uint32()
127{
128    uint32_t val = 0, i;
129
130    for (i = 0; i < 4; i++) {
131        val <<= 8;
132  b4: 3c 2b 00 08 sli r11,r1,8
133        val += (uint8_t)uart_getchar();
134  b8: f8 00 00 4f calli 1f4 <uart_getchar>
135    }
136
137    return val;
138}
139  bc: b5 61 08 00 add r1,r11,r1
140  c0: 2b 9d 00 04 lw ra,(sp+4)
141  c4: 2b 8b 00 08 lw r11,(sp+8)
142  c8: 37 9c 00 08 addi sp,sp,8
143  cc: c3 a0 00 00 ret
144
145000000d0 <main>:
146
147int main(int argc, char **argv)
148{
149  d0: 37 9c ff e4 addi sp,sp,-28
150  d4: 5b 8b 00 1c sw (sp+28),r11
151  d8: 5b 8c 00 18 sw (sp+24),r12
152  dc: 5b 8d 00 14 sw (sp+20),r13
153  e0: 5b 8e 00 10 sw (sp+16),r14
154  e4: 5b 8f 00 0c sw (sp+12),r15
155  e8: 5b 90 00 08 sw (sp+8),r16
156  ec: 5b 9d 00 04 sw (sp+4),ra
157    int8_t *p;
158    uint8_t c;
159
160    // Initialize UART
161    uart_init();
162  f0: f8 00 00 40 calli 1f0 <uart_init>
163
164    c = '*'; // print msg on first iteration
165    for(;;) {
166        uint32_t start, size;
167
168        switch (c) {
169  f4: 34 0d 00 67 mvi r13,103
170{
171    int8_t *p;
172    uint8_t c;
173
174    // Initialize UART
175    uart_init();
176  f8: 34 01 00 2a mvi r1,42
177
178    c = '*'; // print msg on first iteration
179    for(;;) {
180        uint32_t start, size;
181
182        switch (c) {
183  fc: 34 0e 00 75 mvi r14,117
184 100: 34 0f 00 64 mvi r15,100
185            case 'g': // goto
186                start = read_uint32();
187                jump(start);
188                break;
189        default:
190            uart_putstr("**SAKC/bootloader** > \r\n");
191 104: 78 10 00 00 mvhi r16,0x0
192
193    c = '*'; // print msg on first iteration
194    for(;;) {
195        uint32_t start, size;
196
197        switch (c) {
198 108: 44 2d 00 08 be r1,r13,128 <main+0x58>
199 10c: 44 2e 00 16 be r1,r14,164 <main+0x94>
200 110: 44 2f 00 0a be r1,r15,138 <main+0x68>
201            case 'g': // goto
202                start = read_uint32();
203                jump(start);
204                break;
205        default:
206            uart_putstr("**SAKC/bootloader** > \r\n");
207 114: ba 00 08 00 mv r1,r16
208 118: 38 21 02 70 ori r1,r1,0x270
209 11c: f8 00 00 48 calli 23c <uart_putstr>
210            break;
211        };
212        c = uart_getchar();
213 120: f8 00 00 35 calli 1f4 <uart_getchar>
214
215    c = '*'; // print msg on first iteration
216    for(;;) {
217        uint32_t start, size;
218
219        switch (c) {
220 124: 5c 2d ff fa bne r1,r13,10c <main+0x3c>
221                size = read_uint32();
222                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
223                uart_putchar( *p );
224                break;
225            case 'g': // goto
226                start = read_uint32();
227 128: fb ff ff d9 calli 8c <read_uint32>
228                jump(start);
229 12c: fb ff ff d6 calli 84 <jump>
230                break;
231        default:
232            uart_putstr("**SAKC/bootloader** > \r\n");
233            break;
234        };
235        c = uart_getchar();
236 130: f8 00 00 31 calli 1f4 <uart_getchar>
237 134: e3 ff ff fc bi 124 <main+0x54>
238                size = read_uint32();
239                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
240                    *p = uart_getchar();
241                break;
242        case 'd': // download
243                start = read_uint32();
244 138: fb ff ff d5 calli 8c <read_uint32>
245                size = read_uint32();
246                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
247 13c: b8 20 58 00 mv r11,r1
248                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
249                    *p = uart_getchar();
250                break;
251        case 'd': // download
252                start = read_uint32();
253                size = read_uint32();
254 140: fb ff ff d3 calli 8c <read_uint32>
255                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
256 144: b5 61 60 00 add r12,r11,r1
257 148: 51 6c ff f6 bgeu r11,r12,120 <main+0x50>
258                uart_putchar( *p );
259 14c: 41 61 00 00 lbu r1,(r11+0)
260                    *p = uart_getchar();
261                break;
262        case 'd': // download
263                start = read_uint32();
264                size = read_uint32();
265                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
266 150: 35 6b 00 01 addi r11,r11,1
267                uart_putchar( *p );
268 154: f8 00 00 31 calli 218 <uart_putchar>
269                    *p = uart_getchar();
270                break;
271        case 'd': // download
272                start = read_uint32();
273                size = read_uint32();
274                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
275 158: 55 8b ff fd bgu r12,r11,14c <main+0x7c>
276                break;
277        default:
278            uart_putstr("**SAKC/bootloader** > \r\n");
279            break;
280        };
281        c = uart_getchar();
282 15c: f8 00 00 26 calli 1f4 <uart_getchar>
283 160: e3 ff ff f1 bi 124 <main+0x54>
284    for(;;) {
285        uint32_t start, size;
286
287        switch (c) {
288            case 'u': // upload
289                start = read_uint32();
290 164: fb ff ff ca calli 8c <read_uint32>
291                size = read_uint32();
292                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
293 168: b8 20 58 00 mv r11,r1
294        uint32_t start, size;
295
296        switch (c) {
297            case 'u': // upload
298                start = read_uint32();
299                size = read_uint32();
300 16c: fb ff ff c8 calli 8c <read_uint32>
301                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
302 170: b5 61 60 00 add r12,r11,r1
303 174: 51 6c ff eb bgeu r11,r12,120 <main+0x50>
304                    *p = uart_getchar();
305 178: f8 00 00 1f calli 1f4 <uart_getchar>
306 17c: 31 61 00 00 sb (r11+0),r1
307
308        switch (c) {
309            case 'u': // upload
310                start = read_uint32();
311                size = read_uint32();
312                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
313 180: 35 6b 00 01 addi r11,r11,1
314 184: 55 8b ff fd bgu r12,r11,178 <main+0xa8>
315                break;
316        default:
317            uart_putstr("**SAKC/bootloader** > \r\n");
318            break;
319        };
320        c = uart_getchar();
321 188: f8 00 00 1b calli 1f4 <uart_getchar>
322 18c: e3 ff ff e6 bi 124 <main+0x54>
323
32400000190 <sleep>:
325void sleep(int msec)
326{
327    uint32_t tcr;
328
329    // Use timer0.1
330    timer0->compare1 = (FCPU/1000)*msec;
331 190: 78 02 00 00 mvhi r2,0x0
332 194: 38 42 02 90 ori r2,r2,0x290
333 198: 38 03 c3 50 mvu r3,0xc350
334 19c: 28 42 00 00 lw r2,(r2+0)
335 1a0: 88 23 08 00 mul r1,r1,r3
336 1a4: 58 41 00 10 sw (r2+16),r1
337    timer0->counter1 = 0;
338 1a8: 34 01 00 00 mvi r1,0
339 1ac: 58 41 00 14 sw (r2+20),r1
340    timer0->tcr1 = TIMER_EN | TIMER_IRQEN;
341 1b0: 34 01 00 0a mvi r1,10
342 1b4: 58 41 00 0c sw (r2+12),r1
343
344    do {
345        //halt();
346         tcr = timer0->tcr1;
347 1b8: 28 41 00 0c lw r1,(r2+12)
348     } while ( ! (tcr & TIMER_TRIG) );
349 1bc: 20 21 00 01 andi r1,r1,0x1
350 1c0: 44 20 ff fe be r1,r0,1b8 <sleep+0x28>
351}
352 1c4: c3 a0 00 00 ret
353
354000001c8 <tic_init>:
355
356void tic_init()
357{
358    // Setup timer0.0
359    timer0->compare0 = (FCPU/1000);
360 1c8: 78 01 00 00 mvhi r1,0x0
361 1cc: 38 21 02 90 ori r1,r1,0x290
362 1d0: 28 21 00 00 lw r1,(r1+0)
363 1d4: 38 02 c3 50 mvu r2,0xc350
364 1d8: 58 22 00 04 sw (r1+4),r2
365    timer0->counter0 = 0;
366 1dc: 34 02 00 00 mvi r2,0
367 1e0: 58 22 00 08 sw (r1+8),r2
368    timer0->tcr0 = TIMER_EN | TIMER_AR | TIMER_IRQEN;
369 1e4: 34 02 00 0e mvi r2,14
370 1e8: 58 22 00 00 sw (r1+0),r2
371}
372 1ec: c3 a0 00 00 ret
373
374000001f0 <uart_init>:
375    //uart0->lcr = 0x03; // Line Control Register: 8N1
376    //uart0->mcr = 0x00; // Modem Control Register
377
378    // Setup Divisor register (Fclk / Baud)
379    //uart0->div = (FCPU/(57600*16));
380}
381 1f0: c3 a0 00 00 ret
382
383000001f4 <uart_getchar>:
384
385char uart_getchar()
386{
387 1f4: 78 01 00 00 mvhi r1,0x0
388 1f8: 38 21 02 8c ori r1,r1,0x28c
389 1fc: 28 22 00 00 lw r2,(r1+0)
390    while (! (uart0->ucr & UART_DR)) ;
391 200: 28 41 00 00 lw r1,(r2+0)
392 204: 20 21 00 01 andi r1,r1,0x1
393 208: 44 20 ff fe be r1,r0,200 <uart_getchar+0xc>
394    return uart0->rxtx;
395 20c: 28 41 00 04 lw r1,(r2+4)
396}
397 210: 20 21 00 ff andi r1,r1,0xff
398 214: c3 a0 00 00 ret
399
40000000218 <uart_putchar>:
401
402void uart_putchar(char c)
403{
404 218: 78 02 00 00 mvhi r2,0x0
405 21c: 38 42 02 8c ori r2,r2,0x28c
406 220: 28 43 00 00 lw r3,(r2+0)
407 224: 20 21 00 ff andi r1,r1,0xff
408    while (uart0->ucr & UART_BUSY) ;
409 228: 28 62 00 00 lw r2,(r3+0)
410 22c: 20 42 00 10 andi r2,r2,0x10
411 230: 5c 40 ff fe bne r2,r0,228 <uart_putchar+0x10>
412    uart0->rxtx = c;
413 234: 58 61 00 04 sw (r3+4),r1
414}
415 238: c3 a0 00 00 ret
416
4170000023c <uart_putstr>:
418
419void uart_putstr(char *str)
420{
421    char *c = str;
422    while(*c) {
423 23c: 40 24 00 00 lbu r4,(r1+0)
424 240: 44 80 00 0b be r4,r0,26c <uart_putstr+0x30>
425 244: 78 02 00 00 mvhi r2,0x0
426 248: 38 42 02 8c ori r2,r2,0x28c
427 24c: 28 43 00 00 lw r3,(r2+0)
428    return uart0->rxtx;
429}
430
431void uart_putchar(char c)
432{
433    while (uart0->ucr & UART_BUSY) ;
434 250: 28 62 00 00 lw r2,(r3+0)
435 254: 20 42 00 10 andi r2,r2,0x10
436 258: 5c 40 ff fe bne r2,r0,250 <uart_putstr+0x14>
437    uart0->rxtx = c;
438 25c: 58 64 00 04 sw (r3+4),r4
439void uart_putstr(char *str)
440{
441    char *c = str;
442    while(*c) {
443        uart_putchar(*c);
444        c++;
445 260: 34 21 00 01 addi r1,r1,1
446}
447
448void uart_putstr(char *str)
449{
450    char *c = str;
451    while(*c) {
452 264: 40 24 00 00 lbu r4,(r1+0)
453 268: 5c 82 ff fa bne r4,r2,250 <uart_putstr+0x14>
454 26c: c3 a0 00 00 ret
lm32/logic/sakc/firmware/boot0-serial/image.srec
1S00D0000696D6167652E7372656314
2S113000098000000D00000007801000038210000B2
3S1130010D0E10000F80000033400000034000000C8
4S1130020781C00003B9C0FFC781A00003B5A02A08D
5S11300307801000038210298780300003863029C9C
6S1130040442300045820000034210004E3FFFFFD92
7S1130050340100003402000034030000F800001DE5
8S113006034010001D0010000C3A000003401000FDE
9S1130070D0210000C3A0000034010000D001000022
10S1130080C3A00000C0200000E0000000379CFFF87F
11S11300905B8B00085B9D0004F80000573C2B0008B4
12S11300A0F8000055B56108003C2B0008F800005228
13S11300B0B56108003C2B0008F800004FB56108004A
14S11300C02B9D00042B8B0008379C0008C3A0000064
15S11300D0379CFFE45B8B001C5B8C00185B8D001469
16S11300E05B8E00105B8F000C5B9000085B9D00042E
17S11300F0F8000040340D00673401002A340E007506
18S1130100340F006478100000442D0008442E0016BB
19S1130110442F000ABA00080038210270F800004891
20S1130120F80000355C2DFFFAFBFFFFD9FBFFFFD67B
21S1130130F8000031E3FFFFFCFBFFFFD5B8205800B7
22S1130140FBFFFFD3B5616000516CFFF64161000015
23S1130150356B0001F8000031558BFFFDF8000026D7
24S1130160E3FFFFF1FBFFFFCAB8205800FBFFFFC805
25S1130170B5616000516CFFEBF800001F31610000B5
26S1130180356B0001558BFFFDF800001BE3FFFFE614
27S113019078020000384202903803C350284200001D
28S11301A0882308005841001034010000584100140D
29S11301B03401000A5841000C2841000C20210001A0
30S11301C04420FFFEC3A00000780100003821029003
31S11301D0282100003802C3505822000434020000D1
32S11301E0582200083402000E58220000C3A0000068
33S11301F0C3A00000780100003821028C28220000EE
34S113020028410000202100014420FFFE2841000471
35S1130210202100FFC3A00000780200003842028CB5
36S113022028430000202100FF286200002042001023
37S11302305C40FFFE58610004C3A00000402400009D
38S11302404480000B780200003842028C28430000EE
39S113025028620000204200105C40FFFE5864000445
40S113026034210001402400005C82FFFAC3A0000096
41S11302702A2A53414B432F626F6F746C6F6164651C
42S10F0280722A2A203E200D0A0000000013
43S10F028CF0000000F0010000F00200008F
44S9030000FC
lm32/logic/sakc/system_tb.v
5252
5353    $dumpfile("system_tb.vcd");
5454    //$monitor("%b,%b,%b,%b",clk,rst,uart_txd,uart_rxd);
55// $dumpvars(-1, dut);
56    $dumpvars(-1,clk,rst,uart_txd,uart_rxd);
55    $dumpvars(-1, dut);
56    //$dumpvars(-1,clk,rst,uart_txd,uart_rxd);
5757    // reset
5858    #0 rst <= 0;
5959    #80 rst <= 1;
plasma/bootldr/bootldr.c
239239         }
240240         break;
241241      case 0x3c: //raw test.bin file
242         ptr1 = (unsigned char*)0x10000000;
242         ptr1 = (unsigned char*)0xE00;
243243         for(i = 0; i < 1024*1024; ++i)
244244         {
245245            ptr1[i] = (unsigned char)ch;
...... 
252252               break; //assume end of file
253253            ch = getch();
254254         }
255         funcPtr = (FuncPtr)0x10000000;
255         funcPtr = (FuncPtr)0xE00;
256256         funcPtr();
257257         break;
258258      }
plasma/gpio/Makefile
1010OBJCOPY = $(CROSS)-objcopy
1111INC_PATH = ../include
1212CFLAGS = -O -I$(INC_PATH) -Wall -c -s
13ILDFLAGS = -Ttext 0 -eentry -Map $@.map -s -N
13ILDFLAGS = -Ttext 0xE00 -eentry -Map $@.map -s -N
1414LDFLAGS = -Ttext 0x10000000 -eentry -Map $@.map -s -N
1515
1616#Internal RAM 0x00
plasma/logic/ram_image.vhd
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4646INIT_02 => X"acacacac0003373cac038cac8cac8cac8c243c40034040033423038f038f8f8f",
4747INIT_03 => X"000300ac0300000034038c8c8c8c8c8c8c8c8c8c8c8c3403acacacacacacacac",
48INIT_04 => X"3c34ac343c34a42434a42434a42434a02434a02434a02434a02434a024343c27",
49INIT_05 => X"8cac343caf008c34a730009434a330009034af008ca730009434a3300090ac34",
50INIT_06 => X"008f300093af00008f8caf24008faf00343c8faf00008f300093af008c34af00",
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7070INIT_1A => X"0000000000000000000000000000000000000000000000000000000000000000",
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...... 
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148148INIT_1B => X"0000000000000000000000000000000000000000000000000000000000000000",
149149INIT_1C => X"0000000000000000000000000000000000000000000000000000000000000000",
...... 
195195
196196   RAMB16_S9_inst2 : RAMB16_S9
197197   generic map (
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203INIT_05 => X"000055550000000300ff000002000000000400000000ff000002000000000031",
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...... 
272272
273273   RAMB16_S9_inst3 : RAMB16_S9
274274   generic map (
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