Hardware Design: SIE
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Hardware Design: SIE Commit Details
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| Examples/drivers/blink/Makefile | ||
|---|---|---|
| 1 | 1 | EXTRA_CFLAGS += -Wall |
| 2 | 2 | CC = mipsel-openwrt-linux-gcc |
| 3 | 3 | OPENWRT_BASE = /home/cain/Embedded/ingenic/sakc/build/openwrt-xburst |
| 4 | KERNEL_SRC = $(OPENWRT_BASE)/build_dir/linux-xburst_qi_lb60/linux-2.6.32.10/ | |
| 4 | KERNEL_SRC = $(OPENWRT_BASE)/build_dir/linux-xburst_qi_lb60/linux-2.6.32.16/ | |
| 5 | 5 | CROSS_COMPILE = mipsel-openwrt-linux- |
| 6 | 6 | |
| 7 | 7 | obj-m += blinker.o |
| Examples/ehw4/logic/Makefile | ||
|---|---|---|
| 1 | DESIGN = ehw | |
| 2 | PINS = $(DESIGN).ucf | |
| 3 | DEVICE = xc3s500e-VQ100-4 | |
| 4 | BGFLAGS = -g TdoPin:PULLNONE -g DonePin:PULLUP \ | |
| 5 | -g CRC:enable -g StartUpClk:CCLK | |
| 6 | ||
| 7 | SIM_CMD = /opt/cad/modeltech/bin/vsim | |
| 8 | SIM_COMP_SCRIPT = simulation/$(DESIGN)_TB.do | |
| 9 | #SIM_INIT_SCRIPT = simulation/$(DESIGN)_init.do | |
| 10 | SIMGEN_OPTIONS = -p $(FPGA_ARCH) -lang $(LANGUAGE) | |
| 11 | SAKC_IP = 192.168.254.101 | |
| 12 | ||
| 13 | SRC = $(DESIGN).v reg_bank.v | |
| 14 | SRC_HDL = evalfit_peripheral.vhd counters.vhd mt.vhd | |
| 15 | all: bits | |
| 16 | ||
| 17 | remake: clean-build all | |
| 18 | ||
| 19 | clean: | |
| 20 | rm -f *~ */*~ a.out *.log *.key *.edf *.ps trace.dat | |
| 21 | ||
| 22 | clean-build: clean | |
| 23 | rm -rf build | |
| 24 | ||
| 25 | cleanall: clean | |
| 26 | rm -rf build $(DESIGN).bit | |
| 27 | ||
| 28 | bits: $(DESIGN).bit | |
| 29 | ||
| 30 | # | |
| 31 | # Synthesis | |
| 32 | # | |
| 33 | build/project.src: | |
| 34 | @[ -d build ] || mkdir build | |
| 35 | @rm -f $@ | |
| 36 | #If you don't have logicores disable this line | |
| 37 | cp *ngc build/ | |
| 38 | for i in $(SRC); do echo verilog work ../$$i >> $@; done | |
| 39 | for i in $(SRC_HDL); do echo VHDL work ../$$i >> $@; done | |
| 40 | ||
| 41 | build/project.xst: build/project.src | |
| 42 | echo "run" > $@ | |
| 43 | echo "-top $(DESIGN) " >> $@ | |
| 44 | echo "-p $(DEVICE)" >> $@ | |
| 45 | echo "-opt_mode Area" >> $@ | |
| 46 | echo "-opt_level 1" >> $@ | |
| 47 | echo "-ifn project.src" >> $@ | |
| 48 | echo "-ifmt mixed" >> $@ | |
| 49 | echo "-ofn project.ngc" >> $@ | |
| 50 | echo "-ofmt NGC" >> $@ | |
| 51 | echo "-rtlview yes" >> $@ | |
| 52 | ||
| 53 | build/project.ngc: build/project.xst $(SRC) | |
| 54 | cd build && xst -ifn project.xst -ofn project.log | |
| 55 | ||
| 56 | build/project.ngd: build/project.ngc $(PINS) | |
| 57 | cd build && ngdbuild -p $(DEVICE) project.ngc -uc ../$(PINS) | |
| 58 | ||
| 59 | build/project.ncd: build/project.ngd | |
| 60 | cd build && map -pr b -p $(DEVICE) project | |
| 61 | ||
| 62 | build/project_r.ncd: build/project.ncd | |
| 63 | cd build && par -w project project_r.ncd | |
| 64 | ||
| 65 | build/project_r.twr: build/project_r.ncd | |
| 66 | cd build && trce -v 25 project_r.ncd project.pcf | |
| 67 | ||
| 68 | $(DESIGN).bit: build/project_r.ncd build/project_r.twr | |
| 69 | cd build && bitgen project_r.ncd -l -w $(BGFLAGS) | |
| 70 | @mv -f build/project_r.bit $@ | |
| 71 | sim: | |
| 72 | cd simulation; $(SIM_CMD) -do $(DESIGN)_TB.do | |
| 73 | ||
| 74 | upload: $(DESIGN).bit | |
| 75 | scp $(DESIGN).bit root@$(SAKC_IP): | |
| Examples/ehw4/logic/counters.vhd | ||
|---|---|---|
| 1 | ------------------------------------------------------------------------------- | |
| 2 | -- -- | |
| 3 | -- MT32 - Mersenne Twister -- | |
| 4 | -- Copyright (C) 2007 HT-LAB -- | |
| 5 | -- -- | |
| 6 | -- Contact : Use feedback form on the website. -- | |
| 7 | -- Web: http://www.ht-lab.com -- | |
| 8 | -- -- | |
| 9 | -- MT32 files are released under the GNU General Public License. -- | |
| 10 | -- -- | |
| 11 | ------------------------------------------------------------------------------- | |
| 12 | -- -- | |
| 13 | -- This library is free software; you can redistribute it and/or -- | |
| 14 | -- modify it under the terms of the GNU Lesser General Public -- | |
| 15 | -- License as published by the Free Software Foundation; either -- | |
| 16 | -- version 2.1 of the License, or (at your option) any later version. -- | |
| 17 | -- -- | |
| 18 | -- This library is distributed in the hope that it will be useful, -- | |
| 19 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- | |
| 20 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -- | |
| 21 | -- Lesser General Public License for more details. -- | |
| 22 | -- -- | |
| 23 | -- Full details of the license can be found in the file "copying.txt". -- | |
| 24 | -- -- | |
| 25 | -- You should have received a copy of the GNU Lesser General Public -- | |
| 26 | -- License along with this library; if not, write to the Free Software -- | |
| 27 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -- | |
| 28 | -- -- | |
| 29 | ------------------------------------------------------------------------------- | |
| 30 | -- -- | |
| 31 | -- Counters, instantiated in top level -- | |
| 32 | ------------------------------------------------------------------------------- | |
| 33 | LIBRARY ieee; | |
| 34 | USE ieee.std_logic_1164.all; | |
| 35 | USE ieee.std_logic_arith.all; | |
| 36 | USE ieee.std_logic_unsigned.all; | |
| 37 | ||
| 38 | ENTITY counters IS | |
| 39 | GENERIC( | |
| 40 | M : integer := 397; | |
| 41 | N : integer := 623 | |
| 42 | ); | |
| 43 | PORT( | |
| 44 | clk : IN std_logic; | |
| 45 | resetn : IN std_logic; | |
| 46 | ena : IN std_logic; | |
| 47 | wea : OUT std_logic; | |
| 48 | kk_cnt : OUT std_logic_vector (9 DOWNTO 0); | |
| 49 | km_cnt : OUT std_logic_vector (9 DOWNTO 0); | |
| 50 | kp_cnt : OUT std_logic_vector (9 DOWNTO 0); | |
| 51 | wr_cnt : OUT std_logic_vector (9 DOWNTO 0) | |
| 52 | ); | |
| 53 | ||
| 54 | END counters ; | |
| 55 | ||
| 56 | -- | |
| 57 | ARCHITECTURE rtl OF counters IS | |
| 58 | ||
| 59 | signal kk_cnt_s : std_logic_vector (9 DOWNTO 0); | |
| 60 | signal km_cnt_s : std_logic_vector (9 DOWNTO 0); | |
| 61 | signal kp_cnt_s : std_logic_vector (9 DOWNTO 0); | |
| 62 | ||
| 63 | signal wr_cnt_s : std_logic_vector (9 DOWNTO 0); | |
| 64 | ||
| 65 | BEGIN | |
| 66 | ||
| 67 | process (clk,resetn) | |
| 68 | begin | |
| 69 | if (resetn='0') then | |
| 70 | wea <= '0'; | |
| 71 | elsif (rising_edge(clk)) then | |
| 72 | wea <= ena; -- wea is delayed by 1 clock cycle to | |
| 73 | end if; -- prevent writing outside the dpram address | |
| 74 | end process; -- address range (0..623) | |
| 75 | ||
| 76 | ||
| 77 | ------------------------------------------------------------------------------- | |
| 78 | -- Write counter which is equal to kk-1 | |
| 79 | -- Required to achieve single cycle read/write | |
| 80 | ------------------------------------------------------------------------------- | |
| 81 | process (clk,resetn) | |
| 82 | begin | |
| 83 | if (resetn='0') then | |
| 84 | wr_cnt_s <= (others => '1'); | |
| 85 | elsif (rising_edge(clk)) then | |
| 86 | if (wr_cnt_s = CONV_STD_LOGIC_VECTOR(N,10)) then | |
| 87 | wr_cnt_s <= (others => '0'); | |
| 88 | elsif ena='1' then | |
| 89 | wr_cnt_s <= wr_cnt_s + '1'; | |
| 90 | end if; | |
| 91 | end if; | |
| 92 | end process; | |
| 93 | wr_cnt <= wr_cnt_s; | |
| 94 | ||
| 95 | ||
| 96 | ------------------------------------------------------------------------------- | |
| 97 | -- kk Counter | |
| 98 | ------------------------------------------------------------------------------- | |
| 99 | process (clk,resetn) | |
| 100 | begin | |
| 101 | if (resetn='0') then | |
| 102 | kk_cnt_s <= (others => '0'); | |
| 103 | elsif (rising_edge(clk)) then | |
| 104 | if (kk_cnt_s = CONV_STD_LOGIC_VECTOR(N,10)) then | |
| 105 | kk_cnt_s <= (others => '0'); | |
| 106 | elsif ena='1' then | |
| 107 | kk_cnt_s <= kk_cnt_s + '1'; | |
| 108 | end if; | |
| 109 | end if; | |
| 110 | end process; | |
| 111 | kk_cnt <= kk_cnt_s; | |
| 112 | ||
| 113 | ------------------------------------------------------------------------------- | |
| 114 | -- kp Counter | |
| 115 | ------------------------------------------------------------------------------- | |
| 116 | process (clk,resetn) | |
| 117 | begin | |
| 118 | if (resetn='0') then | |
| 119 | kp_cnt_s <= "0000000001"; | |
| 120 | elsif (rising_edge(clk)) then | |
| 121 | if (kp_cnt_s = CONV_STD_LOGIC_VECTOR(N,10)) then | |
| 122 | kp_cnt_s <= (others => '0'); | |
| 123 | elsif ena='1' then | |
| 124 | kp_cnt_s <= kp_cnt_s + '1'; | |
| 125 | end if; | |
| 126 | end if; | |
| 127 | end process; | |
| 128 | kp_cnt <= kp_cnt_s; | |
| 129 | ||
| 130 | ------------------------------------------------------------------------------- | |
| 131 | -- km Counter | |
| 132 | ------------------------------------------------------------------------------- | |
| 133 | process (clk,resetn) | |
| 134 | begin | |
| 135 | if (resetn='0') then | |
| 136 | km_cnt_s <= CONV_STD_LOGIC_VECTOR(M,10); | |
| 137 | elsif (rising_edge(clk)) then | |
| 138 | if (km_cnt_s = CONV_STD_LOGIC_VECTOR(N,10)) then | |
| 139 | km_cnt_s <= (others => '0'); | |
| 140 | elsif ena='1' then | |
| 141 | km_cnt_s <= km_cnt_s + '1'; | |
| 142 | end if; | |
| 143 | end if; | |
| 144 | end process; | |
| 145 | km_cnt <= km_cnt_s; | |
| 146 | ||
| 147 | end architecture rtl; | |
| Examples/ehw4/logic/dpram624x1.ngc | ||
|---|---|---|
| 1 | XILINX-XDB 0.1 STUB 0.1 ASCII | |
| 2 | XILINX-XDM V1.4e | |
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| |
| Examples/ehw4/logic/dpram624x31.ngc | ||
|---|---|---|
| 1 | XILINX-XDB 0.1 STUB 0.1 ASCII | |
| 2 | XILINX-XDM V1.4e | |
| 3 | $3c44g<,[o}e~g`n;"2*413&;$>"9 > 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| |
| Examples/ehw4/logic/dpram624x32.ngc | ||
|---|---|---|
| 1 | XILINX-XDB 0.1 STUB 0.1 ASCII | |
| 2 | XILINX-XDM V1.4e | |
| 3 | $3ce4g<,[o}e~g`n;"2*413&;$>"9 > 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| |
| Examples/ehw4/logic/ehw.ucf | ||
|---|---|---|
| 1 | NET clk LOC = "P38"; | |
| 2 | NET reset LOC = "P30"; #WARNING change to another pin | |
| 3 | NET led LOC = "P44"; | |
| 4 | NET irq_pin LOC = "P71"; | |
| 5 | ||
| 6 | ||
| 7 | #ADDRESS BUS | |
| 8 | NET "addr<12>" LOC = "P90"; | |
| 9 | NET "addr<11>" LOC = "P91"; | |
| 10 | NET "addr<10>" LOC = "P85"; | |
| 11 | NET "addr<9>" LOC = "P92"; | |
| 12 | NET "addr<8>" LOC = "P94"; | |
| 13 | NET "addr<7>" LOC = "P95"; | |
| 14 | NET "addr<6>" LOC = "P98"; | |
| 15 | NET "addr<5>" LOC = "P3"; | |
| 16 | NET "addr<4>" LOC = "P2"; | |
| 17 | NET "addr<3>" LOC = "P78"; | |
| 18 | NET "addr<2>" LOC = "P79"; | |
| 19 | NET "addr<1>" LOC = "P83"; | |
| 20 | NET "addr<0>" LOC = "P84"; | |
| 21 | ||
| 22 | #DATA BUS | |
| 23 | NET "sram_data<7>" LOC = "P4"; | |
| 24 | NET "sram_data<6>" LOC = "P5"; | |
| 25 | NET "sram_data<5>" LOC = "P9"; | |
| 26 | NET "sram_data<4>" LOC = "P10"; | |
| 27 | NET "sram_data<3>" LOC = "P11"; | |
| 28 | NET "sram_data<2>" LOC = "P12"; | |
| 29 | NET "sram_data<1>" LOC = "P15"; | |
| 30 | NET "sram_data<0>" LOC = "P16"; | |
| 31 | ||
| 32 | #CONTROL BUS | |
| 33 | NET "nwe" LOC = "P88"; | |
| 34 | NET "noe" LOC = "P86"; | |
| 35 | NET "ncs" LOC = "P69"; | |
| 36 | ||
| 37 | ||
| Examples/ehw4/logic/ehw.v | ||
|---|---|---|
| 1 | `timescale 1ns / 1ps | |
| 2 | module ehw(clk, sram_data, addr, nwe, ncs, noe, reset, led, | |
| 3 | irq_pin); | |
| 4 | ||
| 5 | parameter B = (7); | |
| 6 | ||
| 7 | input clk, addr, nwe, ncs, noe, reset; | |
| 8 | inout [B:0] sram_data; | |
| 9 | output led; | |
| 10 | output irq_pin; | |
| 11 | ||
| 12 | // synchronize signals | |
| 13 | reg sncs, snwe; | |
| 14 | reg [12:0] buffer_addr; | |
| 15 | reg [B:0] buffer_data; | |
| 16 | wire led; | |
| 17 | ||
| 18 | // bram-cpu interfaz | |
| 19 | reg we; | |
| 20 | reg w_st=0; | |
| 21 | reg [B:0] wdBus; | |
| 22 | reg [B:0] rdBus; | |
| 23 | wire [12:0] addr; | |
| 24 | reg [7:0] bae; | |
| 25 | ||
| 26 | ||
| 27 | // bram-evalfit interfaz | |
| 28 | wire we_eval, en_ev; | |
| 29 | wire [63:0] ev_do; | |
| 30 | wire [63:0] ev_di; | |
| 31 | ||
| 32 | // Interconnection | |
| 33 | wire [31:0] mt_rnd; | |
| 34 | wire [31:0] reg0; | |
| 35 | wire [31:0] reg1; | |
| 36 | wire [31:0] reg2; | |
| 37 | wire [31:0] reg3; | |
| 38 | wire [31:0] reg4; | |
| 39 | wire [7:0] status; | |
| 40 | wire [15:0] error; | |
| 41 | wire [8:0] evalfit_addr; | |
| 42 | ||
| 43 | wire en_fit; | |
| 44 | wire [15:0] max_com; | |
| 45 | wire [3:0] max_lev; | |
| 46 | wire [7:0] control; | |
| 47 | ||
| 48 | reg [7:0] reg_bank [31:0]; | |
| 49 | wire enReg; | |
| 50 | wire [4:0] address; | |
| 51 | ||
| 52 | // Test : LED blinking | |
| 53 | reg [25:0] counter; | |
| 54 | always @(posedge clk) begin | |
| 55 | if (~reset) | |
| 56 | counter <= {25{1'b0}}; | |
| 57 | else | |
| 58 | counter <= counter + 1; | |
| 59 | end | |
| 60 | assign led = counter[24]; | |
| 61 | ||
| 62 | // Data Bus direction control | |
| 63 | wire T = ~noe | ncs; | |
| 64 | assign sram_data = T?8'bZ:rdBus; | |
| 65 | ||
| 66 | // synchronize assignment | |
| 67 | always @(negedge clk) | |
| 68 | begin | |
| 69 | sncs <= ncs; | |
| 70 | snwe <= nwe; | |
| 71 | buffer_data <= sram_data; | |
| 72 | buffer_addr <= addr; | |
| 73 | end | |
| 74 | ||
| 75 | // write access cpu to bram | |
| 76 | always @(posedge clk) | |
| 77 | if(~reset) {w_st, we, wdBus} <= 0; | |
| 78 | else begin | |
| 79 | wdBus <= buffer_data; | |
| 80 | case (w_st) | |
| 81 | 0: begin | |
| 82 | we <= 0; | |
| 83 | if(sncs | snwe) w_st <= 1; | |
| 84 | end | |
| 85 | 1: begin | |
| 86 | if(~(sncs | snwe)) begin | |
| 87 | we <= 1; | |
| 88 | w_st <= 0; | |
| 89 | end | |
| 90 | else we <= 0; | |
| 91 | end | |
| 92 | endcase | |
| 93 | end | |
| 94 | ||
| 95 | ||
| 96 | // Address Decoder | |
| 97 | // We have 2 memory blocks 1: 512 x 64 bits memory 32kb = 4kB 0000 - 0FFF buffer_addr[12] = 0 | |
| 98 | // 2: Register Bank 1000 - 101F buffer_addr[12] = 1 | |
| 99 | ||
| 100 | // SIE has an eight bits data bus, this module generate the required signals to create a 64 bits word. | |
| 101 | always @(buffer_addr) | |
| 102 | begin | |
| 103 | if(~buffer_addr[12]) begin | |
| 104 | case (buffer_addr[2:0]) | |
| 105 | 0: bae <= 8'h01; | |
| 106 | 1: bae <= 8'h02; | |
| 107 | 2: bae <= 8'h04; | |
| 108 | 3: bae <= 8'h08; | |
| 109 | 4: bae <= 8'h10; | |
| 110 | 5: bae <= 8'h20; | |
| 111 | 6: bae <= 8'h40; | |
| 112 | 7: bae <= 8'h80; | |
| 113 | endcase | |
| 114 | end | |
| 115 | else | |
| 116 | bae <= 8'h00; | |
| 117 | end | |
| 118 | wire en1, en2; // enable memory signals | |
| 119 | assign en0 = bae[0] | bae[1] | bae[2] | bae[3]; | |
| 120 | assign en1 = bae[4] | bae[5] | bae[6] | bae[7]; | |
| 121 | ||
| 122 | reg[31:0] DIA_Aux; | |
| 123 | always @ (posedge clk) begin | |
| 124 | if (bae[0]) DIA_Aux[7:0] = wdBus[7:0]; | |
| 125 | if (bae[1]) DIA_Aux[15:8] = wdBus[7:0]; | |
| 126 | if (bae[2]) DIA_Aux[23:16] = wdBus[7:0]; | |
| 127 | if (bae[3]) DIA_Aux[31:24] = wdBus[7:0]; | |
| 128 | if (bae[4]) DIA_Aux[7:0] = wdBus[7:0]; | |
| 129 | if (bae[5]) DIA_Aux[15:8] = wdBus[7:0]; | |
| 130 | if (bae[6]) DIA_Aux[23:16] = wdBus[7:0]; | |
| 131 | if (bae[7]) DIA_Aux[31:24] = wdBus[7:0]; | |
| 132 | end | |
| 133 | ||
| 134 | reg [2:0] state, nextstate; //FSM for write in 32bit mode to memory | |
| 135 | wire we0, we1; | |
| 136 | wire nreset; | |
| 137 | assign nreset = ~reset; | |
| 138 | parameter S0 = 3'b000; | |
| 139 | parameter S1 = 3'b001; | |
| 140 | parameter S2 = 3'b010; | |
| 141 | ||
| 142 | always @ (posedge clk, posedge nreset) | |
| 143 | if (nreset) state <= S0; | |
| 144 | else state <= nextstate; | |
| 145 | // next state logic | |
| 146 | always@(*) | |
| 147 | case (state) | |
| 148 | S0:if (bae[3]&we) nextstate = S1; | |
| 149 | else | |
| 150 | if (bae[7]&we) nextstate = S2; | |
| 151 | else nextstate = S0; | |
| 152 | S1: nextstate = S0; | |
| 153 | S2: nextstate = S0; | |
| 154 | default: nextstate = S0; | |
| 155 | endcase | |
| 156 | // output logic | |
| 157 | assign we0 = (state == S1); | |
| 158 | assign we1 = (state == S2); | |
| 159 | ||
| 160 | // Read control | |
| 161 | reg [7:0] MemDOA; | |
| 162 | wire [63:0] DOA_Aux; | |
| 163 | ||
| 164 | always @(posedge clk) | |
| 165 | if(~reset)begin | |
| 166 | rdBus = 8'h00; | |
| 167 | end | |
| 168 | else begin | |
| 169 | if(enReg) | |
| 170 | rdBus = reg_bank[address]; | |
| 171 | else | |
| 172 | rdBus = MemDOA[7:0]; | |
| 173 | end | |
| 174 | // memory output mux | |
| 175 | always @(buffer_addr[2:0]) | |
| 176 | case (buffer_addr[2:0]) | |
| 177 | 0 : MemDOA = DOA_Aux[7:0]; | |
| 178 | 1 : MemDOA = DOA_Aux[15:8]; | |
| 179 | 2 : MemDOA = DOA_Aux[23:16]; | |
| 180 | 3 : MemDOA = DOA_Aux[31:24]; | |
| 181 | 4 : MemDOA = DOA_Aux[39:32]; | |
| 182 | 5 : MemDOA = DOA_Aux[47:40]; | |
| 183 | 6 : MemDOA = DOA_Aux[55:48]; | |
| 184 | 7 : MemDOA = DOA_Aux[63:56]; | |
| 185 | default: MemDOA = 8'h00; | |
| 186 | endcase | |
| 187 | ||
| 188 | // Store Inputs | |
| 189 | always @(posedge clk) | |
| 190 | begin | |
| 191 | if(enReg) begin | |
| 192 | reg_bank[20] = error[7:0]; | |
| 193 | reg_bank[21] = error[15:8]; | |
| 194 | reg_bank[22] = status[7:0]; | |
| 195 | reg_bank[24] = mt_rnd[7:0]; | |
| 196 | reg_bank[25] = mt_rnd[15:8]; | |
| 197 | reg_bank[26] = mt_rnd[23:16]; | |
| 198 | reg_bank[27] = mt_rnd[31:24]; | |
| 199 | end | |
| 200 | end | |
| 201 | ||
| 202 | assign address[4:0] = buffer_addr[4:0]; | |
| 203 | assign enReg = buffer_addr[12]; | |
| 204 | ||
| 205 | assign reg0[7:0] = reg_bank[0]; | |
| 206 | assign reg0[15:8] = reg_bank[1]; | |
| 207 | assign reg0[23:16] = reg_bank[2]; | |
| 208 | assign reg0[31:24] = reg_bank[3]; | |
| 209 | assign reg1[7:0] = reg_bank[4]; | |
| 210 | assign reg1[15:8] = reg_bank[5]; | |
| 211 | assign reg1[23:16] = reg_bank[6]; | |
| 212 | assign reg1[31:24] = reg_bank[7]; | |
| 213 | assign reg2[7:0] = reg_bank[8]; | |
| 214 | assign reg2[15:8] = reg_bank[9]; | |
| 215 | assign reg2[23:16] = reg_bank[10]; | |
| 216 | assign reg2[31:24] = reg_bank[11]; | |
| 217 | assign reg3[7:0] = reg_bank[12]; | |
| 218 | assign reg3[15:8] = reg_bank[13]; | |
| 219 | assign reg3[23:16] = reg_bank[14]; | |
| 220 | assign reg3[31:24] = reg_bank[15]; | |
| 221 | assign reg4[7:0] = reg_bank[16]; | |
| 222 | assign reg4[15:8] = reg_bank[17]; | |
| 223 | assign reg4[23:16] = reg_bank[18]; | |
| 224 | assign reg4[31:24] = reg_bank[19]; | |
| 225 | ||
| 226 | assign max_lev = reg_bank[28]; | |
| 227 | assign control = reg_bank[29]; | |
| 228 | assign max_com[7:0] = reg_bank[30]; | |
| 229 | assign max_com[15:8] = reg_bank[31]; | |
| 230 | // Write control | |
| 231 | always @(negedge clk) | |
| 232 | if(we & enReg) begin | |
| 233 | case (address) | |
| 234 | 0: reg_bank[0] = wdBus; | |
| 235 | 1: reg_bank[1] = wdBus; | |
| 236 | 2: reg_bank[2] = wdBus; | |
| 237 | 3: reg_bank[3] = wdBus; | |
| 238 | 4: reg_bank[4] = wdBus; | |
| 239 | 5: reg_bank[5] = wdBus; | |
| 240 | 6: reg_bank[6] = wdBus; | |
| 241 | 7: reg_bank[7] = wdBus; | |
| 242 | 8: reg_bank[8] = wdBus; | |
| 243 | 9: reg_bank[9] = wdBus; | |
| 244 | 10: reg_bank[10] = wdBus; | |
| 245 | 11: reg_bank[11] = wdBus; | |
| 246 | 12: reg_bank[12] = wdBus; | |
| 247 | 13: reg_bank[13] = wdBus; | |
| 248 | 14: reg_bank[14] = wdBus; | |
| 249 | 15: reg_bank[15] = wdBus; | |
| 250 | 16: reg_bank[16] = wdBus; | |
| 251 | 17: reg_bank[17] = wdBus; | |
| 252 | 18: reg_bank[18] = wdBus; | |
| 253 | 19: reg_bank[19] = wdBus; | |
| 254 | 28: reg_bank[28] = wdBus; | |
| 255 | 29: reg_bank[29] = wdBus; | |
| 256 | 30: reg_bank[30] = wdBus; | |
| 257 | 31: reg_bank[31] = wdBus; | |
| 258 | endcase | |
| 259 | end | |
| 260 | ||
| 261 | RAMB16_S36_S36 #(.INIT_00(256'hABCDEF00_00000000_00000000_00000000_00000000_00000000_00000000_76543210) ) | |
| 262 | mem0 ( .CLKA(~clk), .ENA(en0), .SSRA(1'b0), .ADDRA(buffer_addr[11:3]), .WEA(we0), .DIA(DIA_Aux[31:0]), .DIPA(0'b0), .DOA(DOA_Aux[31:0]), | |
| 263 | .CLKB(~clk), .ENB(en_ev), .SSRB(1'b0), .ADDRB(evalfit_addr), .WEB(we_eval), .DIB(ev_do[31:0]), .DIPB(0'b0), .DOB(ev_di[31:0])); | |
| 264 | ||
| 265 | RAMB16_S36_S36 mem1( .CLKA(~clk), .ENA(en1), .SSRA(1'b0), .ADDRA(buffer_addr[11:3]), .WEA(we1), .DIA(DIA_Aux[31:0]), .DIPA(0'b0), .DOA(DOA_Aux[63:32]), | |
| 266 | .CLKB(~clk), .ENB(en_ev),.SSRB(1'b0), .ADDRB(evalfit_addr), .WEB(we_eval), .DIB(ev_do[63:32]), .DIPB(0'b0), .DOB(ev_di[63:32])); | |
| 267 | ||
| 268 | // evalfit_peripheral | |
| 269 | evalfit_peripheral evalfit( .clk(clk), .reset(~reset), .habilita(control[0]), .maxcombs(max_com), .nivel_max(max_lev), | |
| 270 | .peripheral_mem_in(ev_di), .peripheral_mem_en(en_eval), .peripheral_mem_out(ev_do), .peripheral_mem_we(we_eval), | |
| 271 | .peripheral_mem_addr(evalfit_addr), .evalfit3_estado(status), .errores(error), | |
| 272 | .fin_ack(irq_pin), .reg0_s(reg0), .reg1_s(reg1), .reg2_s(reg2), .reg3_s(reg3), .reg4_s(reg4)); | |
| 273 | ||
| 274 | // MersenneTwister | |
| 275 | mt_mem random( .clk(clk), .ena(1'b1), .resetn(reset), .random(mt_rnd)); | |
| 276 | ||
| 277 | endmodule | |
| 278 | ||
| Examples/ehw4/logic/evalfit_peripheral.vhd | ||
|---|---|---|
| 1 | -- 07/11/08 | |
| 2 | -- Evalfit_peripheral | |
| 3 | -- Evalua un arbol de 5 pentarboles, por ahora es valido hasta para *** 14 variables *** | |
| 4 | -- Funciona hasta con 14 vars. | |
| 5 | -- mapa: | |
| 6 | -- 0 - 0x3F Cromosoma | |
| 7 | -- 0x40 - 0x13F Objetivo. 16384 bits. Se empieza por el bit 0 MSB. | |
| 8 | ||
| 9 | ||
| 10 | -- Cromosoma en memoria | |
| 11 | -- bit bit Contenido | |
| 12 | -- 28 a 31 Nivel del arbol | |
| 13 | -- 32 a 47 LUT o tabla del arbol | |
| 14 | -- 48 a 63 Variables de entrada del arbol (4 bits por variable) | |
| 15 | ||
| 16 | library IEEE; | |
| 17 | use IEEE.STD_LOGIC_1164.ALL; | |
| 18 | use IEEE.STD_LOGIC_ARITH.ALL; | |
| 19 | use IEEE.STD_LOGIC_UNSIGNED.ALL;---- Uncomment the following library declaration if instantiating | |
| 20 | ---- any Xilinx primitives in this code. | |
| 21 | library UNISIM; | |
| 22 | use UNISIM.VComponents.all; | |
| 23 | ||
| 24 | entity evalfit_peripheral is | |
| 25 | Port ( clk, reset, habilita: in STD_LOGIC; | |
| 26 | maxcombs : in STD_LOGIC_VECTOR (0 to 15); | |
| 27 | nivel_max : in STD_LOGIC_VECTOR (0 to 3); | |
| 28 | peripheral_mem_in : in STD_LOGIC_VECTOR (0 to 63); | |
| 29 | peripheral_mem_en : out std_logic; | |
| 30 | peripheral_mem_out : out STD_LOGIC_VECTOR (0 to 63); | |
| 31 | peripheral_mem_we : out STD_LOGIC; | |
| 32 | peripheral_mem_addr : out STD_LOGIC_VECTOR (0 to 8); | |
| 33 | evalfit3_estado : out std_logic_vector(0 to 7); | |
| 34 | errores : out STD_LOGIC_VECTOR (0 to 15); | |
| 35 | fin_ack : out std_logic; | |
| 36 | reg0_s : out STD_LOGIC_VECTOR (0 to 31); | |
| 37 | reg1_s : out STD_LOGIC_VECTOR (0 to 31); | |
| 38 | reg2_s : out STD_LOGIC_VECTOR (0 to 31); | |
| 39 | reg3_s : out STD_LOGIC_VECTOR (0 to 31); | |
| 40 | reg4_s : out STD_LOGIC_VECTOR (0 to 31) | |
| 41 | ); | |
| 42 | end evalfit_peripheral; | |
| 43 | ||
| 44 | architecture Behavioral of evalfit_peripheral is | |
| 45 | ||
| 46 | function mux16(sel: in std_logic_vector(0 to 3); ent: in std_logic_vector(0 to 15)) return std_logic is | |
| 47 | begin | |
| 48 | case sel is | |
| 49 | when "0000" => return ent(15); | |
| 50 | when "0001" => return ent(14); | |
| 51 | when "0010" => return ent(13); | |
| 52 | when "0011" => return ent(12); | |
| 53 | when "0100" => return ent(11); | |
| 54 | when "0101" => return ent(10); | |
| 55 | when "0110" => return ent(9); | |
| 56 | when "0111" => return ent(8); | |
| 57 | when "1000" => return ent(7); | |
| 58 | when "1001" => return ent(6); | |
| 59 | when "1010" => return ent(5); | |
| 60 | when "1011" => return ent(4); | |
| 61 | when "1100" => return ent(3); | |
| 62 | when "1101" => return ent(2); | |
| 63 | when "1110" => return ent(1); | |
| 64 | when others => return ent(0); | |
| 65 | end case; | |
| 66 | end mux16; | |
| 67 | ||
| 68 | function mux4(sel: in std_logic_vector(0 to 1); ent: in std_logic_vector(0 to 3)) return std_logic is | |
| 69 | begin | |
| 70 | case sel is | |
| 71 | when "00" => return ent(3); | |
| 72 | when "01" => return ent(2); | |
| 73 | when "10" => return ent(1); | |
| 74 | when others => return ent(0); | |
| 75 | end case; | |
| 76 | end mux4; | |
| 77 | ||
| 78 | -- senales para evaluar funciones | |
| 79 | signal reg0, reg1, reg2, reg3, reg4, regn3, regn4:STD_LOGIC_VECTOR (0 to 31); | |
| 80 | signal reg0_sig, reg1_sig, reg2_sig, reg3_sig, reg4_sig, regn3_sig, regn4_sig :STD_LOGIC_VECTOR (0 to 31); | |
| 81 | signal sel_aux0, sel_aux1, sel_aux2, sel_aux3, sel_aux4, sel_auxn3, sel_auxn4, sal_arbol, minter_n3, minter_n4 : std_logic_vector(0 to 3); | |
| 82 | signal salida_s, fin_ack_sig, fifow_wrreq_sig: std_logic; | |
| 83 | signal entrada, errores_aux, errores_sig, salida_nivel : STD_LOGIC_VECTOR (0 to 15); | |
| 84 | ||
| 85 | -- senales para las memorias, guardan resultados de arboles intermedios | |
| 86 | signal DO_n2, DI_n2, DO_n3, DI_n3, DO_n4, DI_n4: std_logic_vector(3 downto 0); | |
| 87 | signal ADDR_n2, ADDR_n3, ADDR_n4: std_logic_vector(0 to 13); | |
| 88 | signal WE_n2, WE_n3, WE_n4: std_logic_vector(3 downto 0); | |
| 89 | signal WE_n2_sig, WE_n3_sig, WE_n4_sig: std_logic_vector(3 downto 0); | |
| 90 | signal EN_n2, SSR, EN_n3, EN_n4: std_logic; | |
| 91 | ||
| 92 | -- senales para el control | |
| 93 | type estado is (reset1, reset2, inicio, proceso, n1, n2, n3, n4, precuenta, cuenta, final, final2); | |
| 94 | signal ep, es: estado; | |
| 95 | signal nivel, nivel_sig, nivel_reg: std_logic_vector(0 to 3); | |
| 96 | signal c1, c1_sig, c2, c2_sig, c3, c3_sig, c4, c4_sig: std_logic_vector(0 to 1); | |
| 97 | signal conta, conta_sig, conta2, conta2_sig: std_logic_vector(0 to 15); | |
| 98 | signal estado_evalf3, estado_evalf3_sig: std_logic_vector(0 to 7); | |
| 99 | signal peripheral_mem_addr_aux, peripheral_mem_addr_sig, peripheral_mem_addr_crom_sig,peripheral_mem_addr_crom : STD_LOGIC_VECTOR (0 to 8); | |
| 100 | ||
| 101 | begin | |
| 102 | ||
| 103 | ||
| 104 | process(ep, habilita, reg0, reg1, reg2, reg3, reg4, regn3, regn4, nivel, c1, c2, c3, c4, conta, | |
| 105 | salida_s, salida_nivel, WE_n2, WE_n3, WE_n4, nivel_max, | |
| 106 | maxcombs, peripheral_mem_in, peripheral_mem_addr_crom, peripheral_mem_addr_aux) | |
| 107 | begin | |
| 108 | es <= reset1; | |
| 109 | WE_n2_sig <= "0000"; | |
| 110 | WE_n3_sig <= "0000"; | |
| 111 | WE_n4_sig <= "0000"; | |
| 112 | reg0_sig <= reg0; | |
| 113 | reg1_sig <= reg1; | |
| 114 | reg2_sig <= reg2; | |
| 115 | reg3_sig <= reg3; | |
| 116 | reg4_sig <= reg4; | |
| 117 | regn3_sig <= regn3; | |
| 118 | regn4_sig <= regn4; | |
| 119 | conta_sig <= conta; | |
| 120 | conta2_sig <= conta2; | |
| 121 | c1_sig <= c1; | |
| 122 | c2_sig <= c2; | |
| 123 | c3_sig <= c3; | |
| 124 | c4_sig <= c4; | |
| 125 | DI_n2 <= "0000"; | |
| 126 | DI_n3 <= "0000"; | |
| 127 | DI_n4 <= "0000"; | |
| 128 | fin_ack_sig <= '0'; | |
| 129 | peripheral_mem_addr_sig <= peripheral_mem_addr_aux; | |
| 130 | peripheral_mem_addr_crom_sig <= peripheral_mem_addr_crom; | |
| 131 | peripheral_mem_we <= '0'; | |
| 132 | peripheral_mem_en <= '0'; | |
| 133 | errores_sig <= errores_aux; | |
| 134 | nivel_sig <= nivel_reg; | |
| 135 | estado_evalf3_sig <= x"FF"; | |
| 136 | case ep is | |
| 137 | when reset1 => --poner la memoria a 0000 | |
| 138 | WE_n2_sig <= "1111"; | |
| 139 | WE_n3_sig <= "1111"; | |
| 140 | WE_n4_sig <= "1111"; | |
| 141 | conta2_sig <= (others => '0'); | |
| 142 | es <= reset2; | |
| 143 | when reset2 => | |
| 144 | DI_n2 <= "0000"; | |
| 145 | DI_n3 <= "0000"; | |
| 146 | DI_n4 <= "0000"; | |
| 147 | if(conta2 = maxcombs)then | |
| 148 | WE_n2_sig <= "0000"; | |
| 149 | WE_n3_sig <= "0000"; | |
| 150 | WE_n4_sig <= "0000"; | |
| 151 | conta2_sig <= (others => '0'); | |
| 152 | es <= inicio; | |
| 153 | else | |
| 154 | WE_n2_sig <= "1111"; | |
| 155 | WE_n3_sig <= "1111"; | |
| 156 | WE_n4_sig <= "1111"; | |
| 157 | conta2_sig <= conta2 + 1; | |
| 158 | es <= reset2; | |
| 159 | end if; | |
| 160 | ||
| 161 | when inicio => | |
| 162 | if(habilita = '0') then | |
| 163 | es <= inicio; | |
| 164 | conta_sig <= (others => '0'); | |
| 165 | conta2_sig <= (others => '0'); | |
| 166 | peripheral_mem_addr_sig <= (others => '0'); | |
| 167 | c1_sig <= "00"; | |
| 168 | c2_sig <= "00"; | |
| 169 | c3_sig <= "00"; | |
| 170 | c4_sig <= "00"; | |
| 171 | errores_sig <= x"0000"; | |
| 172 | else | |
| 173 | es <= proceso; | |
| 174 | peripheral_mem_en <= '1'; | |
| 175 | end if; | |
| 176 | estado_evalf3_sig <= x"01"; | |
| 177 | ||
| 178 | when proceso => | |
| 179 | peripheral_mem_en <= '1'; | |
| 180 | if(nivel = "0001")then | |
| 181 | case c1 is | |
| 182 | when "00" => reg0_sig <= peripheral_mem_in(32 to 63); | |
| 183 | when "01" => reg1_sig <= peripheral_mem_in(32 to 63); | |
| 184 | when "10" => reg2_sig <= peripheral_mem_in(32 to 63); | |
| 185 | when others => reg3_sig <= peripheral_mem_in(32 to 63); | |
| 186 | end case; | |
| 187 | es <= n1; | |
| 188 | elsif(nivel = "0010")then | |
| 189 | reg4_sig <= peripheral_mem_in(32 to 63); | |
| 190 | WE_n2_sig(conv_integer(c2)) <= '1'; | |
| 191 | DI_n2(conv_integer(c2)) <= salida_nivel(2); | |
| 192 | es <= n2; | |
| 193 | elsif(nivel = "0011")then | |
| 194 | regn3_sig <= peripheral_mem_in(32 to 63); | |
| 195 | WE_n3_sig(conv_integer(c3)) <= '1'; | |
| 196 | DI_n3(conv_integer(c3)) <= salida_nivel(3); | |
| 197 | es <= n3; | |
| 198 | elsif(nivel = "0100")then | |
| 199 | regn4_sig <= peripheral_mem_in(32 to 63); | |
| 200 | WE_n4_sig(conv_integer(c4)) <= '1'; | |
| 201 | DI_n4(conv_integer(c4)) <= salida_nivel(4); | |
| 202 | es <= n4; | |
| 203 | elsif(nivel = "1111")then | |
| 204 | es <= final2; | |
| 205 | end if; | |
| 206 | peripheral_mem_addr_sig <= peripheral_mem_addr_aux + 1; | |
| 207 | peripheral_mem_addr_crom_sig <= peripheral_mem_addr_aux + 1; | |
| 208 | nivel_sig <= nivel; | |
| 209 | estado_evalf3_sig <= x"02"; | |
| 210 | ||
| 211 | when n1 => | |
| 212 | peripheral_mem_en <= '1'; | |
| 213 | c1_sig <= c1 + 1; | |
| 214 | peripheral_mem_addr_sig <= peripheral_mem_addr_aux; | |
| 215 | es <= proceso; | |
| 216 | estado_evalf3_sig <= x"03"; | |
| 217 | ||
| 218 | when n2 => | |
| 219 | WE_n2_sig(conv_integer(c2)) <= '1'; | |
| 220 | DI_n2(conv_integer(c2)) <= salida_nivel(2); | |
| 221 | peripheral_mem_en <= '1'; | |
| 222 | peripheral_mem_addr_sig <= "001000000" + ('0' & conta(2 to 9));-- esto es para que evalue el pentarbol y guarde en memoria la salida | |
| 223 | es <= precuenta; | |
| 224 | conta2_sig <= (others => '0'); | |
| 225 | estado_evalf3_sig <= x"04"; | |
| 226 | ||
| 227 | when n3 => | |
| 228 | WE_n3_sig(conv_integer(c3)) <= '1'; | |
| 229 | DI_n3(conv_integer(c3)) <= salida_nivel(3); | |
| 230 | peripheral_mem_en <= '1'; | |
| 231 | peripheral_mem_addr_sig <= "001000000" + ('0' & conta(2 to 9));-- | |
| 232 | es <= precuenta; | |
| 233 | conta2_sig <= (others => '0'); | |
| 234 | estado_evalf3_sig <= x"05"; | |
| 235 | ||
| 236 | when n4 => | |
| 237 | WE_n4_sig(conv_integer(c4)) <= '1'; | |
| 238 | DI_n4(conv_integer(c4)) <= salida_nivel(4); | |
| 239 | peripheral_mem_en <= '1'; | |
| 240 | peripheral_mem_addr_sig <= "001000000" + ('0' & conta(2 to 9));-- | |
| 241 | es <= precuenta; | |
| 242 | conta2_sig <= (others => '0'); | |
| 243 | estado_evalf3_sig <= x"06"; | |
| 244 | ||
| 245 | when precuenta => | |
| 246 | WE_n2_sig <= WE_n2; | |
| 247 | WE_n3_sig <= WE_n3; | |
| 248 | WE_n4_sig <= WE_n4; | |
| 249 | DI_n2(conv_integer(c2)) <= salida_nivel(2); | |
| 250 | DI_n3(conv_integer(c3)) <= salida_nivel(3); | |
| 251 | DI_n4(conv_integer(c4)) <= salida_nivel(4); | |
| 252 | peripheral_mem_en <= '1'; | |
| 253 | peripheral_mem_addr_sig <= "001000000" + ('0' & conta2(2 to 9)); | |
| 254 | conta_sig <= conta; | |
| 255 | conta2_sig <= conta + 1; | |
| 256 | es <= cuenta; | |
| 257 | estado_evalf3_sig <= x"07"; | |
| 258 | ||
| 259 | when cuenta => | |
| 260 | DI_n2(conv_integer(c2)) <= salida_nivel(2); | |
| 261 | DI_n3(conv_integer(c3)) <= salida_nivel(3); | |
| 262 | DI_n4(conv_integer(c4)) <= salida_nivel(4); | |
| 263 | peripheral_mem_en <= '1'; | |
| 264 | if(conta = maxcombs)then | |
| 265 | WE_n2_sig <= "0000"; | |
| 266 | WE_n3_sig <= "0000"; | |
| 267 | WE_n4_sig <= "0000"; | |
| 268 | conta_sig <= (others => '0'); | |
| 269 | conta2_sig <= (others => '0'); | |
| 270 | peripheral_mem_addr_sig <= peripheral_mem_addr_crom; --direccion de mem donde esta el cromosoma | |
| 271 | es <= final; | |
| 272 | else | |
| 273 | WE_n2_sig <= WE_n2; | |
| 274 | WE_n3_sig <= WE_n3; | |
| 275 | WE_n4_sig <= WE_n4; | |
| 276 | conta_sig <= conta + 1; | |
| 277 | conta2_sig <= conta2 + 1; | |
| 278 | peripheral_mem_addr_sig <= "001000000" + ('0' & conta2(2 to 9));--crear señal conta futura | |
| 279 | if(conta(10 to 15) = "111111")then | |
| 280 | es <= precuenta; | |
| 281 | else | |
| 282 | es <= cuenta; | |
| 283 | end if; | |
| 284 | end if; | |
| 285 | if(nivel_reg = nivel_max)then | |
| 286 | if(salida_nivel(conv_integer(nivel_max)) = peripheral_mem_in(conv_integer(conta(10 to 15))))then | |
| 287 | errores_sig <= errores_aux; | |
| 288 | else | |
| 289 | errores_sig <= errores_aux + 1; | |
| 290 | end if; | |
| 291 | else | |
| 292 | errores_sig <= errores_aux; | |
| 293 | end if; | |
| 294 | ||
| 295 | estado_evalf3_sig <= x"08"; | |
| 296 | ||
| 297 | when final => | |
| 298 | if(nivel_reg = "0010")then | |
| 299 | c2_sig <= c2 + 1; | |
| 300 | elsif(nivel_reg = "0011")then | |
| 301 | c3_sig <= c3 + 1; | |
| 302 | elsif(nivel_reg = "0100")then | |
| 303 | c4_sig <= c4 + 1; | |
| 304 | end if; | |
| 305 | peripheral_mem_en <= '1'; | |
| 306 | peripheral_mem_addr_sig <= peripheral_mem_addr_crom; | |
| 307 | es <= proceso; | |
| 308 | estado_evalf3_sig <= x"09"; | |
| 309 | ||
| 310 | when final2 => | |
| 311 | if(habilita = '1') then | |
| 312 | es <= final2; | |
| 313 | else | |
| 314 | es <= inicio; | |
| 315 | end if; | |
| 316 | fin_ack_sig <= '1'; | |
| 317 | estado_evalf3_sig <= x"0A"; | |
| 318 | when others => es <= inicio; | |
| 319 | ||
| 320 | end case; | |
| 321 | end process; | |
| 322 | ||
| 323 | ||
| 324 | process(clk, reset) | |
| 325 | begin | |
| 326 | if(reset = '1')then | |
| 327 | ep <= reset1; | |
| 328 | c1 <= "00"; | |
| 329 | c2 <= "00"; | |
| 330 | c3 <= "00"; | |
| 331 | c4 <= "00"; | |
| 332 | WE_n2 <= "0000"; | |
| 333 | WE_n3 <= "0000"; | |
| 334 | WE_n4 <= "0000"; | |
| 335 | reg0 <= x"00000000"; | |
| 336 | reg1 <= x"00000000"; | |
| 337 | reg2 <= x"00000000"; | |
| 338 | reg3 <= x"00000000"; | |
| 339 | reg4 <= x"00000000"; | |
| 340 | regn3 <= x"00000000"; | |
| 341 | regn4 <= x"00000000"; | |
| 342 | conta <= (others => '0'); | |
| 343 | conta2 <= (others => '0'); | |
| 344 | fin_ack <= '0'; | |
| 345 | peripheral_mem_addr_aux <= "000000000"; | |
| 346 | peripheral_mem_addr_crom <= "000000000"; | |
| 347 | errores_aux <= (others => '0'); | |
| 348 | nivel_reg <= "0000"; | |
| 349 | estado_evalf3 <= x"00"; | |
| 350 | elsif(rising_edge(clk))then | |
| 351 | ep <= es; | |
| 352 | c1 <= c1_sig; | |
| 353 | c2 <= c2_sig; | |
| 354 | c3 <= c3_sig; | |
| 355 | c4 <= c4_sig; | |
| 356 | WE_n2 <= WE_n2_sig; | |
| 357 | WE_n3 <= WE_n3_sig; | |
| 358 | WE_n4 <= WE_n4_sig; | |
| 359 | reg0 <= reg0_sig; | |
| 360 | reg1 <= reg1_sig; | |
| 361 | reg2 <= reg2_sig; | |
| 362 | reg3 <= reg3_sig; | |
| 363 | reg4 <= reg4_sig; | |
| 364 | regn3 <= regn3_sig; | |
| 365 | regn4 <= regn4_sig; | |
| 366 | conta <= conta_sig; | |
| 367 | conta2 <= conta2_sig; | |
| 368 | fin_ack <= fin_ack_sig; | |
| 369 | peripheral_mem_addr_aux <= peripheral_mem_addr_sig; | |
| 370 | peripheral_mem_addr_crom <= peripheral_mem_addr_crom_sig; | |
| 371 | errores_aux <= errores_sig; | |
| 372 | nivel_reg <= nivel_sig; | |
| 373 | estado_evalf3 <= estado_evalf3_sig; | |
| 374 | end if; | |
| 375 | end process; | |
| 376 | ||
| 377 | process(nivel_reg, conta, conta2) | |
| 378 | begin | |
| 379 | case nivel_reg is | |
| 380 | when "0000" => | |
| 381 | ADDR_n2 <= conta(2 to 15); | |
| 382 | ADDR_n3 <= conta(2 to 15); | |
| 383 | ADDR_n4 <= conta(2 to 15); | |
| 384 | when "0010" => | |
| 385 | ADDR_n2 <= conta(2 to 15); | |
| 386 | ADDR_n3 <= conta(2 to 15); | |
| 387 | ADDR_n4 <= conta(2 to 15); | |
| 388 | when "0011" => | |
| 389 | ADDR_n2 <= conta2(2 to 15); | |
| 390 | ADDR_n3 <= conta(2 to 15); | |
| 391 | ADDR_n4 <= conta(2 to 15); | |
| 392 | when "0100" => | |
| 393 | ADDR_n2 <= conta(2 to 15); | |
| 394 | ADDR_n3 <= conta2(2 to 15); | |
| 395 | ADDR_n4 <= conta(2 to 15); | |
| 396 | when others => | |
| 397 | ADDR_n2 <= conta2(2 to 15); | |
| 398 | ADDR_n3 <= conta2(2 to 15); | |
| 399 | ADDR_n4 <= conta2(2 to 15); | |
| 400 | end case; | |
| 401 | ||
| 402 | end process; | |
| 403 | ||
| 404 | ||
| 405 | errores <= errores_aux; | |
| 406 | peripheral_mem_addr <= peripheral_mem_addr_aux; | |
| 407 | nivel <= peripheral_mem_in(28 to 31); | |
| 408 | EN_n2 <= '1'; | |
| 409 | EN_n3 <= '1'; | |
| 410 | EN_n4 <= '1'; | |
| 411 | SSR <= '0'; | |
| 412 | minter_n3 <= DO_n2; | |
| 413 | minter_n4 <= DO_n3; | |
| 414 | entrada <= conta; | |
| 415 | ||
| 416 | evalfit3_estado <= estado_evalf3; | |
| 417 | reg0_s <= reg0; | |
| 418 | reg1_s <= reg1; | |
| 419 | reg2_s <= reg2; | |
| 420 | reg3_s <= reg3; | |
| 421 | reg4_s <= reg4; | |
| 422 | salida_nivel(1) <= sal_arbol(3); | |
| 423 | ||
| 424 | sel_aux0(3) <= mux16(reg0(28 to 31), entrada); | |
| 425 | sel_aux0(2) <= mux16(reg0(24 to 27), entrada); | |
| 426 | sel_aux0(1) <= mux16(reg0(20 to 23), entrada); | |
| 427 | sel_aux0(0) <= mux16(reg0(16 to 19), entrada); | |
| 428 | sal_arbol(3) <= mux16(sel_aux0, reg0(0 to 15)); -- reg0(0 to 15) = dato_lut | |
| 429 | ||
| 430 | sel_aux1(3) <= mux16(reg1(28 to 31), entrada); | |
| 431 | sel_aux1(2) <= mux16(reg1(24 to 27), entrada); | |
| 432 | sel_aux1(1) <= mux16(reg1(20 to 23), entrada); | |
| 433 | sel_aux1(0) <= mux16(reg1(16 to 19), entrada); | |
| 434 | sal_arbol(2) <= mux16(sel_aux1, reg1(0 to 15)); | |
| 435 | ||
| 436 | sel_aux2(3) <= mux16(reg2(28 to 31), entrada); | |
| 437 | sel_aux2(2) <= mux16(reg2(24 to 27), entrada); | |
| 438 | sel_aux2(1) <= mux16(reg2(20 to 23), entrada); | |
| 439 | sel_aux2(0) <= mux16(reg2(16 to 19), entrada); | |
| 440 | sal_arbol(1) <= mux16(sel_aux2, reg2(0 to 15)); | |
| 441 | ||
| 442 | sel_aux3(3) <= mux16(reg3(28 to 31), entrada); | |
| 443 | sel_aux3(2) <= mux16(reg3(24 to 27), entrada); | |
| 444 | sel_aux3(1) <= mux16(reg3(20 to 23), entrada); | |
| 445 | sel_aux3(0) <= mux16(reg3(16 to 19), entrada); | |
| 446 | sal_arbol(0) <= mux16(sel_aux3, reg3(0 to 15)); | |
| 447 | ||
| 448 | sel_aux4(3) <= mux4(reg4(30 to 31), sal_arbol); --arbol de 2do nivel | |
| 449 | sel_aux4(2) <= mux4(reg4(26 to 27), sal_arbol); | |
| 450 | sel_aux4(1) <= mux4(reg4(22 to 23), sal_arbol); | |
| 451 | sel_aux4(0) <= mux4(reg4(18 to 19), sal_arbol); | |
| 452 | salida_nivel(2) <= mux16(sel_aux4, reg4(0 to 15)); | |
| 453 | ||
| 454 | sel_auxn3(3) <= mux4(regn3(30 to 31), minter_n3); --arboles de 3er nivel | |
| 455 | sel_auxn3(2) <= mux4(regn3(26 to 27), minter_n3); | |
| 456 | sel_auxn3(1) <= mux4(regn3(22 to 23), minter_n3); | |
| 457 | sel_auxn3(0) <= mux4(regn3(18 to 19), minter_n3); | |
| 458 | salida_nivel(3) <= mux16(sel_auxn3, regn3(0 to 15)); | |
| 459 | ||
| 460 | sel_auxn4(3) <= mux4(regn4(30 to 31), minter_n4); --arboles de 4to nivel | |
| 461 | sel_auxn4(2) <= mux4(regn4(26 to 27), minter_n4); | |
| 462 | sel_auxn4(1) <= mux4(regn4(22 to 23), minter_n4); | |
| 463 | sel_auxn4(0) <= mux4(regn4(18 to 19), minter_n4); | |
| 464 | salida_nivel(4) <= mux16(sel_auxn4, regn4(0 to 15)); | |
| 465 | ||
| 466 | ram_nivel20:RAMB16_S1 port map(DO => DO_n2(3 downto 3), ADDR => ADDR_n2, CLK => clk, DI => DI_n2(3 downto 3), EN => EN_n2, SSR => SSR, WE => WE_n2(3)); | |
| 467 | ram_nivel21:RAMB16_S1 port map(DO => DO_n2(2 downto 2), ADDR => ADDR_n2, CLK => clk, DI => DI_n2(2 downto 2), EN => EN_n2, SSR => SSR, WE => WE_n2(2)); | |
| 468 | ram_nivel22:RAMB16_S1 port map(DO => DO_n2(1 downto 1), ADDR => ADDR_n2, CLK => clk, DI => DI_n2(1 downto 1), EN => EN_n2, SSR => SSR, WE => WE_n2(1)); | |
| 469 | ram_nivel23:RAMB16_S1 port map(DO => DO_n2(0 downto 0), ADDR => ADDR_n2, CLK => clk, DI => DI_n2(0 downto 0), EN => EN_n2, SSR => SSR, WE => WE_n2(0)); | |
| 470 | ||
| 471 | ram_nivel30:RAMB16_S1 port map(DO => DO_n3(3 downto 3), ADDR => ADDR_n3, CLK => clk, DI => DI_n3(3 downto 3), EN => EN_n3, SSR => SSR, WE => WE_n3(3)); | |
| 472 | ram_nivel31:RAMB16_S1 port map(DO => DO_n3(2 downto 2), ADDR => ADDR_n3, CLK => clk, DI => DI_n3(2 downto 2), EN => EN_n3, SSR => SSR, WE => WE_n3(2)); | |
| 473 | ram_nivel32:RAMB16_S1 port map(DO => DO_n3(1 downto 1), ADDR => ADDR_n3, CLK => clk, DI => DI_n3(1 downto 1), EN => EN_n3, SSR => SSR, WE => WE_n3(1)); | |
| 474 | ram_nivel33:RAMB16_S1 port map(DO => DO_n3(0 downto 0), ADDR => ADDR_n3, CLK => clk, DI => DI_n3(0 downto 0), EN => EN_n3, SSR => SSR, WE => WE_n3(0)); | |
| 475 | ||
| 476 | ram_nivel40:RAMB16_S1 port map(DO => DO_n4(3 downto 3), ADDR => ADDR_n4, CLK => clk, DI => DI_n4(3 downto 3), EN => EN_n4, SSR => SSR, WE => WE_n4(3)); | |
| 477 | ram_nivel41:RAMB16_S1 port map(DO => DO_n4(2 downto 2), ADDR => ADDR_n4, CLK => clk, DI => DI_n4(2 downto 2), EN => EN_n4, SSR => SSR, WE => WE_n4(2)); | |
| 478 | ram_nivel42:RAMB16_S1 port map(DO => DO_n4(1 downto 1), ADDR => ADDR_n4, CLK => clk, DI => DI_n4(1 downto 1), EN => EN_n4, SSR => SSR, WE => WE_n4(1)); | |
| 479 | ram_nivel43:RAMB16_S1 port map(DO => DO_n4(0 downto 0), ADDR => ADDR_n4, CLK => clk, DI => DI_n4(0 downto 0), EN => EN_n4, SSR => SSR, WE => WE_n4(0)); | |
| 480 | ||
| 481 | end Behavioral; | |
| 482 | ||
| Examples/ehw4/logic/mt.vhd | ||
|---|---|---|
| 1 | ------------------------------------------------------------------------------- | |
| 2 | -- -- | |
| 3 | -- MT32 - Mersenne Twister -- | |
| 4 | -- Copyright (C) 2007 HT-LAB -- | |
| 5 | -- -- | |
| 6 | -- Contact : Use feedback form on the website. -- | |
| 7 | -- Web: http://www.ht-lab.com -- | |
| 8 | -- -- | |
| 9 | -- MT32 files are released under the GNU General Public License. -- | |
| 10 | -- -- | |
| 11 | ------------------------------------------------------------------------------- | |
| 12 | -- -- | |
| 13 | -- This library is free software; you can redistribute it and/or -- | |
| 14 | -- modify it under the terms of the GNU Lesser General Public -- | |
| 15 | -- License as published by the Free Software Foundation; either -- | |
| 16 | -- version 2.1 of the License, or (at your option) any later version. -- | |
| 17 | -- -- | |
| 18 | -- This library is distributed in the hope that it will be useful, -- | |
| 19 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- | |
| 20 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -- | |
| 21 | -- Lesser General Public License for more details. -- | |
| 22 | -- -- | |
| 23 | -- Full details of the license can be found in the file "copying.txt". -- | |
| 24 | -- -- | |
| 25 | -- You should have received a copy of the GNU Lesser General Public -- | |
| 26 | -- License along with this library; if not, write to the Free Software -- | |
| 27 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -- | |
| 28 | -- -- | |
| 29 | ------------------------------------------------------------------------------- | |
| 30 | -- -- | |
| 31 | -- Top Level (Synthesis) -- | |
| 32 | ------------------------------------------------------------------------------- | |
| 33 | LIBRARY ieee; | |
| 34 | USE ieee.std_logic_1164.all; | |
| 35 | USE ieee.std_logic_unsigned.all; | |
| 36 | USE ieee.std_logic_arith.all; | |
| 37 | ||
| 38 | ENTITY mt_mem IS | |
| 39 | PORT( | |
| 40 | clk : IN std_logic; | |
| 41 | ena : IN std_logic; | |
| 42 | resetn : IN std_logic; | |
| 43 | random : OUT std_logic_vector (31 DOWNTO 0) | |
| 44 | ); | |
| 45 | ||
| 46 | END mt_mem ; | |
| 47 | ||
| 48 | LIBRARY ieee; | |
| 49 | ||
| 50 | ARCHITECTURE struct OF mt_mem IS | |
| 51 | ||
| 52 | -- Architecture declarations | |
| 53 | ||
| 54 | -- internal signal declarations | |
| 55 | signal kk_cnt : std_logic_vector(9 downto 0); | |
| 56 | signal km_cnt : std_logic_vector(9 downto 0); | |
| 57 | signal kp_cnt : std_logic_vector(9 downto 0); | |
| 58 | signal mt_kk31 : std_logic_vector(0 downto 0); | |
| 59 | signal mt_kk_s : std_logic_vector(31 downto 0); | |
| 60 | signal mt_km : std_logic_vector(31 downto 0); | |
| 61 | signal mt_kp : std_logic_vector(30 downto 0); | |
| 62 | signal wea : std_logic; | |
| 63 | signal wea_s : std_logic_vector(0 downto 0); | |
| 64 | signal wr_cnt : std_logic_vector(9 downto 0); | |
| 65 | ||
| 66 | ||
| 67 | signal xor1_s : std_logic_vector(31 downto 0); | |
| 68 | signal xor2_s : std_logic_vector(31 downto 0); | |
| 69 | signal xor3_s : std_logic_vector(31 downto 0); | |
| 70 | signal y_s : std_logic_vector(31 downto 0); | |
| 71 | signal mag01_s : std_logic_vector(31 downto 0); | |
| 72 | ||
| 73 | -- Component Declarations | |
| 74 | COMPONENT counters | |
| 75 | GENERIC ( | |
| 76 | M : integer := 397; | |
| 77 | N : integer := 623 | |
| 78 | ); | |
| 79 | PORT ( | |
| 80 | clk : IN std_logic ; | |
| 81 | resetn : IN std_logic ; | |
| 82 | ena : IN std_logic ; | |
| 83 | wea : OUT std_logic ; | |
| 84 | kk_cnt : OUT std_logic_vector (9 DOWNTO 0); | |
| 85 | km_cnt : OUT std_logic_vector (9 DOWNTO 0); | |
| 86 | kp_cnt : OUT std_logic_vector (9 DOWNTO 0); | |
| 87 | wr_cnt : OUT std_logic_vector (9 DOWNTO 0) | |
| 88 | ); | |
| 89 | END COMPONENT; | |
| 90 | COMPONENT dpram624x1 | |
| 91 | PORT ( | |
| 92 | addra : IN std_logic_VECTOR (9 DOWNTO 0); | |
| 93 | addrb : IN std_logic_VECTOR (9 DOWNTO 0); | |
| 94 | clka : IN std_logic; | |
| 95 | clkb : IN std_logic; | |
| 96 | dina : IN std_logic_VECTOR (0 DOWNTO 0); | |
| 97 | wea : IN std_logic_VECTOR (0 DOWNTO 0); | |
| 98 | doutb : OUT std_logic_VECTOR (0 DOWNTO 0) | |
| 99 | ); | |
| 100 | END COMPONENT; | |
| 101 | COMPONENT dpram624x31 | |
| 102 | PORT ( | |
| 103 | addra : IN std_logic_VECTOR (9 DOWNTO 0); | |
| 104 | addrb : IN std_logic_VECTOR (9 DOWNTO 0); | |
| 105 | clka : IN std_logic; | |
| 106 | clkb : IN std_logic; | |
| 107 | dina : IN std_logic_VECTOR (30 DOWNTO 0); | |
| 108 | wea : IN std_logic_VECTOR (0 DOWNTO 0); | |
| 109 | doutb : OUT std_logic_VECTOR (30 DOWNTO 0) | |
| 110 | ); | |
| 111 | END COMPONENT; | |
| 112 | COMPONENT dpram624x32 | |
| 113 | PORT ( | |
| 114 | addra : IN std_logic_VECTOR (9 DOWNTO 0); | |
| 115 | addrb : IN std_logic_VECTOR (9 DOWNTO 0); | |
| 116 | clka : IN std_logic; | |
| 117 | clkb : IN std_logic; | |
| 118 | dina : IN std_logic_VECTOR (31 DOWNTO 0); | |
| 119 | wea : IN std_logic_VECTOR (0 DOWNTO 0); | |
| 120 | doutb : OUT std_logic_VECTOR (31 DOWNTO 0) | |
| 121 | ); | |
| 122 | END COMPONENT; | |
| 123 | ||
| 124 | ||
| 125 | BEGIN | |
| 126 | -- Architecture concurrent statements | |
| 127 | -- HDL Embedded Text Block 1 eb1 | |
| 128 | -- eb1 1 | |
| 129 | wea_s(0) <= wea; -- wonderful VHDL | |
| 130 | ||
| 131 | -- HDL Embedded Text Block 2 XOR_CHAIN1 | |
| 132 | -- eb1 1 | |
| 133 | xor1_s <= mt_kk_s XOR ("00000000000"&mt_kk_s(31 downto 11)); | |
| 134 | xor2_s <= xor1_s XOR (xor1_s(24 downto 0)&"0000000" AND X"9D2C5680"); | |
| 135 | xor3_s <= xor2_s XOR (xor2_s(16 downto 0)&"000000000000000" AND X"EFC60000"); | |
| 136 | random <= xor3_s XOR "000000000000000000"&xor3_s(31 downto 18); | |
| 137 | ||
| 138 | -- HDL Embedded Text Block 3 eb3 | |
| 139 | y_s <= mt_kk31(0)&mt_kp(30 downto 0); | |
| 140 | mag01_s <= X"00000000" when y_s(0)='0' else X"9908B0DF"; | |
| 141 | mt_kk_s <= mt_km XOR ('0'&y_s(31 downto 1)) XOR mag01_s; | |
| 142 | ||
| 143 | ||
| 144 | -- Instance port mappings. | |
| 145 | U_7 : counters | |
| 146 | GENERIC MAP ( | |
| 147 | M => 397, | |
| 148 | N => 623 | |
| 149 | ) | |
| 150 | PORT MAP ( | |
| 151 | clk => clk, | |
| 152 | resetn => resetn, | |
| 153 | ena => ena, | |
| 154 | wea => wea, | |
| 155 | kk_cnt => kk_cnt, | |
| 156 | km_cnt => km_cnt, | |
| 157 | kp_cnt => kp_cnt, | |
| 158 | wr_cnt => wr_cnt | |
| 159 | ); | |
| 160 | U_0 : dpram624x1 | |
| 161 | PORT MAP ( | |
| 162 | clka => clk, | |
| 163 | dina => mt_kk_s(31 DOWNTO 31), | |
| 164 | addra => wr_cnt, | |
| 165 | wea => wea_s, | |
| 166 | clkb => clk, | |
| 167 | addrb => kk_cnt, | |
| 168 | doutb => mt_kk31 | |
| 169 | ); | |
| 170 | U_1 : dpram624x31 | |
| 171 | PORT MAP ( | |
| 172 | clka => clk, | |
| 173 | dina => mt_kk_s(30 DOWNTO 0), | |
| 174 | addra => wr_cnt, | |
| 175 | wea => wea_s, | |
| 176 | clkb => clk, | |
| 177 | addrb => kp_cnt, | |
| 178 | doutb => mt_kp | |
| 179 | ); | |
| 180 | U_2 : dpram624x32 | |
| 181 | PORT MAP ( | |
| 182 | clka => clk, | |
| 183 | dina => mt_kk_s, | |
| 184 | addra => wr_cnt, | |
| 185 | wea => wea_s, | |
| 186 | clkb => clk, | |
| 187 | addrb => km_cnt, | |
| 188 | doutb => mt_km | |
| 189 | ); | |
| 190 | ||
| 191 | END struct; | |
| Examples/ehw4/logic/reg_bank.v | ||
|---|---|---|
| 1 | `timescale 1ns / 1ps | |
| 2 | ||
| 3 | module reg_bank(clk, reset, en, we, wdBus, rdBus, address, reg0, reg1, reg2, reg3, reg4, regMT, error, status, max_lev, max_com, control); | |
| 4 | ||
| 5 | input clk, reset, en, we; | |
| 6 | ||
| 7 | input [7:0] wdBus; | |
| 8 | output [7:0] rdBus; | |
| 9 | input [4:0] address; | |
| 10 | ||
| 11 | input [31:0] reg0; | |
| 12 | input [31:0] reg1; | |
| 13 | input [31:0] reg2; | |
| 14 | input [31:0] reg3; | |
| 15 | input [31:0] reg4; | |
| 16 | input [31:0] regMT; | |
| 17 | input [16:0] error; | |
| 18 | input [7:0] status; | |
| 19 | output [15:0] max_com; | |
| 20 | output [7:0] max_lev; | |
| 21 | output [7:0] control; | |
| 22 | ||
| 23 | ||
| 24 | reg [7:0] reg_bank [31:0]; | |
| 25 | reg [7:0] rdBus; | |
| 26 | ||
| 27 | ||
| 28 | ||
| 29 | // Read control | |
| 30 | always @(posedge clk) | |
| 31 | if(reset) | |
| 32 | rdBus = 8'h00; | |
| 33 | else begin | |
| 34 | rdBus = reg_bank[address]; | |
| 35 | end | |
| 36 | ||
| 37 | ||
| 38 | // Store Inputs | |
| 39 | always @(posedge clk) | |
| 40 | begin | |
| 41 | if(en) begin | |
| 42 | reg_bank[0] = reg0[7:0]; | |
| 43 | reg_bank[1] = reg0[15:8]; | |
| 44 | reg_bank[2] = reg0[23:16]; | |
| 45 | reg_bank[3] = reg0[31:24]; | |
| 46 | ||
| 47 | reg_bank[4] = reg1[7:0]; | |
| 48 | reg_bank[5] = reg1[15:8]; | |
| 49 | reg_bank[6] = reg1[23:16]; | |
| 50 | reg_bank[7] = reg1[31:24]; | |
| 51 | ||
| 52 | reg_bank[8] = reg2[7:0]; | |
| 53 | reg_bank[9] = reg2[15:8]; | |
| 54 | reg_bank[10] = reg2[23:16]; | |
| 55 | reg_bank[11] = reg2[31:24]; | |
| 56 | ||
| 57 | reg_bank[12] = reg3[7:0]; | |
| 58 | reg_bank[13] = reg3[15:8]; | |
| 59 | reg_bank[14] = reg3[23:16]; | |
| 60 | reg_bank[15] = reg3[31:24]; | |
| 61 | ||
| 62 | reg_bank[16] = reg4[7:0]; | |
| 63 | reg_bank[17] = reg4[15:8]; | |
| 64 | reg_bank[18] = reg4[23:16]; | |
| 65 | reg_bank[19] = reg4[31:24]; | |
| 66 | ||
| 67 | reg_bank[20] = error[7:0]; | |
| 68 | reg_bank[21] = error[15:8]; | |
| 69 | ||
| 70 | reg_bank[22] = { 4'b0, status}; | |
| 71 | ||
| 72 | // reg_bank[23] = regMT[7:0]; | |
| 73 | // reg_bank[24] = regMT[15:8]; | |
| 74 | // reg_bank[25] = regMT[23:16]; | |
| 75 | // reg_bank[26] = regMT[31:24]; | |
| 76 | end | |
| 77 | end | |
| 78 | ||
| 79 | ||
| 80 | assign max_com[7:0] = reg_bank[26]; | |
| 81 | assign max_com[15:8] = reg_bank[27]; | |
| 82 | assign max_lev = reg_bank[28]; | |
| 83 | assign control = reg_bank[29]; | |
| 84 | ||
| 85 | // Write control | |
| 86 | always @(negedge clk) | |
| 87 | if(we & en) begin | |
| 88 | case (address) | |
| 89 | 27: reg_bank[26] = wdBus; | |
| 90 | 28: reg_bank[27] = wdBus; | |
| 91 | 29: reg_bank[28] = wdBus; | |
| 92 | 30: reg_bank[29] = wdBus; | |
| 93 | endcase | |
| 94 | end | |
| 95 | ||
| 96 | endmodule | |
| Examples/ehw4/src/Makefile | ||
|---|---|---|
| 1 | CC = mipsel-openwrt-linux-gcc | |
| 2 | ||
| 3 | all: jz_init_sram jz_test_gpio enable_rx enable_irq | |
| 4 | ||
| 5 | DEBUG = -O3 -g0 | |
| 6 | ||
| 7 | COMMON_SOURCES = jz47xx_gpio.c jz47xx_mmap.c | |
| 8 | ||
| 9 | H_SOURCES = jz47xx_gpio.h jz47xx_mmap.h | |
| 10 | ||
| 11 | INCLUDE = -I. | |
| 12 | ||
| 13 | WARNINGS= -Wcast-align -Wpacked -Wpadded -Wall | |
| 14 | ||
| 15 | CCFLAGS = ${INCLUDE} ${DEBUG} ${WARNINGS} | |
| 16 | ||
| 17 | LDFLAGS = | |
| 18 | ||
| 19 | COMMON_OBJECTS = $(COMMON_SOURCES:.c=.o) | |
| 20 | ||
| 21 | NANO_IP = 192.168.254.101 | |
| 22 | ||
| 23 | genetic.o: genetic.c genetic.h | |
| 24 | ${CC} -lm -I. -c genetic.c -o genetic.o | |
| 25 | ||
| 26 | client: sintesishw_client.c genetic.o sintesishw_client.h | |
| 27 | ${CC} sintesishw_client.c genetic.o -o sintesishw_client -lm -I. | |
| 28 | ||
| 29 | server: sintesishw_server.c genetic.o | |
| 30 | ${CC} sintesishw_server.c genetic.o -o sintesishw_server -lm -lpthread -I. | |
| 31 | ||
| 32 | clean: | |
| 33 | rm -f *.o sintesishw_client sintesishw_server ${EXEC} *~ | |
| Examples/ehw4/src/funlut.dat |
|---|
| Examples/ehw4/src/genetic.c | ||
|---|---|---|
| 1 | #include "stdio.h" | |
| 2 | #include "termios.h" | |
| 3 | #include "sys/mman.h" | |
| 4 | #include "stdlib.h" | |
| 5 | #include "sys/types.h" | |
| 6 | #include "sys/stat.h" | |
| 7 | #include "fcntl.h" | |
| 8 | #include "time.h" | |
| 9 | #include "math.h" | |
| 10 | #include "pthread.h" | |
| 11 | #include "sys/socket.h" | |
| 12 | #include "netinet/in.h" | |
| 13 | #include "netdb.h" | |
| 14 | #include "errno.h" | |
| 15 | #include "sys/un.h" | |
| 16 | #include "genetic.h" | |
| 17 | ||
| 18 | /************************************************************************************************************************************** | |
| 19 | imprime un cromosoma completo */ | |
| 20 | void mostrar_indiv(char *cromo, int pentarboles, int vars) | |
| 21 | { | |
| 22 | char *ap, i, fn[8] = {'!', '&', '^', '|', '_'}; //NOT, AND, XOR, OR, NADA o YES | |
| 23 | char vn[] = {'A', 'B', 'C', 'D', 'E' , 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P', '.'}; | |
| 24 | char f1,f2,f3; | |
| 25 | char a; | |
| 26 | ||
| 27 | ap = cromo; | |
| 28 | ||
| 29 | for(i = 0; i < ARBOLES_INDIV; i++){ | |
| 30 | if(*(cromo + 7) == 1) | |
| 31 | { | |
| 32 | vn[vars] = '.'; | |
| 33 | printf("%0x%c%c%c%c %i ", *(unsigned short int *)ap, vn[(*(ap+2) >> 4) & 0xF], vn[*(ap+2) & 0xF], vn[(*(ap+3) >> 4) & 0xF], vn[*(ap+3) & 0xF], *(ap+6)); | |
| 34 | } | |
| 35 | else | |
| 36 | { | |
| 37 | vn[4] = '.'; | |
| 38 | printf("%0x%c%c%c%c %i", *(unsigned short int *)ap, vn[(*(ap+2) >> 4) & 0xF], vn[*(ap+2) & 0xF], vn[(*(ap+3) >> 4) & 0xF], vn[*(ap+3) & 0xF], *(ap+6)); | |
| 39 | } | |
| 40 | // printf("\t %0x %0x ", *(short int *)(ap+2), *(ap+6) ); | |
| 41 | ap = ap + LONG_ARBOL; | |
| 42 | } | |
| 43 | ||
| 44 | printf(" "); | |
| 45 | for(i = 0; i < LONG_INDIV; i++) | |
| 46 | { a=*(char *)(cromo+i) & 0xff; | |
| 47 | printf("%hhu,",a); | |
| 48 | } | |
| 49 | //fflush(stdout); | |
| 50 | } | |
| 51 | ||
| 52 | /************************************************************************************************************************************** | |
| 53 | imprime un arbol completo */ | |
| 54 | mostrar_arbol(char *cromo, int vars) | |
| 55 | { | |
| 56 | char *ap, i, fn[8] = {'!', '&', '^', '|', '_'}; //NOT, AND, XOR, OR, NADA o YES | |
| 57 | char vn[] = {'A', 'B', 'C', 'D', 'E' , 'F', 'G', 'H', 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P', '.'}; | |
| 58 | ap = cromo; | |
| 59 | ||
| 60 | if(*(cromo + 7) == 1) | |
| 61 | { | |
| 62 | vn[vars] = '.'; | |
| 63 | printf("LUT:%04x VARS:%c%c%c%c %0x", *(unsigned short int *)ap, vn[*(ap+2) >> 4], vn[*(ap+2) & 0xF], vn[*(ap+3) >> 4], vn[*(ap+3) & 0xF], *(ap+6)); | |
| 64 | } | |
| 65 | else | |
| 66 | { | |
| 67 | vn[4] = '.'; | |
| 68 | printf("LUT:%04x VARS:%c%c%c%c %0x", *(unsigned short int *)ap, vn[*(ap+2) >> 4], vn[*(ap+2) & 0xF], vn[*(ap+3) >> 4], vn[*(ap+3) & 0xF], *(ap+6)); | |
| 69 | } | |
| 70 | printf("\tVARS:%04x \tLUT_index:%0x \t", *(unsigned short int *)(ap+2), *(ap+6) ); | |
| 71 | for(i = 0; i < LONG_ARBOL; i++) | |
| 72 | { | |
| 73 | printf("%0x,",*(cromo+i)); | |
| 74 | } | |
| 75 | printf("\n"); | |
| 76 | } | |
| 77 | ||
| 78 | /************************************************************************************************************************************** | |
| 79 | genera un numero de forma aleatoria hasta max inclusive*/ | |
| 80 | char random_var(int max) | |
| 81 | { | |
| 82 | char variable, mascara; | |
| 83 | int i; | |
| 84 | mascara = 1; | |
| 85 | do | |
| 86 | { | |
| 87 | mascara = (mascara << 1) + 1; | |
| 88 | }while(max > mascara); | |
| 89 | ||
| 90 | if(HW_ENABLE == 1) variable = (*(int *)(evalfit_ptr1 + EVALFIT_RDREG8)) & mascara; | |
| 91 | else variable = random() & mascara; | |
| 92 | ||
| 93 | while(variable > max) | |
| 94 | { | |
| 95 | variable = variable - max; | |
| 96 | } | |
| 97 | return variable; | |
| 98 | } | |
| 99 | ||
| 100 | /************************************************************************************************************************************** | |
| 101 | Genera un arbol de forma aleatoria | |
| 102 | Las funciones y variables son representadas por enteros del 0 al 3 o mas... | |
| 103 | - el arbol se encuentra compuesto de tres funciones, dos de entrada y una de salida. | |
| 104 | */ | |
| 105 | void gen_arbol(char *ap, int variables) | |
| 106 | { | |
| 107 | int lut; | |
| 108 | short int dato_lut; | |
| 109 | lut = (random_var(FUNCIONES)*25) + (random_var(FUNCIONES) * 5) + random_var(FUNCIONES);//random_var(FUNCOMBS-1); | |
| 110 | dato_lut = (*(funlut_ap+(lut*2)) << 8) + (*(funlut_ap+(lut*2)+1)); | |
| 111 | *(short int *)ap = ntohs(dato_lut); //Se cambia endianismo para cuando se ejecute en 386, que es distinto a PPC | |
| 112 | *(ap+2) = *(ap+3) = 0; | |
| 113 | *(ap+2) = random_var(variables) + (random_var(variables) << 4); | |
| 114 | *(ap+3) = random_var(variables) + (random_var(variables) << 4); | |
| 115 | *(ap+6) = lut; | |
| 116 | // mostrar_arbol(ap); | |
| 117 | } | |
| 118 | ||
| 119 | ||
| 120 | /************************************************************************************************************************************** | |
| 121 | genera un individuo de forma aleatoria */ | |
| 122 | void gen_indiv(char *cromo, int pentarboles, int vars) | |
| 123 | { | |
| 124 | char i=0; | |
| 125 | int n1, n2, n3, n4, n5, c1, c2, c3, c4, c5, sig, indice; | |
| 126 | ||
| 127 | n1 = n2 = n3 = n4 = n5 = 0; | |
| 128 | c1 = c2 = c3 = c4 = c5 = 0; | |
| 129 | indice = 0; | |
| 130 | ||
| 131 | sig=1; | |
| 132 | ||
| 133 | ||
| 134 | do | |
| 135 | { | |
| 136 | ||
| 137 | if((sig == 1) && (c1 < nivel1)) | |
| 138 | { | |
| 139 | gen_arbol(cromo + (indice * LONG_ARBOL), vars-1); | |
| 140 | *(cromo +(indice*LONG_ARBOL) + 7) = 1; | |
| 141 | n1 ++; | |
| 142 | c1 ++; | |
| 143 | indice ++; | |
| 144 | if(n1 < 4) | |
| 145 | sig = 1; | |
| 146 | else | |
| 147 | { | |
| 148 | sig = 2; | |
| 149 | n1 = 0; | |
| 150 | }//printf("1"); | |
| 151 | } | |
| 152 | else | |
| 153 | { | |
| 154 | if((sig == 2) && (c2 < *(nivel2+pentarboles))) | |
| 155 | { | |
| 156 | gen_arbol(cromo + (indice*LONG_ARBOL), 3); | |
| 157 | *(cromo +(indice*LONG_ARBOL) + 7) = 2; | |
| 158 | n2++; | |
| 159 | c2 ++; | |
| 160 | indice ++; | |
| 161 | if(c2 == *(nivel2+pentarboles)) | |
| 162 | sig = 3; | |
| 163 | else | |
| 164 | { | |
| 165 | if(n2 < 4) | |
| 166 | sig = 1; | |
| 167 | else | |
| 168 | { | |
| 169 | sig = 3; | |
| 170 | n2 = 0; | |
| 171 | } | |
| 172 | }//printf("2"); | |
| 173 | } | |
| 174 | else | |
| 175 | { | |
| 176 | if((sig == 3) && (c3 < *(nivel3+pentarboles))) | |
| 177 | { | |
| 178 | gen_arbol(cromo + (indice*LONG_ARBOL), 3); | |
| 179 | *(cromo +(indice*LONG_ARBOL) + 7) = 3; | |
| 180 | n3++; | |
| 181 | c3++; | |
| 182 | indice++; | |
| 183 | if(c3 == *(nivel3+pentarboles)) | |
| 184 | sig = 4; | |
| 185 | else | |
| 186 | { | |
| 187 | if(n3 < 4) | |
| 188 | sig = 1; | |
| 189 | else | |
| 190 | { | |
| 191 | sig = 4; | |
| 192 | n3 = 0; | |
| 193 | } | |
| 194 | }//printf("3"); | |
| 195 | } | |
| 196 | else | |
| 197 | { | |
| 198 | if((sig == 4) && (c4 < *(nivel4+pentarboles))) | |
| 199 | { | |
| 200 | gen_arbol(cromo + (indice*LONG_ARBOL), 3); | |
| 201 | *(cromo +(indice*LONG_ARBOL) + 7) = 4; | |
| 202 | n4++; | |
| 203 | c4++; | |
| 204 | indice++; | |
| 205 | if(c4 == *(nivel4+pentarboles)) | |
| 206 | sig = 5; | |
| 207 | else | |
| 208 | { | |
| 209 | if(n4 < 4) | |
| 210 | sig = 1; | |
| 211 | else | |
| 212 | { | |
| 213 | sig = 5; | |
| 214 | n4 = 0; | |
| 215 | } | |
| 216 | }//printf("4"); | |
| 217 | } | |
| 218 | else | |
| 219 | { | |
| 220 | if((sig == 5) && (c5 < *(nivel5+pentarboles))) | |
| 221 | { | |
| 222 | gen_arbol(cromo + (indice*LONG_ARBOL), 3); | |
| 223 | *(cromo +(indice*LONG_ARBOL) + 7) = 5; | |
| 224 | c5++; | |
| 225 | indice++; | |
| 226 | if(c5 == *(nivel5+pentarboles)) | |
| 227 | sig = 1; | |
| 228 | else | |
| 229 | sig = 1; | |
| 230 | } | |
| 231 | } | |
| 232 | ||
| 233 | } | |
| 234 | } | |
| 235 | ||
| 236 | } | |
| 237 | /* mostrar_indiv(cromo, 1,vars); //*/ | |
| 238 | }while(indice < ARBOLES_INDIV); | |
| 239 | ||
| 240 | } | |
| 241 | ||
| 242 | ||
| 243 | /************************************************************************************************************************************** | |
| 244 | genera una poblacion completa */ | |
| 245 | void gen_poblacion(char *cromo, int pentarboles, int vars, int indivs) | |
| 246 | { | |
| 247 | int i; | |
| 248 | for(i=0; i < indivs; i++) | |
| 249 | { | |
| 250 | gen_indiv(cromo + ( i * LONG_INDIV), pentarboles, vars); | |
| 251 | } | |
| 252 | } | |
| 253 | ||
| 254 | ||
| 255 | /************************************************************************************************************************************** | |
| 256 | halla la salida de un arbol para una entrada de x de un cromo basado en LUT*/ | |
| 257 | int eval_func_lut(char *ap, int x, int vars ) //var apunta al valor de las variables | |
| 258 | { | |
| 259 | char Y; | |
| 260 | char var[vars], i, a, b, c, d; | |
| 261 | int lut; | |
| 262 | ||
| 263 | for(i=0;i <= vars-1;i++) | |
| 264 | { | |
| 265 | var[i] = (x >> i) & 0x1; | |
| 266 | // printf("-%i",var[i]); | |
| 267 | } | |
| 268 | var[vars] = 0; | |
| 269 | ||
| 270 | a = *(ap + 3) & 0xF; | |
| 271 | b = (*(ap + 3) >> 4) & 0xF; | |
| 272 | c = *(ap + 2) & 0xF; | |
| 273 | d = (*(ap + 2) >> 4) & 0xF; | |
| 274 | i = var[a] + (var[b]*2) + (var[c]*4) + (var[d]*8); | |
| 275 | lut = *(short int *)ap; | |
| 276 | Y = (lut >> i) & 0x1; | |
| 277 | ||
| 278 | return Y; | |
| 279 | } | |
| 280 | ||
| 281 | /************************************************************************************************************************************** | |
| 282 | retorna las salidas de un cromosoma de 5 arboles*/ | |
| 283 | void eval_pentarbol_sw(char *ap, int *salida, int *entrada, int vars) | |
| 284 | { | |
| 285 | int i, k ; | |
| 286 | char salidas[ARBOLES][COMBS], aux[COMBS]; | |
| 287 | ||
| 288 | for(i=0; i <= ARBOLES-2; i++){ //se evaluan las salidas de los primeros arboles y se almacenan en salidas | |
| 289 | for(k=0; k<= (COMBS-1); k++) | |
| 290 | { | |
| 291 | salidas[i][k] = eval_func_lut((ap+(i*LONG_ARBOL)), k, vars); | |
| 292 | } | |
| 293 | } | |
| 294 | ||
| 295 | //se calculan los minterminos para el arbol de salida | |
| 296 | for(k=0; k <= (COMBS-1); k++) | |
| 297 | { | |
| 298 | aux[k] = ((salidas[0][k])*1) + ((salidas[1][k])*2) + ((salidas[2][k])*4) + ((salidas[3][k])*8); | |
| 299 | } | |
| 300 | ||
| 301 | for(i=0; i <= (COMBS-1); i++) | |
| 302 | { | |
| 303 | *(salida + i) = eval_func_lut(ap + ((ARBOLES-1) * LONG_ARBOL), aux[i], vars); | |
| 304 | } | |
| 305 | } | |
| 306 | ||
| 307 | ||
| 308 | /************************************************************************************************************************************** | |
| 309 | retorna el numero de errores y las salidas de un cromosoma de 1 o mas pentarboles*/ | |
| 310 | int eval_fit_sw(char *ap, int *objetivo, int num_min, int pentarboles, int vars ) | |
| 311 | { | |
| 312 | int *obj_min, *med_min2, *med_min3, *med_min4, *med_min5, *entrada, i, j, errores, puertas; | |
| 313 | int *salida, n2, n3, n4, n5, x; | |
| 314 | ||
| 315 | obj_min = malloc(sizeof(obj_min)*COMBS); | |
| 316 | med_min2 = malloc(sizeof(med_min2)*COMBS); | |
| 317 | med_min3 = malloc(sizeof(med_min3)*COMBS); | |
| 318 | med_min4 = malloc(sizeof(med_min4)*COMBS); | |
| 319 | med_min5 = malloc(sizeof(med_min5)*COMBS); | |
| 320 | entrada = malloc(sizeof(entrada)*COMBS); | |
| 321 | salida = malloc(sizeof(salida)*COMBS); | |
| 322 | errores = 0; | |
| 323 | ||
| 324 | for(i=0; i < COMBS; i++) | |
| 325 | { | |
| 326 | *(obj_min+i) = 0; | |
| 327 | *(entrada+i) = i; | |
| 328 | *(med_min2 + i) = 0; | |
| 329 | *(med_min3 + i) = 0; | |
| 330 | *(med_min4 + i) = 0; | |
| 331 | *(med_min5 + i) = 0; | |
| 332 | } | |
| 333 | ||
| 334 | for(i = 0; i < num_min; i++) | |
| 335 | { | |
| 336 | *(obj_min + (*(objetivo + i))) = 1; //se convierte el objetivo a un arreglo | |
| 337 | } | |
| 338 | ||
| 339 | i = 0; | |
| 340 | n2 = 0; | |
| 341 | n3 = 0; | |
| 342 | n4 = 0; | |
| 343 | n5 = 0; | |
| 344 | ||
| 345 | do | |
| 346 | { | |
| 347 | if(*(ap + (i * LONG_ARBOL) + 7) == 1) | |
| 348 | { | |
| 349 | eval_pentarbol_sw(ap + (i * LONG_ARBOL), salida, entrada, vars); | |
| 350 | for(j = 0; j < COMBS; j++) | |
| 351 | { | |
| 352 | *(med_min2 + j) = *(med_min2 + j) + (*(salida + j) << n2); | |
| 353 | } | |
| 354 | if(n2 == 3) n2 = 0; else n2++; | |
| 355 | i = i + 5; | |
| 356 | } | |
| 357 | else | |
| 358 | { | |
| 359 | if(*(ap + (i * LONG_ARBOL) + 7) == 3) | |
| 360 | { | |
| 361 | for(j = 0; j < COMBS; j++) | |
| 362 | { | |
| 363 | *(salida + j) = eval_func_lut(ap + (i * LONG_ARBOL), *(med_min2 + j), vars); | |
| 364 | } | |
| 365 | for(j = 0; j < COMBS; j++) | |
| 366 | { | |
| 367 | *(med_min3 + j) = *(med_min3 + j) + (*(salida + j) << n3); | |
| 368 | } | |
| 369 | if(n3 == 3) n3 = 0; else n3++; | |
| 370 | i++; | |
| 371 | } | |
| 372 | else | |
| 373 | { | |
| 374 | ||
| 375 | if(*(ap + (i * LONG_ARBOL) + 7) == 4) | |
| 376 | { | |
| 377 | for(j = 0; j < COMBS; j++) | |
| 378 | { | |
| 379 | *(salida + j) = eval_func_lut(ap + (i * LONG_ARBOL), *(med_min3 + j), vars); | |
| 380 | } | |
| 381 | for(j = 0; j < COMBS; j++) | |
| 382 | { | |
| 383 | *(med_min4 + j) = *(med_min4 + j) + (*(salida + j) << n4); | |
| 384 | } | |
| 385 | if(n4 == 3) n4 = 0; else n4++; | |
| 386 | i++; | |
| 387 | } | |
| 388 | } | |
| 389 | } | |
| 390 | }while(i <= (ARBOLES_INDIV-1)); | |
| 391 | ||
| 392 | if(*(ap + ((ARBOLES_INDIV-1) * LONG_ARBOL) + 7) == 2) | |
| 393 | { | |
| 394 | for(j = 0; j < COMBS; j++) //se evalua el arbol de salida | |
| 395 | { | |
| 396 | errores = errores + abs(*(med_min2 + j) - *(obj_min + j)); //errores | |
| 397 | /* printf("[%i]",*(med_min2 + j));*/ | |
| 398 | } | |
| 399 | } | |
| 400 | ||
| 401 | if(*(ap + ((ARBOLES_INDIV-1) * LONG_ARBOL) + 7) == 3) | |
| 402 | { | |
| 403 | for(j = 0; j < COMBS; j++) //se evalua el arbol de salida | |
| 404 | { | |
| 405 | errores = errores + abs(*(med_min3 + j) - *(obj_min + j)); //errores | |
| 406 | } | |
| 407 | } | |
| 408 | ||
| 409 | if(*(ap + ((ARBOLES_INDIV-1) * LONG_ARBOL) + 7) == 4) | |
| 410 | { | |
| 411 | for(j = 0; j < COMBS; j++) //se evalua el arbol de salida | |
| 412 | { | |
| 413 | errores = errores + abs(*(med_min4 + j) - *(obj_min + j)); //errores | |
| 414 | } | |
| 415 | } | |
| 416 | ||
| 417 | if(*(ap + ((ARBOLES_INDIV-1) * LONG_ARBOL) + 7) == 5) | |
| 418 | { | |
| 419 | for(j = 0; j < COMBS; j++) //se evalua el arbol de salida | |
| 420 | { | |
| 421 | errores = errores + abs(*(med_min5 + j) - *(obj_min + j)); //errores | |
| 422 | } | |
| 423 | } | |
| 424 | free(obj_min); | |
| 425 | free(med_min2); | |
| 426 | free(med_min3); | |
| 427 | free(med_min4); | |
| 428 | free(med_min5); | |
| 429 | free(entrada); | |
| 430 | free(salida); | |
| 431 | ||
| 432 | puertas = 0; | |
| 433 | ||
| 434 | return ((errores * PESO_SALIDA) + puertas); | |
| 435 | } | |
| 436 | ||
| 437 | /************************************************************************************************************************************** | |
| 438 | inicia la evaluacion de un cromosoma en un periferico*/ | |
| 439 | int evalfit_hw_init(char *cromo, int pentarboles, int nivel_max, void *evalfit_ptr ) | |
| 440 | { | |
| 441 | int i; | |
| 442 | ||
| 443 | /** insertar cromosoma en periferico **/ | |
| 444 | for(i = 0; i < ARBOLES_INDIV; i++) | |
| 445 | { | |
| 446 | *(int *)((evalfit_ptr) + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)) = *(char *)(cromo +(LONG_ARBOL*i)+7); | |
| 447 | // printf("\n%i: %0x",i,*(int *)(evalfit_ptr + EVALFIT_MEMOFFSET + (LONG_ARBOL*i))); | |
| 448 | *(int *)((evalfit_ptr) + EVALFIT_MEMOFFSET + (LONG_ARBOL*i) + 4) = *(int *)(cromo +(LONG_ARBOL*i)); | |
| 449 | // printf(": %0x",*(int *)(evalfit_ptr + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)+4)); | |
| 450 | } | |
| 451 | *(int *)((evalfit_ptr) + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)) = 0xF; //para terminar | |
| 452 | i++; | |
| 453 | *(int *)((evalfit_ptr) + EVALFIT_MEMOFFSET + (LONG_ARBOL*i)) = 0xF; //para terminar | |
| 454 | ||
| 455 | /** Iniciar **/ | |
| 456 | *(int *)(evalfit_ptr + EVALFIT_CONTROL_OFFSET) = CONTROL_START_MASK; | |
| 457 | } | |
| 458 | ||
| 459 | /************************************************************************************************************************************** | |
| 460 | espera y retorna el numero de errores y las salidas de un cromosoma de 1 o mas pentarboles*/ | |
| 461 | int evalfit_hw_wait(char *cromo, int pentarboles, int nivel_max, void *evalfit_ptr ) | |
| 462 | { | |
| 463 | int errores, puertas, i; | |
| 464 | ||
| 465 | // tiempo1 = get_timestamp(); | |
| 466 | do{ }while((*(int *)(evalfit_ptr + EVALFIT_RDREG1) & DONE_MASK) != 1); | |
| 467 | // tiempo2 = get_timestamp(); | |
| 468 | errores = *(int *)(evalfit_ptr + EVALFIT_RDREG2) & ERRORS_MASK; //errores | |
| 469 | *(int *)(evalfit_ptr + EVALFIT_CONTROL_OFFSET) = 0; //terminar, bajar habilita | |
| 470 | ||
| 471 | puertas = 0; | |
| 472 | for(i = 0; i < ARBOLES_INDIV; i++) | |
| 473 | { | |
| 474 | puertas = puertas + *(puertas_ap + *(char *)(cromo +(LONG_ARBOL*i)+6)); | |
| 475 | } | |
| 476 | ||
| 477 | return ((errores * PESO_SALIDA) + (PESO_PUERTAS * puertas) + (PESO_NIVELES * nivel_max)); | |
| 478 | } | |
| 479 | ||
| 480 | /************************************************************************************************************************************** | |
| 481 | cruza dos cromosomas y almacena en destino. */ | |
| 482 | void cruzar(char *padre1, char *padre2, char *destino1, char *destino2, int pentarboles) | |
| 483 | { | |
| 484 | int a, i; | |
| 485 | ||
| 486 | a = (random() & 0x1F) + 1; //punto de corte, es un numero de arbol | |
| 487 | ||
| 488 | while(a > (ARBOLES_INDIV)) | |
| 489 | { | |
| 490 | a = a - ARBOLES_INDIV;//(pentarboles * ARBOLES); | |
| 491 | } | |
| 492 | a = a-1; | |
| 493 | // printf("\n%i",a); | |
| 494 | ||
| 495 | for(i = 0; i < (a * LONG_ARBOL); i++) | |
| 496 | { | |
| 497 | *(destino1 + i) = *(padre1 + i); //padre1 | |
| 498 | *(destino2 + i) = *(padre2 + i); //padre1 | |
| 499 | } | |
| 500 | ||
| 501 | for(i = (a * LONG_ARBOL); i < LONG_INDIV; i++) // +1 para el arbol de salida | |
| 502 | { | |
| 503 | *(destino1 + i) = *(padre2 + i); //padre2 | |
| 504 | *(destino2 + i) = *(padre1 + i); //padre2 | |
| 505 | } | |
| 506 | } | |
| 507 | ||
| 508 | /************************************************************************************************************************************** | |
| 509 | cruza dos cromosomas y almacena en destino. */ | |
| 510 | void cross2point(char *padre1, char *padre2, char *destino1, char *destino2, int pentarboles) | |
| 511 | { | |
| 512 | int a, b, i; | |
| 513 | ||
| 514 | a = random_var((pentarboles*ARBOLES)-3); | |
| 515 | b = random_var((pentarboles*ARBOLES)-a-2)+a; | |
| 516 | a++; | |
| 517 | b++; | |
| 518 | // printf("\n%i %i %i",a,b,pentarboles*ARBOLES);fflush(stdout); | |
| 519 | for(i = 0; i < (a*LONG_ARBOL) ; i++) | |
| 520 | { | |
| 521 | *(destino1 + i) = *(padre1 + i); // | |
| 522 | *(destino2 + i) = *(padre2 + i); // | |
| 523 | } | |
| 524 | for(i = a; i < (b*LONG_ARBOL) ; i++) | |
| 525 | { | |
| 526 | *(destino2 + i) = *(padre1 + i); // | |
| 527 | *(destino1 + i) = *(padre2 + i); // | |
| 528 | } | |
| 529 | for(i = (b*LONG_ARBOL); i < LONG_INDIV; i++) // +1 para el arbol de salida | |
| 530 | { | |
| 531 | *(destino1 + i) = *(padre1 + i); //padre2 | |
| 532 | *(destino2 + i) = *(padre2 + i); //padre2 | |
| 533 | } | |
| 534 | } | |
| 535 | ||
| 536 | /************************************************************************************************************************************** | |
| 537 | muta un cromosoma y almacena en destino. */ | |
| 538 | ||
| 539 | void muta_indiv(char *padre, char *destino, int pentarboles, int vars) | |
| 540 | { | |
| 541 | int a, i; | |
| 542 | ||
| 543 | gen_indiv(destino, pentarboles, vars); | |
| 544 | ||
| 545 | a = (random() & 0x1F) + 1; //punto de corte, es un numero de arbol | |
| 546 | ||
| 547 | while(a > (ARBOLES_INDIV)) | |
| 548 | { | |
| 549 | a = a - ARBOLES_INDIV; | |
| 550 | } | |
| 551 | ||
| 552 | for(i = 0; i < (a * LONG_ARBOL); i++) | |
| 553 | { | |
| 554 | *(destino + i) = *(padre + i); //padre1 | |
| 555 | } | |
| 556 | } | |
| 557 | ||
| 558 | /************************************************************************************************************************************** | |
| 559 | Introducir minterminos **/ | |
| 560 | void minterm2peripheral(int *fun_obj, int tamano, void *evalfit_ptr) | |
| 561 | { | |
| 562 | int i, j, a; | |
| 563 | ||
| 564 | for(i = 0; i < 512; i++) //rellenar con 0 | |
| 565 | { | |
| 566 | *(int *)(evalfit_ptr + EVALFIT_OBJOFFSET + (i*4)) = 0; | |
| 567 | } | |
| 568 | ||
| 569 | for(i = 0; i < tamano; i++) //insertar 1's en segmento de mem objetivo | |
| 570 | { | |
| 571 | j=0; | |
| 572 | a=fun_obj[i]; | |
| 573 | while(a > 31) | |
| 574 | { | |
| 575 | a -= 32; | |
| 576 | j++; | |
| 577 | } | |
| 578 | *(int *)(evalfit_ptr + EVALFIT_OBJOFFSET + (j*4)) += (1 << (31-a)); | |
| 579 | } | |
| 580 | } | |
| 581 | ||
| 582 | /************************************************************************************************************************************** | |
| 583 | inicializar periferico **/ | |
| 584 | int init_peripheral(int offset_int, int basemem) | |
| 585 | { | |
| 586 | /* Variables para periferico*/ | |
| 587 | int *aux, base_periferico, *evalfit_ptr; | |
| 588 | off_t offset = offset_int; //Direccion base del periferico | |
| 589 | base_periferico = (int *)mmap(NULL, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, basemem, offset & ~MAP_MASK); | |
| 590 | evalfit_ptr = base_periferico + (offset & MAP_MASK); | |
| 591 | printf("\r\nPeripheral_ptr: %0x", evalfit_ptr); | |
| 592 | if( (int *)evalfit_ptr == (int *)MAP_FAILED) | |
| 593 | { printf("error mmap!\n"); | |
| 594 | fflush(stdout); | |
| 595 | return -1; | |
| 596 | } | |
| 597 | *(int *)(evalfit_ptr + EVALFIT_CONTROL_OFFSET) = CONTROL_RESET_MASK; //reset | |
| 598 | *(int *)(evalfit_ptr + EVALFIT_CONTROL_OFFSET) = 0; | |
| 599 | printf("\nDate + Status: %0x\n", *(int *)(evalfit_ptr + EVALFIT_STATUS_OFFSET)); | |
| 600 | return evalfit_ptr; | |
| 601 | } | |
| 602 | ||
| 603 | /************************************************************************************************************************************** | |
| 604 | cerrar periferico **/ | |
| 605 | int close_peripheral(char *evalfit_ptr) | |
| 606 | { | |
| 607 | if(munmap(evalfit_ptr, MAP_SIZE)==-1) | |
| 608 | perror("munmap"); | |
| 609 | printf("Error en unmap() (close_peripheral)\n"); | |
| 610 | exit(-1); | |
| 611 | } | |
| 612 | ||
| 613 | /************************************************************************************************************************************** | |
| 614 | cambiar endianismo **/ | |
| 615 | int big2little(int x) | |
| 616 | { | |
| 617 | int y, i, r; | |
| 618 | y=0; | |
| 619 | r=0; | |
| 620 | for(i=0 ; i<=3; i++){ | |
| 621 | x = x >> r; | |
| 622 | y = y << r; | |
| 623 | y = y | (x & 0xFF); | |
| 624 | r = 8; | |
| 625 | } | |
| 626 | return y; | |
| 627 | } | |
| 628 | ||
| 629 | /************************************************************************************************************************************** | |
| 630 | crea y evoluciona un cromosoma a partir de una funcion objetivo*/ | |
| 631 | evolucionar(struct gen_datos_tipo *gen_datos) | |
| 632 | { | |
| 633 | int *generacion, k, a, i, j = 0, tamacromo, vars, aux, *aux_sal, T; | |
| 634 | int conta=0, aux1, aux2, *fitness, *fitness2, *entrada, *objetivo, tamaobj, pentarboles, *fitness_sal, fitness_entrada, nivel_max; | |
| 635 | char o, *ap, *cromo, *ordenpoblacion, *cromo_sal, *cromo_entrada; | |
| 636 | long int tiempo1, tiempo2; | |
| 637 | float tiempof1, tiempof2, tiempof3; | |
| 638 | ||
| 639 | /* Variables para almacenar datos para graficar*/ | |
| 640 | int *datos, x, puntos; | |
| 641 | char ruta[]="sarsar.dat"; | |
| 642 | FILE *fich; | |
| 643 | /* datos = malloc(sizeof(datos)*maxgeneraciones*2); if(datos==0) printf("Error en malloc");*/ | |
| 644 | /* x=0;*/ | |
| 645 | ||
| 646 | objetivo = gen_datos -> objetivo; | |
| 647 | tamaobj = gen_datos -> tamaobj; | |
| 648 | pentarboles = gen_datos -> pentarboles; | |
| 649 | tamacromo = gen_datos -> tamacrom; | |
| 650 | cromo_sal = gen_datos -> cromo_sal; | |
| 651 | fitness_sal = gen_datos -> fitness; | |
| 652 | cromo_entrada = gen_datos -> cromo_entrada; | |
| 653 | fitness_entrada = gen_datos -> fitness_entrada; | |
| 654 | nivel_max = gen_datos -> nivel_max; | |
| 655 | vars = gen_datos -> vars; | |
| 656 | generacion = gen_datos->generacion; | |
| 657 | aux = gen_datos->aux; | |
| 658 | aux_sal = gen_datos->aux_sal; | |
| 659 | ||
| 660 | cromo = malloc(sizeof(cromo) * (poblacion + 2) * LONG_INDIV); if(cromo==0) printf("Error en malloc"); | |
| 661 | fitness = malloc(sizeof(fitness) * (poblacion+1)); if(fitness==0) printf("Error en malloc"); | |
| 662 | fitness2 = malloc(sizeof(fitness2) * (poblacion+1)); if(fitness2==0) printf("Error en malloc"); | |
| 663 | ordenpoblacion = malloc(sizeof(ordenpoblacion) * (poblacion+1)); if(ordenpoblacion==0) printf("Error en malloc"); | |
| 664 | ||
| 665 | if(gen_datos->en_cromo_entrada == 1) | |
| 666 | { | |
| 667 | for(i = 0; i < LONG_INDIV; i++ ) | |
| 668 | { | |
| 669 | *(char *)(cromo + i) = *(char *)(cromo_entrada + i); | |
| 670 | } | |
| 671 | } | |
| 672 | ||
| 673 | if(gen_datos->en_cromo_entrada==0) gen_poblacion(cromo, pentarboles, vars, poblacion); | |
| 674 | else gen_poblacion(cromo + LONG_INDIV, pentarboles, vars, poblacion-1); | |
| 675 | ||
| 676 | for(i = 0; i < poblacion; i++) | |
| 677 | { | |
| 678 | *(ordenpoblacion + i) = i; //se inicializa el stream para el orden poblacional | |
| 679 | *(fitness + i) = 100000; | |
| 680 | *(fitness2 + i) = 100000; | |
| 681 | } | |
| 682 | ||
| 683 | /** copiar miniterminos a periferico **/ | |
| 684 | if(HW_ENABLE == 1) { | |
| 685 | minterm2peripheral(objetivo, tamaobj, (int *)(evalfit_ptr1)); | |
| 686 | minterm2peripheral(objetivo, tamaobj, (int *)(evalfit_ptr2)); | |
| 687 | minterm2peripheral(objetivo, tamaobj, (int *)(evalfit_ptr3)); | |
| 688 | minterm2peripheral(objetivo, tamaobj, (int *)(evalfit_ptr4)); | |
| 689 | } | |
| 690 | ||
| 691 | /** Insertar maxcombs y nivel_max **/ | |
| 692 | if(HW_ENABLE == 1) { | |
| 693 | *(int *)(evalfit_ptr1 + EVALFIT_WREG4) = (COMBS-1) + (nivel_max << 16); | |
| 694 | *(int *)(evalfit_ptr2 + EVALFIT_WREG4) = (COMBS-1) + (nivel_max << 16); | |
| 695 | *(int *)(evalfit_ptr3 + EVALFIT_WREG4) = (COMBS-1) + (nivel_max << 16); | |
| 696 | *(int *)(evalfit_ptr4 + EVALFIT_WREG4) = (COMBS-1) + (nivel_max << 16); | |
| 697 | } | |
| 698 | o=0; | |
| 699 | *generacion = 0; | |
| 700 | T = aux >> 16; | |
| 701 | do{ | |
| 702 | ||
| 703 | // cruzar | |
| 704 | for(i = ((poblacion*T)/8); i < ((poblacion*(T+1))/8); i=i+4) //salvar los primeros 4 y cruzar | |
| 705 | { | |
| 706 | cross2point(cromo+INDICE_PADRE1, cromo+INDICE_PADRE2, cromo+(*(ordenpoblacion+i)*LONG_INDIV), cromo+(*(ordenpoblacion+i+1)*LONG_INDIV), pentarboles); | |
| 707 | cross2point(cromo+INDICE_PADRE1, cromo+INDICE_PADRE2, cromo+(*(ordenpoblacion+i+2)*LONG_INDIV), cromo+(*(ordenpoblacion+i+3)*LONG_INDIV), pentarboles); | |
| 708 | }//cruzar | |
| 709 | ||
| 710 | // Mutacion | |
| 711 | for(i = ((poblacion*(T+1))/8); i < ((poblacion*(T+2))/8); i++) | |
| 712 | { | |
| 713 | muta_indiv(cromo + INDICE_PADRE1, cromo + ((*(ordenpoblacion + i )) * LONG_INDIV), pentarboles, vars); | |
| 714 | } | |
| 715 | for(i = ((poblacion*(T+2))/8); i < ((poblacion*(T+3))/8); i++) | |
| 716 | { | |
| 717 | muta_indiv(cromo + INDICE_PADRE2, cromo + ((*(ordenpoblacion + i )) * LONG_INDIV), pentarboles, vars); | |
| 718 | } | |
| 719 | ||
| 720 | //crear nuevos indiv reemplazar por taras | |
| 721 | for(i = ((poblacion*(T+3))/8); i < poblacion; i++) | |
| 722 | { | |
| 723 | gen_indiv((cromo + ((*(ordenpoblacion + i)) * LONG_INDIV)), pentarboles, vars); | |
| 724 | } | |
| 725 | ||
| 726 | // evaluar cromosomas de poblacion | |
| 727 | o=0; | |
| 728 | // tiempo1 = get_timestamp(); | |
| 729 | for(i = 0; i < poblacion; i=i+4) | |
| 730 | { | |
| 731 | if(HW_ENABLE == 1) | |
| 732 | { | |
| 733 | evalfit_hw_init((cromo + (i * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr1); | |
| 734 | evalfit_hw_init((cromo + ((i+1) * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr2); | |
| 735 | evalfit_hw_init((cromo + ((i+2) * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr3); | |
| 736 | evalfit_hw_init((cromo + ((i+3) * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr4); | |
| 737 | *(fitness + i) = evalfit_hw_wait((cromo + (i * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr1); | |
| 738 | *(fitness + i+1) = evalfit_hw_wait((cromo + ((i+1) * LONG_INDIV)), pentarboles,nivel_max, (int *)evalfit_ptr2); | |
| 739 | *(fitness + i+2) = evalfit_hw_wait((cromo + ((i+2) * LONG_INDIV)), pentarboles,nivel_max, (int *)evalfit_ptr3); | |
| 740 | *(fitness + i+3) = evalfit_hw_wait((cromo + ((i+3) * LONG_INDIV)), pentarboles, nivel_max, (int *)evalfit_ptr4); | |
| 741 | }else{ | |
| 742 | *(fitness + i) = eval_fit_sw((cromo + (i * LONG_INDIV)), objetivo, tamaobj, pentarboles, vars); | |
| 743 | *(fitness + i+1) = eval_fit_sw((cromo + ((i+1) * LONG_INDIV)), objetivo, tamaobj, pentarboles, vars); | |
| 744 | *(fitness + i+2) = eval_fit_sw((cromo + ((i+2) * LONG_INDIV)), objetivo, tamaobj, pentarboles, vars); | |
| 745 | *(fitness + i+3) = eval_fit_sw((cromo + ((i+3) * LONG_INDIV)), objetivo, tamaobj, pentarboles, vars); | |
| 746 | } | |
| 747 | *(fitness2 + i) = *(fitness + i); | |
| 748 | *(fitness2 + i+1) = *(fitness + i+1); | |
| 749 | *(fitness2 + i+2) = *(fitness + i+2); | |
| 750 | *(fitness2 + i+3) = *(fitness + i+3); | |
| 751 | ||
| 752 | if(*(fitness + i) < PESO_SALIDA) | |
| 753 | { | |
| 754 | o++; //incrementar numero de aciertos | |
| 755 | } | |
| 756 | } | |
| 757 | // tiempo2 = get_timestamp(); | |
| 758 | x++; | |
| 759 | ||
| 760 | //seleccionar cromosomas para mutar y cruzar y para eliminar, se realiza una ordenacion en ordenpoblacion, solo se ordena el indice del cromosoma | |
| 761 | for(i = 0; i < poblacion; i++) | |
| 762 | { | |
| 763 | *(ordenpoblacion + i) = i; //se inicializa el stream para el orden poblacional | |
| 764 | } | |
| 765 | ||
| 766 | for(i=0; i < poblacion; i++) | |
| 767 | { | |
| 768 | for(j=i+1; j < poblacion; j++) | |
| 769 | { | |
| 770 | if(*(fitness2 + j) < *(fitness2 + i)) | |
| 771 | { | |
| 772 | aux1 = *(ordenpoblacion + i); | |
| 773 | *(ordenpoblacion + i) = *(ordenpoblacion + j); | |
| 774 | *(ordenpoblacion + j) = aux1; | |
| 775 | aux2 = *(fitness2 + i); | |
| 776 | *(fitness2 + i) = *(fitness2 + j); | |
| 777 | *(fitness2 + j) = aux2; | |
| 778 | } | |
| 779 | } | |
| 780 | } | |
| 781 | ||
| 782 | ||
| 783 | //Se mide la evolucion del fitness en las generaciones, se saca la media por generacion | |
| 784 | aux1 = 0; | |
| 785 | for(i = 0; i < poblacion; i++) | |
| 786 | { | |
| 787 | aux1 = aux1 + *(fitness + i); | |
| 788 | } | |
| 789 | *(aux_sal + *generacion) = aux1 / poblacion; | |
| 790 | *(aux_sal + maxgeneraciones + *generacion) = *fitness2; | |
| 791 | ||
| 792 | (*generacion)++; | |
| 793 | ||
| 794 | // for(i=0; i < RESULTADOS; i++) | |
| 795 | // { | |
| 796 | // printf("\nfit%i: %i ", i, *(fitness+*(ordenpoblacion+i)), *(generacion+*(ordenpoblacion+i))); | |
| 797 | // mostrar_indiv(cromo + ( *(ordenpoblacion + i) * LONG_INDIV), pentarboles, vars); | |
| 798 | // } | |
| 799 | ||
| 800 | }while(/* (o < RESULTADOS) && */ (*generacion < maxgeneraciones)); | |
| 801 | ||
| 802 | for(i = 0; i < RESULTADOS; i++) | |
| 803 | { | |
| 804 | for(j=0; j< LONG_INDIV;j++) | |
| 805 | { | |
| 806 | *(cromo_sal + (i*LONG_INDIV) + j) = *(cromo + (*(ordenpoblacion + i)*LONG_INDIV) + j); | |
| 807 | } | |
| 808 | *(fitness_sal + i) = *(fitness + *(ordenpoblacion + i)); | |
| 809 | } | |
| 810 | ||
| 811 | free(cromo); | |
| 812 | free(fitness); | |
| 813 | free(fitness2); | |
| 814 | free(ordenpoblacion); | |
| 815 | } | |
| 816 | ||
| Examples/ehw4/src/genetic.h | ||
|---|---|---|
| 1 | ||
| 2 | /** Genetic definitions **/ | |
| 3 | #define HW_ENABLE 1 //cambiar en sintesishw_server.h habilitar hw, 0 se hace por SW | |
| 4 | #define PAR_ONLYFIT 0 //paralelizacion, 0 ALGORITMO ENTERO, 1 SOLO FITNESS | |
| 5 | ||
| 6 | #define FUNCIONES 4 | |
| 7 | #define COMBS (int) pow(2,vars) | |
| 8 | #define FUNCOMBS (int) pow(FUNCIONES + 1, 3) | |
| 9 | #define FUN_NOT 0 | |
| 10 | #define FUN_AND 1 | |
| 11 | #define FUN_XOR 2 | |
| 12 | #define FUN_OR 3 | |
| 13 | #define YES FUNCIONES | |
| 14 | #define NOVAR vars | |
| 15 | #define PESO_SALIDA 100 | |
| 16 | #define PESO_PUERTAS 5 | |
| 17 | #define PESO_NIVELES 0 | |
| 18 | ||
| 19 | #define RESULTADOS 2 | |
| 20 | ||
| 21 | /* Numero de generaciones en el que se amplia la logitud del cromosoma*/ | |
| 22 | #define UMBRAL_GENERACION (int) pow(3, pentarboles) * 33 | |
| 23 | #define MAX_PENTARBOLES 16 | |
| 24 | ||
| 25 | #define ARBOLES 5 | |
| 26 | #define LONG_ARBOL 8 | |
| 27 | ||
| 28 | int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; | |
| 29 | int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4}; | |
| 30 | int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1}; | |
| 31 | int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0}; | |
| 32 | ||
| 33 | #define nivel1 pentarboles * 4 | |
| 34 | #define ARBOLES_INDIV (int)(nivel1 + *(nivel2+pentarboles) + *(nivel3+pentarboles) + *(nivel4+pentarboles) + *(nivel5+pentarboles)) | |
| 35 | #define LONG_INDIV (int)(ARBOLES_INDIV * LONG_ARBOL) | |
| 36 | ||
| 37 | #define INDICE_PADRE1 ((*ordenpoblacion) * LONG_INDIV) | |
| 38 | #define INDICE_PADRE2 ((*(ordenpoblacion+1)) * LONG_INDIV) | |
| 39 | ||
| 40 | #define INDICE_TARA1 ((*(ordenpoblacion+poblacion-1)) * LONG_INDIV) | |
| 41 | #define INDICE_TARA2 ((*(ordenpoblacion+poblacion-2)) * LONG_INDIV) | |
| 42 | #define INDICE_TARA3 ((*(ordenpoblacion+poblacion-3)) * LONG_INDIV) | |
| 43 | #define INDICE_TARA4 ((*(ordenpoblacion+poblacion-4)) * LONG_INDIV) | |
| 44 | ||
| 45 | ||
| 46 | /************************** peripheral Definitions ***************************/ | |
| 47 | ||
| 48 | #define USR_REGS 0x10 | |
| 49 | #define MAP_SIZE 0x4000Ul | |
| 50 | #define MAP_MASK (MAP_SIZE - 1) | |
| 51 | ||
| 52 | #define DONE_MASK 0x1 | |
| 53 | #define ERRORS_MASK 0xFFFF | |
| 54 | ||
| 55 | /** CONTROL REGISTERS **/ | |
| 56 | #define EVALFIT_REGBASE_OFFSET 0 | |
| 57 | ||
| 58 | #define EVALFIT_CONTROL_OFFSET EVALFIT_REGBASE_OFFSET + 0 | |
| 59 | #define CONTROL_RESET_MASK 0x80000000 | |
| 60 | #define CONTROL_START_MASK 0x40000000 | |
| 61 | ||
| 62 | #define EVALFIT_STATUS_OFFSET EVALFIT_REGBASE_OFFSET + 0 | |
| 63 | #define EVALFIT_SRCADDR_OFFSET EVALFIT_REGBASE_OFFSET + 4 | |
| 64 | #define EVALFIT_DSTADDR_OFFSET EVALFIT_REGBASE_OFFSET + 8 | |
| 65 | #define EVALFIT_TRANSFERSIZE_OFFSET EVALFIT_REGBASE_OFFSET + 12 | |
| 66 | #define EVALFIT_REG_OFFSET EVALFIT_REGBASE_OFFSET + 16 | |
| 67 | ||
| 68 | /** WRITE REGISTERS **/ | |
| 69 | #define EVALFIT_WREG4 (EVALFIT_REGBASE_OFFSET + (4*4)) | |
| 70 | #define EVALFIT_WREG5 (EVALFIT_REGBASE_OFFSET + (4*5)) | |
| 71 | #define EVALFIT_wREG6 (EVALFIT_REGBASE_OFFSET + (4*6)) | |
| 72 | #define EVALFIT_wREG7 (EVALFIT_REGBASE_OFFSET + (4*7)) | |
| 73 | #define EVALFIT_wREG8 (EVALFIT_REGBASE_OFFSET + (4*8)) | |
| 74 | ||
| 75 | /** READ REGISTERS **/ | |
| 76 | #define EVALFIT_RDREG0 (EVALFIT_REGBASE_OFFSET) | |
| 77 | #define EVALFIT_RDREG1 (EVALFIT_REGBASE_OFFSET + (4*1)) | |
| 78 | #define EVALFIT_RDREG2 (EVALFIT_REGBASE_OFFSET + (4*2)) | |
| 79 | #define EVALFIT_RDREG3 (EVALFIT_REGBASE_OFFSET + (4*3)) | |
| 80 | #define EVALFIT_RDREG4 (EVALFIT_REGBASE_OFFSET + (4*4)) | |
| 81 | #define EVALFIT_RDREG5 (EVALFIT_REGBASE_OFFSET + (4*5)) | |
| 82 | #define EVALFIT_RDREG6 (EVALFIT_REGBASE_OFFSET + (4*6)) | |
| 83 | #define EVALFIT_RDREG7 (EVALFIT_REGBASE_OFFSET + (4*7)) | |
| 84 | #define EVALFIT_RDREG8 (EVALFIT_REGBASE_OFFSET + (4*8)) | |
| 85 | /** MEMORY **/ | |
| 86 | #define EVALFIT_MEMOFFSET 0x1000 | |
| 87 | #define EVALFIT_OBJOFFSET EVALFIT_MEMOFFSET + (0x40 * 8) | |
| 88 | ||
| 89 | /** CROMOSOMA **/ | |
| 90 | #define CROMO_NIVEL_OFFSET | |
| 91 | ||
| 92 | /* Variables globales */ | |
| 93 | char *funlut_ap, *puertas_ap; | |
| 94 | void *evalfit_ptr1, *evalfit_ptr4, *evalfit_ptr3, *evalfit_ptr2; | |
| 95 | int maxgeneraciones, poblacion; | |
| 96 | ||
| 97 | ||
| 98 | typedef long long timestamp_t; | |
| 99 | static timestamp_t | |
| 100 | get_timestamp () | |
| 101 | { | |
| 102 | struct timeval now; | |
| 103 | gettimeofday (&now, NULL); | |
| 104 | return now.tv_usec + (timestamp_t)now.tv_sec *1000000 ; | |
| 105 | } | |
| 106 | ||
| 107 | struct gen_datos_tipo | |
| 108 | { | |
| 109 | int *objetivo; | |
| 110 | int tamaobj; | |
| 111 | int pentarboles; | |
| 112 | int vars; | |
| 113 | int tamacrom; | |
| 114 | int maxgen; | |
| 115 | char *cromo_sal; | |
| 116 | int *fitness; | |
| 117 | char *cromo_entrada; | |
| 118 | int fitness_entrada; | |
| 119 | int nivel_max; | |
| 120 | int en_cromo_entrada; | |
| 121 | int *generacion; | |
| 122 | int *tiempo; | |
| 123 | int aux; | |
| 124 | int *aux_sal; | |
| 125 | }; | |
| 126 | ||
| Examples/ehw4/src/puertas.dat |
|---|
| Examples/ehw4/src/sintesishw.h | ||
|---|---|---|
| 1 | /** Genetic definitions **/ | |
| 2 | ||
| 3 | #define HW_ENABLE 0 //habilitar hw, 0 se hace por SW | |
| 4 | #define VARS 8 | |
| 5 | #define FUNCIONES 4 | |
| 6 | #define COMBS (int) pow(2,VARS) | |
| 7 | #define FUNCOMBS (int) pow(FUNCIONES + 1, 3) | |
| 8 | #define FUN_NOT 0 | |
| 9 | #define FUN_AND 1 | |
| 10 | #define FUN_XOR 2 | |
| 11 | #define FUN_OR 3 | |
| 12 | #define YES FUNCIONES | |
| 13 | #define NOVAR VARS | |
| 14 | #define PESO_SALIDA 1 | |
| 15 | #define PESO_PUERTAS 1 | |
| 16 | ||
| 17 | #define MAXGENERACIONES 32 | |
| 18 | #define RESULTADOS 4 | |
| 19 | ||
| 20 | /* Numero de generaciones en el que se amplia la logitud del cromosoma*/ | |
| 21 | #define UMBRAL_GENERACION (int) pow(3, pentarboles) * 5000 | |
| 22 | #define MAX_PENTARBOLES 16 | |
| 23 | ||
| 24 | #define POBLACION 4 | |
| 25 | #define ARBOLES 5 | |
| 26 | #define LONG_ARBOL 8 | |
| 27 | ||
| 28 | ||
| 29 | ||
| 30 | /* | |
| 31 | POBLACION define el numero de individuos. minimo 6. 2 padres 4 taras | |
| 32 | ARBOLES define el numero de arboles en un individuo. Cada arbol tiene 3 funciones 4 variables. | |
| 33 | INDICES_XXX define el desplazamiento de un individuo en el cromosoma completo de la poblacion, cromo | |
| 34 | */ | |
| 35 | ||
| 36 | #define nivel1 pentarboles * 4 | |
| 37 | #define ARBOLES_INDIV (int)(nivel1 + nivel2(pentarboles) + nivel3(pentarboles) + nivel4(pentarboles) + nivel5(pentarboles)) | |
| 38 | #define LONG_INDIV (int)(ARBOLES_INDIV * LONG_ARBOL) | |
| 39 | ||
| 40 | #define INDICE_PADRE1 ((*ordenpoblacion) * LONG_INDIV) | |
| 41 | #define INDICE_PADRE2 ((*(ordenpoblacion+1)) * LONG_INDIV) | |
| 42 | ||
| 43 | #define INDICE_TARA1 ((*(ordenpoblacion+POBLACION-1)) * LONG_INDIV) | |
| 44 | #define INDICE_TARA2 ((*(ordenpoblacion+POBLACION-2)) * LONG_INDIV) | |
| 45 | #define INDICE_TARA3 ((*(ordenpoblacion+POBLACION-3)) * LONG_INDIV) | |
| 46 | #define INDICE_TARA4 ((*(ordenpoblacion+POBLACION-4)) * LONG_INDIV) | |
| 47 | ||
| 48 | ||
| 49 | ||
| 50 | /************************** peripheral Definitions ***************************/ | |
| 51 | #define EVALFIT_PHYSBASE 0xcd800000 | |
| 52 | #define USR_REGS 0x10 | |
| 53 | #define MAP_SIZE 0x4000Ul | |
| 54 | #define MAP_MASK (MAP_SIZE - 1) | |
| 55 | ||
| 56 | #define DONE_MASK 0x1 | |
| 57 | #define ERRORS_MASK 0xFFFF | |
| 58 | ||
| 59 | ||
| 60 | ||
| 61 | /** CONTROL REGISTERS **/ | |
| 62 | #define EVALFIT_REGBASE_OFFSET 0 | |
| 63 | ||
| 64 | #define EVALFIT_CONTROL_OFFSET EVALFIT_REGBASE_OFFSET + 0 | |
| 65 | #define CONTROL_RESET_MASK 0x80000000 | |
| 66 | #define CONTROL_START_MASK 0x40000000 | |
| 67 | ||
| 68 | #define EVALFIT_STATUS_OFFSET EVALFIT_REGBASE_OFFSET + 0 | |
| 69 | #define EVALFIT_SRCADDR_OFFSET EVALFIT_REGBASE_OFFSET + 4 | |
| 70 | #define EVALFIT_DSTADDR_OFFSET EVALFIT_REGBASE_OFFSET + 8 | |
| 71 | #define EVALFIT_TRANSFERSIZE_OFFSET EVALFIT_REGBASE_OFFSET + 12 | |
| 72 | #define EVALFIT_REG_OFFSET EVALFIT_REGBASE_OFFSET + 16 | |
| 73 | ||
| 74 | /** WRITE REGISTERS **/ | |
| 75 | #define EVALFIT_WREG4 (EVALFIT_REGBASE_OFFSET + (4*4)) | |
| 76 | #define EVALFIT_WREG5 (EVALFIT_REGBASE_OFFSET + (4*5)) | |
| 77 | #define EVALFIT_wREG6 (EVALFIT_REGBASE_OFFSET + (4*6)) | |
| 78 | #define EVALFIT_wREG7 (EVALFIT_REGBASE_OFFSET + (4*7)) | |
| 79 | #define EVALFIT_wREG8 (EVALFIT_REGBASE_OFFSET + (4*8)) | |
| 80 | ||
| 81 | /** READ REGISTERS **/ | |
| 82 | #define EVALFIT_RDREG0 (EVALFIT_REGBASE_OFFSET) | |
| 83 | #define EVALFIT_RDREG1 (EVALFIT_REGBASE_OFFSET + (4*1)) | |
| 84 | #define EVALFIT_RDREG2 (EVALFIT_REGBASE_OFFSET + (4*2)) | |
| 85 | #define EVALFIT_RDREG3 (EVALFIT_REGBASE_OFFSET + (4*3)) | |
| 86 | #define EVALFIT_RDREG4 (EVALFIT_REGBASE_OFFSET + (4*4)) | |
| 87 | #define EVALFIT_RDREG5 (EVALFIT_REGBASE_OFFSET + (4*5)) | |
| 88 | #define EVALFIT_RDREG6 (EVALFIT_REGBASE_OFFSET + (4*6)) | |
| 89 | #define EVALFIT_RDREG7 (EVALFIT_REGBASE_OFFSET + (4*7)) | |
| 90 | ||
| 91 | /** MEMORY **/ | |
| 92 | #define EVALFIT_MEMOFFSET 0x1000 | |
| 93 | #define EVALFIT_OBJOFFSET EVALFIT_MEMOFFSET + (0x40 * 8) | |
| 94 | ||
| 95 | /** CROMOSOMA **/ | |
| 96 | #define CROMO_NIVEL_OFFSET | |
| 97 | ||
| Examples/ehw4/src/sintesishw_client.c | ||
|---|---|---|
| 1 | /********************************************************************************************************* | |
| 2 | ** Programa para probar la sintesis combinacional mediante programacion genetica, | |
| 3 | ** se usan sockets para repartir carga de trabajo a otros clientes | |
| 4 | ** Se usa periferico evalfit del proyecto ehw3 | |
| 5 | ** se aceleran 5 arboles, que en el presente codigo se llama pentarbol | |
| 6 | ** compilar con math.h -lm | |
| 7 | ** compilar con threads: -lpthread | |
| 8 | ** gcc sintesishw_client.c -lm -lpthread -o sintesishw_client_ppc | |
| 9 | ** ejecutar: | |
| 10 | ** ./sintesishw_client_386 vars poblacion generaciones pentarboles sar.dat sar2.dat | |
| 11 | ** | |
| 12 | **********************************************************************************************************/ | |
| 13 | ||
| 14 | #include <stdio.h> | |
| 15 | #include <termios.h> | |
| 16 | #include <sys/mman.h> | |
| 17 | #include <stdlib.h> | |
| 18 | #include <sys/types.h> | |
| 19 | #include <sys/stat.h> | |
| 20 | #include <fcntl.h> | |
| 21 | #include <time.h> | |
| 22 | #include <math.h> | |
| 23 | #include <pthread.h> | |
| 24 | #include <stdio.h> | |
| 25 | #include <sys/socket.h> | |
| 26 | #include <netinet/in.h> | |
| 27 | #include <netdb.h> | |
| 28 | #include <errno.h> | |
| 29 | #include <sys/un.h> | |
| 30 | #include <sintesishw_client.h> | |
| 31 | ||
| 32 | /************************************************************************************************************************************** | |
| 33 | */ | |
| 34 | create_connect_socket(char *addr, int *fd_ap) | |
| 35 | { | |
| 36 | int fd; | |
| 37 | struct sockaddr_in input_addr; | |
| 38 | struct sockaddr_in server; | |
| 39 | if (inet_aton(addr, &input_addr.sin_addr)==-1) | |
| 40 | { perror("inet_aton"); | |
| 41 | exit(-1); | |
| 42 | } | |
| 43 | ||
| 44 | if ((fd=socket(AF_INET, SOCK_STREAM, 0))==-1){ | |
| 45 | printf("socket() error\n"); | |
| 46 | exit(-1); | |
| 47 | } | |
| 48 | ||
| 49 | server.sin_family = AF_INET; | |
| 50 | server.sin_port = htons(PORT); | |
| 51 | server.sin_addr = input_addr.sin_addr; | |
| 52 | bzero(&(server.sin_zero),8); | |
| 53 | ||
| 54 | if(connect(fd, (struct sockaddr *)&server, sizeof(struct sockaddr))==-1) | |
| 55 | { | |
| 56 | // printf("connect() error en %s\n",addr); | |
| 57 | perror("connect"); | |
| 58 | exit(-1); | |
| 59 | } | |
| 60 | /* printf(".");*/ | |
| 61 | *fd_ap = fd; | |
| 62 | } | |
| 63 | ||
| 64 | ||
| 65 | rx_cromo(int fd, void *data_socket_rx_ap, char *cromo_sal, int *fitness, int pentarboles, int *generacion, int *tiempo, int *aux_sal) | |
| 66 | { | |
| 67 | void *ap1; | |
| 68 | int i, j, numbytes_rx; | |
| 69 | int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; | |
| 70 | int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4}; | |
| 71 | int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1}; | |
| 72 | int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0}; | |
| 73 | ||
| 74 | ||
| 75 | if ((numbytes_rx=recv(fd,data_socket_rx_ap,MAXDATASIZE,0)) == -1){ | |
| 76 | printf("Error en recv() \n"); | |
| 77 | perror("recv"); | |
| 78 | exit(-1); | |
| 79 | } | |
| 80 | ap1 = data_socket_rx_ap; | |
| 81 | /* printf("Rx:%i ",ntohl(*(int *)ap1));*/ | |
| 82 | ap1 = ap1 + 4; | |
| 83 | for(i=0; i < RESULTADOS ;i++) | |
| 84 | { | |
| 85 | for(j=0; j < LONG_INDIV ;j++) | |
| 86 | { | |
| 87 | *(cromo_sal + j + (LONG_INDIV*i)) = *(char *)ap1; | |
| 88 | ap1 ++; | |
| 89 | } | |
| 90 | *(fitness + i) = ntohl(*(int *)ap1) & 0xFFFF; | |
| 91 | *(generacion + i) = ntohl(*(int *)ap1) >> 16; | |
| 92 | ap1 = ap1 + 4; | |
| 93 | *(tiempo+i) = ntohl(*(int *)ap1); | |
| 94 | ap1 = ap1 + 4; | |
| 95 | } | |
| 96 | for(i = 0; i < maxgeneraciones*2 ;i++) | |
| 97 | { | |
| 98 | *(aux_sal + i) = ntohl(*(int *)ap1); | |
| 99 | ap1 = ap1 + 4; | |
| 100 | } | |
| 101 | } | |
| 102 | ||
| 103 | tx_cromo(struct gen_datos_tipo *gen_datos, int fd) | |
| 104 | { | |
| 105 | void *data_socket_tx_ap, *ap1; | |
| 106 | int *objetivo, i, numbytes_tx; | |
| 107 | ||
| 108 | data_socket_tx_ap = malloc((gen_datos->tamaobj)*sizeof(int) + gen_datos->tamacrom + 0xFF); | |
| 109 | ap1= data_socket_tx_ap; | |
| 110 | ||
| 111 | *(int *)ap1 = htonl(gen_datos->tamaobj | (maxgeneraciones << 16)); | |
| 112 | ap1 = ap1 + 4; | |
| 113 | objetivo = gen_datos->objetivo; | |
| 114 | for(i=0; i < (gen_datos->tamaobj); i++) | |
| 115 | { | |
| 116 | *(int *)ap1 = htonl(objetivo[i]); | |
| 117 | ap1 = ap1 + 4; | |
| 118 | } | |
| 119 | *(int *)ap1 = htonl(gen_datos->pentarboles | (gen_datos->vars << 16)); | |
| 120 | ap1 = ap1 + 4; | |
| 121 | *(int *)ap1 = htonl(gen_datos->tamacrom | (poblacion << 16)); | |
| 122 | ap1 = ap1 + 4; | |
| 123 | ||
| 124 | for(i = 0; i < (gen_datos->tamacrom); i++) | |
| 125 | { | |
| 126 | *(char *)(ap1) = *(char *)(gen_datos->cromo_entrada + i); | |
| 127 | ap1 = ap1 + 1; | |
| 128 | } | |
| 129 | ||
| 130 | *(int *)ap1 = htonl(gen_datos->fitness_entrada); //fitness de entrada? | |
| 131 | ap1 = ap1 + 4; | |
| 132 | *(int *)ap1 = htonl((gen_datos->en_cromo_entrada<<16) | gen_datos->nivel_max); | |
| 133 | ap1 = ap1 + 4; | |
| 134 | *(int *)ap1 = htonl(gen_datos->aux); //datos varios | |
| 135 | ap1 = ap1 + 4; | |
| 136 | *(int *)ap1 = htonl(0xa55a9669); //datos varios | |
| 137 | ap1 = ap1 + 4; | |
| 138 | numbytes_tx = ap1 - data_socket_tx_ap; | |
| 139 | send(fd, data_socket_tx_ap, numbytes_tx ,0); //enviar | |
| 140 | free(data_socket_tx_ap); | |
| 141 | ||
| 142 | } | |
| 143 | ||
| 144 | ||
| 145 | ||
| 146 | /************************************************************************************************************************************** | |
| 147 | crea una poblacion, y envia a placas para evolucionar */ | |
| 148 | iniciar_evol(struct gen_datos_tipo *gen_datos) | |
| 149 | { | |
| 150 | int *generacion, k, a, i, j = 0, vars; | |
| 151 | int conta=0, aux1, aux2, *fitness, *fitness2, *entrada, *objetivo, tamaobj, pentarboles, maxgens, *fitness_sal, fitness_entrada, nivel_max, *aux_sal; | |
| 152 | char o, *ap, *cromo, *ordenpoblacion, *cromo_sal, *cromo_entrada; | |
| 153 | int *tiempo; | |
| 154 | int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; | |
| 155 | int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4}; | |
| 156 | int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1}; | |
| 157 | int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0}; | |
| 158 | ||
| 159 | /* variables para sockets */ | |
| 160 | int fds[8],fd1, fd2, fd3, fd4, fd5, fd6, fd7, fd8, numbytes_tx, numbytes_rx; /* ficheros descriptores para sockets*/ | |
| 161 | void *data_socket_rx_ap; | |
| 162 | char server[][16] = {IP0, IP1, IP2, IP3, IP4, IP5, IP6, IP7}; | |
| 163 | ||
| 164 | pentarboles = gen_datos->pentarboles; | |
| 165 | vars = gen_datos->vars; | |
| 166 | generacion = gen_datos->generacion; | |
| 167 | tiempo = gen_datos->tiempo; | |
| 168 | aux_sal = gen_datos->aux_sal; | |
| 169 | ||
| 170 | cromo = malloc(sizeof(cromo) * (poblacion + 2) * LONG_INDIV); if(cromo==0) printf("Error en malloc"); | |
| 171 | fitness = malloc(sizeof(fitness) * (poblacion+1)); if(fitness==0) printf("Error en malloc"); | |
| 172 | fitness2 = malloc(sizeof(fitness2) * (poblacion+1)); if(fitness2==0) printf("Error en malloc"); | |
| 173 | ordenpoblacion = malloc(sizeof(ordenpoblacion) * (poblacion+1)); if(ordenpoblacion==0) printf("Error en malloc"); | |
| 174 | ||
| 175 | for(i=0; i < nodos; i++) //enviar a nodos | |
| 176 | { | |
| 177 | create_connect_socket(server[i], &fds[i]); | |
| 178 | } | |
| 179 | ||
| 180 | /* preparar socket para recibir */ | |
| 181 | data_socket_rx_ap = malloc(10000); | |
| 182 | ||
| 183 | if(PAR_ONLYFIT==1) | |
| 184 | { | |
| 185 | gen_poblacion(cromo, pentarboles, vars); | |
| 186 | ||
| 187 | // cruzar | |
| 188 | for(i = ((poblacion*1)/8); i < ((poblacion*2)/8); i=i+4) //salvar los primeros 4 y cruzar | |
| 189 | { | |
| 190 | cross2point(cromo+i*LONG_INDIV, cromo + i*LONG_INDIV, cromo+((i)*LONG_INDIV), cromo+((i+1)*LONG_INDIV), pentarboles); | |
| 191 | cross2point(cromo+i*LONG_INDIV, cromo + i*LONG_INDIV, cromo+((i+2)*LONG_INDIV), cromo+((i+3)*LONG_INDIV), pentarboles); | |
| 192 | }//cruzar | |
| 193 | ||
| 194 | // Mutacion | |
| 195 | for(i = ((poblacion*2)/8); i < ((poblacion*3)/8); i++) | |
| 196 | { | |
| 197 | muta_indiv(cromo + i*LONG_INDIV, cromo + ((( i )) * LONG_INDIV), pentarboles, vars); | |
| 198 | } | |
| 199 | for(i = ((poblacion*3)/8); i < ((poblacion*4)/8); i++) | |
| 200 | { | |
| 201 | muta_indiv(cromo + i*LONG_INDIV, cromo + ((( i )) * LONG_INDIV), pentarboles, vars); | |
| 202 | } | |
| 203 | ||
| 204 | //crear nuevos indiv reemplazar por taras | |
| 205 | for(i = ((poblacion*4)/8); i < poblacion; i++) | |
| 206 | { | |
| 207 | gen_indiv((cromo + ((( i)) * LONG_INDIV)), pentarboles, vars); | |
| 208 | } | |
| 209 | ||
| 210 | *generacion++; | |
| 211 | } | |
| 212 | ||
| 213 | gen_datos->tamacrom = LONG_INDIV; | |
| 214 | ||
| 215 | for(j=0;j<1;j++) | |
| 216 | { | |
| 217 | for(i=0; i<nodos;i++) //enviar a nodos | |
| 218 | { | |
| 219 | tx_cromo(gen_datos, fds[i]); | |
| 220 | } | |
| 221 | ||
| 222 | cromo_sal = gen_datos->cromo_sal; | |
| 223 | ||
| 224 | for(i=0; i<nodos;i++) //recoger fitness o cromosomas resultantes | |
| 225 | { | |
| 226 | rx_cromo(fds[i], data_socket_rx_ap, cromo_sal+(LONG_INDIV*RESULTADOS*i), gen_datos->fitness+(RESULTADOS*i), pentarboles,generacion + (RESULTADOS*i),tiempo+(RESULTADOS*i), aux_sal+(maxgeneraciones*2*i)); | |
| 227 | } | |
| 228 | ||
| 229 | } | |
| 230 | ||
| 231 | free(cromo); | |
| 232 | free(fitness); | |
| 233 | free(fitness2); | |
| 234 | free(ordenpoblacion); | |
| 235 | free(data_socket_rx_ap); | |
| 236 | for(i=0; i<nodos;i++) close(fds[i]); | |
| 237 | } | |
| 238 | ||
| 239 | ||
| 240 | /*******************************************************************************************************************************/ | |
| 241 | /*******************************************************************************************************************************/ | |
| 242 | /*******************************************************************************************************************************/ | |
| 243 | /*******************************************************************************************************************************/ | |
| 244 | ||
| 245 | int main( int argc, char** argv ) | |
| 246 | { | |
| 247 | int *generacion, k, a, b, z, i, j= 0, error, nivel_max, vars, *tiempo, poblacion_total, m, p, iteraciones, T; | |
| 248 | int conta=0, aux1, aux2, pentarboles, *fitness1, *fitness2, *entrada, *orderesult, aux, *aux_sal; | |
| 249 | char o, *ap, *valor_devuelto;; | |
| 250 | char *cromo_sal1, *cromo_sal2, *cromo_entrada; | |
| 251 | int tamaobj, objetivo[8192], obj_combs;//= {0,254,123,16,87,56,34,76,89,155,199}; | |
| 252 | long int tiempo1, tiempo2; | |
| 253 | float tiempof, tiempof2, Tfloat, float1, float2; | |
| 254 | ||
| 255 | int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; | |
| 256 | int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4}; | |
| 257 | int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1}; | |
| 258 | int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0}; | |
| 259 | ||
| 260 | /* Estructuras para datos de cromosomas*/ | |
| 261 | struct gen_datos_tipo data_struct1, data_struct2; | |
| 262 | struct gen_datos_tipo *data_struct_ap1, *data_struct_ap2; | |
| 263 | data_struct_ap1 = &data_struct1; | |
| 264 | data_struct_ap2 = &data_struct2; | |
| 265 | ||
| 266 | /* Variables para tablas de lut*/ | |
| 267 | FILE *f1; | |
| 268 | int size1; | |
| 269 | srand ( (time(NULL)) ); | |
| 270 | ||
| 271 | /* Variables para almacenar datos para graficar*/ | |
| 272 | int *datos, *datos2, x, media=4, puntos; | |
| 273 | FILE *fich, *fich2; | |
| 274 | ||
| 275 | char output_file_name[128], output_file_fitness_name[128]; | |
| 276 | sscanf(argv[1], "%i",&vars); | |
| 277 | sscanf(argv[2], "%i", &poblacion_total); | |
| 278 | sscanf(argv[3], "%i", &maxgeneraciones); | |
| 279 | sscanf(argv[4], "%i", &nodos); | |
| 280 | sscanf(argv[5], "%s", output_file_name); | |
| 281 | sscanf(argv[6], "%s", output_file_fitness_name); | |
| 282 | // printf("\nvars: %i indivs:%i generations:%i nodos:%i ", vars, poblacion_total, maxgeneraciones, nodos); | |
| 283 | fflush(stdout); | |
| 284 | ||
| 285 | pentarboles = 1; //MODIFIQUE NIVEL_MAX | |
| 286 | nivel_max = 2; | |
| 287 | poblacion = poblacion_total/nodos; | |
| 288 | m = 1; //datos a migrar | |
| 289 | p = 8; //frecuencia de migracion | |
| 290 | T = 4; //temperatura para crear nuevos indiv. A mayor T menor temperatura | |
| 291 | i=0; | |
| 292 | tamaobj=0; | |
| 293 | aux = (T << 16) | p; | |
| 294 | iteraciones = maxgeneraciones/p; | |
| 295 | maxgeneraciones = p; | |
| 296 | ||
| 297 | obj_combs = pow(2, (vars/2)); | |
| 298 | ||
| 299 | /*Armar funcion objetivo comparador*/ /* OJO, SE ESTÁN METIENDO VALORES DE 1EXX EN LAS LUT Y ESOS INDIVIDUOS AL PARECER QUEDAN MAL */ | |
| 300 | for(a=0; a < obj_combs ;a++) | |
| 301 | { | |
| 302 | for(b=0; b < obj_combs ;b++) | |
| 303 | { | |
| 304 | if(a > b)z=1; if(a < b)z=2; if(a == b)z=4; | |
| 305 | if((z & 0x4) != 0 ) | |
| 306 | { | |
| 307 | objetivo[tamaobj] = i; | |
| 308 | printf("%i ",objetivo[tamaobj]); | |
| 309 | tamaobj++; | |
| 310 | } | |
| 311 | i++; | |
| 312 | } | |
| 313 | } | |
| 314 | // printf("Tama:%i ",tamaobj); | |
| 315 | ||
| 316 | /* Tabla para las LUT*/ | |
| 317 | f1 = fopen("funlut.dat","r"); | |
| 318 | if(f1 == NULL){ | |
| 319 | printf("\nError de lectura de archivo!"); | |
| 320 | return 0;} | |
| 321 | ||
| 322 | fseek (f1, 0, SEEK_END); | |
| 323 | size1 = ftell(f1); | |
| 324 | funlut_ap = malloc(size1); if(funlut_ap==0) printf("Error en malloc"); | |
| 325 | rewind (f1); | |
| 326 | fread(funlut_ap,1,size1,f1); | |
| 327 | fclose(f1); | |
| 328 | ||
| 329 | puntos = 16; /*numero de puntos para la grafica*/ | |
| 330 | datos = malloc(sizeof(datos)*puntos*3); if(datos==0) printf("Error en malloc"); | |
| 331 | fich=fopen(output_file_name,"wb"); | |
| 332 | datos2 = malloc(sizeof(datos2) * maxgeneraciones * p * nodos); if(datos2==0) printf("Error en malloc"); | |
| 333 | fich2=fopen(output_file_fitness_name,"wb"); | |
| 334 | ||
| 335 | cromo_sal1 = malloc(sizeof(cromo_sal1) * RESULTADOS * LONG_INDIV * nodos); if(cromo_sal1==0) printf("Error en malloc"); | |
| 336 | fitness1 = malloc(sizeof(fitness1) * RESULTADOS * nodos); if(fitness1==0) printf("Error en malloc"); | |
| 337 | cromo_sal2 = malloc(sizeof(cromo_sal2) * RESULTADOS * LONG_INDIV * nodos); if(cromo_sal2==0) printf("Error en malloc"); | |
| 338 | fitness2 = malloc(sizeof(fitness2) * RESULTADOS * nodos); if(fitness2==0) printf("Error en malloc"); | |
| 339 | cromo_sal2 = malloc(sizeof(cromo_sal2) * RESULTADOS * LONG_INDIV * nodos); if(cromo_sal2==0) printf("Error en malloc"); | |
| 340 | generacion = malloc(sizeof(generacion)* RESULTADOS * nodos); if(generacion==0) printf("Error en malloc"); | |
| 341 | tiempo = malloc(sizeof(tiempo)* RESULTADOS * nodos); if(tiempo==0) printf("Error en malloc"); | |
| 342 | cromo_entrada = malloc(sizeof(cromo_entrada)* LONG_INDIV * m); if(cromo_entrada==0) printf("Error en malloc"); | |
| 343 | orderesult = malloc(sizeof(orderesult) * nodos*RESULTADOS); if(orderesult==0) printf("Error en malloc"); | |
| 344 | aux_sal = malloc(sizeof(aux_sal) * nodos * maxgeneraciones * 2); if(aux_sal==0) printf("Error en malloc"); | |
| 345 | ||
| 346 | data_struct_ap1->objetivo = objetivo; | |
| 347 | data_struct_ap1->tamaobj = tamaobj; | |
| 348 | data_struct_ap1->pentarboles = pentarboles; | |
| 349 | data_struct_ap1->maxgen = maxgeneraciones; | |
| 350 | data_struct_ap1->cromo_sal = cromo_sal1; | |
| 351 | data_struct_ap1->fitness = fitness1; | |
| 352 | data_struct_ap1->cromo_entrada = cromo_entrada; | |
| 353 | data_struct_ap1->fitness_entrada = 0; | |
| 354 | data_struct_ap1->nivel_max = nivel_max; | |
| 355 | data_struct_ap1->vars= vars; | |
| 356 | data_struct_ap1->en_cromo_entrada = 0; | |
| 357 | data_struct_ap1->generacion = generacion; | |
| 358 | data_struct_ap1->tiempo = tiempo; | |
| 359 | data_struct_ap1->aux = aux; | |
| 360 | data_struct_ap1->aux_sal = aux_sal; | |
| 361 | ||
| 362 | /* printf("\npentarboles:%i nivel_max%i ", pentarboles ,nivel_max);*/ | |
| 363 | /* fflush(stdout); */ | |
| 364 | ||
| 365 | /* Iniciar evolucion */ | |
| 366 | ||
| 367 | x = 0; | |
| 368 | fflush(stdout); | |
| 369 | for(k = 0; k < iteraciones ; k++) | |
| 370 | { | |
| 371 | tiempo1 = get_timestamp(); | |
| 372 | iniciar_evol(data_struct_ap1); | |
| 373 | tiempo2 = get_timestamp(); | |
| 374 | *tiempo = tiempo2 - tiempo1; | |
| 375 | tiempof2 = *tiempo; | |
| 376 | tiempof = tiempof2/(1000000); | |
| 377 | // printf("\n%i %i %i %5f",nodos, vars, poblacion_total, tiempof); | |
| 378 | fprintf(fich, "\n%i %i %i %5f",nodos, vars, poblacion_total, tiempof); | |
| 379 | ||
| 380 | for(i = 0; i < nodos*RESULTADOS; i++) //Organizar lo q llego, ¡solo se indexa orderesult, que dice en q orden estan los cromosomas! | |
| 381 | { | |
| 382 | *(orderesult + i) = i; //se inicializa el stream para el orden | |
| 383 | } | |
| 384 | ||
| 385 | for(i=0; i< nodos*RESULTADOS; i++) | |
| 386 | { | |
| 387 | for(j=i+1; j< nodos*RESULTADOS; j++) | |
| 388 | { | |
| 389 | if(*(fitness1 + j) < *(fitness1 + i)) | |
| 390 | { | |
| 391 | aux1 = *(orderesult + i); | |
| 392 | *(orderesult + i) = *(orderesult + j); | |
| 393 | aux2 = *(fitness1 + i); | |
| 394 | *(fitness1 + i) = *(fitness1 + j); | |
| 395 | *(orderesult + j) = aux1; | |
| 396 | *(fitness1 + j) = aux2; | |
| 397 | aux1 = *(generacion + i); | |
| 398 | *(generacion + i) = *(generacion + j); | |
| 399 | *(generacion + j) = aux1; | |
| 400 | } | |
| 401 | } | |
| 402 | } | |
| 403 | ||
| 404 | for(i = 0; i < maxgeneraciones; i=i+maxgeneraciones) //revisar mediciones | |
| 405 | { | |
| 406 | aux1 = 0; | |
| 407 | aux2 = 0; | |
| 408 | for(j = 0; j < nodos; j++) | |
| 409 | { | |
| 410 | aux1 = aux1 + *(aux_sal + (maxgeneraciones * 2 * j) + i); | |
| 411 | aux2 = aux2 + *(aux_sal + (maxgeneraciones * 2 * j) + maxgeneraciones + i); | |
| 412 | } | |
| 413 | aux1 = aux1 / nodos; | |
| 414 | aux2 = aux2 / nodos; | |
| 415 | if((x&(((iteraciones*p)/puntos)-1)) == 0x0) | |
| 416 | fprintf(fich2, "%i %i %i\n",(k*p)+i, aux1, aux2); | |
| 417 | ||
| 418 | // printf("%i %i %i %i\n",(k*p)+i, aux1, aux2, T); | |
| 419 | } | |
| 420 | ||
| 421 | for(i = 0; i < LONG_INDIV; i++ ) | |
| 422 | { | |
| 423 | *(char *)(cromo_entrada + i) = *(char *)(cromo_sal1 + (*(orderesult)*LONG_INDIV) + i); | |
| 424 | } | |
| 425 | data_struct_ap1->en_cromo_entrada = 1; | |
| 426 | x = x + p; | |
| 427 | float1 = k; | |
| 428 | float2 = iteraciones; | |
| 429 | Tfloat = (float1/float2)*4; | |
| 430 | T = 1 + (int)Tfloat; | |
| 431 | aux = (T << 16) | p; | |
| 432 | data_struct_ap1->aux = aux; | |
| 433 | } | |
| 434 | ||
| 435 | for(i=0; i < RESULTADOS-1 ;i++) | |
| 436 | { | |
| 437 | printf("\nfit%i:%i gnrcn:%i ", i, *(fitness1), *(generacion + *(orderesult + i))); | |
| 438 | mostrar_indiv(cromo_sal1 + ( *orderesult * LONG_INDIV ), pentarboles, vars); | |
| 439 | } | |
| 440 | ||
| 441 | x++; | |
| 442 | ||
| 443 | free(cromo_sal1); | |
| 444 | free(fitness1); | |
| 445 | free(cromo_sal2); | |
| 446 | free(fitness2); | |
| 447 | free(cromo_entrada); | |
| 448 | free(orderesult); | |
| 449 | free(generacion); | |
| 450 | free(tiempo); | |
| 451 | free(aux_sal); | |
| 452 | ||
| 453 | fclose(fich); | |
| 454 | fclose(fich2); | |
| 455 | ||
| 456 | free(datos); | |
| 457 | free(datos2); | |
| 458 | free(funlut_ap); | |
| 459 | ||
| 460 | return 0; | |
| 461 | } | |
| Examples/ehw4/src/sintesishw_client.h | ||
|---|---|---|
| 1 | ||
| 2 | /** Genetic definitions **/ | |
| 3 | #define PAR_ONLYFIT 0 //paralelizacion, 0 ALGORITMO ENTERO, 1 SOLO FITNESS | |
| 4 | ||
| 5 | #define RESULTADOS 2 | |
| 6 | ||
| 7 | /* Numero de generaciones en el que se amplia la logitud del cromosoma*/ | |
| 8 | ||
| 9 | #define ARBOLES 5 | |
| 10 | #define LONG_ARBOL 8 | |
| 11 | ||
| 12 | #define nivel1 pentarboles * 4 | |
| 13 | #define ARBOLES_INDIV (int)(nivel1 + *(nivel2+pentarboles) + *(nivel3+pentarboles) + *(nivel4+pentarboles) + *(nivel5+pentarboles)) | |
| 14 | #define LONG_INDIV (int)(ARBOLES_INDIV * LONG_ARBOL) | |
| 15 | ||
| 16 | //sockets defs | |
| 17 | #define PORT 3550 /* El puerto que sera abierto */ | |
| 18 | #define BACKLOG 2 /* El numero de conexiones permitidas */ | |
| 19 | #define MAXDATASIZE 10000 /* El numero maximo de datos en bytes */ | |
| 20 | #define IP0 "192.168.0.4" | |
| 21 | #define IP1 "192.168.0.6" | |
| 22 | #define IP2 "192.168.0.7" | |
| 23 | #define IP3 "192.168.0.8" | |
| 24 | #define IP4 "192.168.0.9" | |
| 25 | #define IP5 "192.168.0.10" | |
| 26 | #define IP6 "192.168.0.11" | |
| 27 | #define IP7 "192.168.0.12" | |
| 28 | ||
| 29 | //#define IP0 "193.147.52.150" | |
| 30 | //#define IP1 "193.147.52.139" | |
| 31 | ||
| 32 | /* Variables globales */ | |
| 33 | char *funlut_ap, *puertas_ap; | |
| 34 | void *evalfit_ptr1, *evalfit_ptr4, *evalfit_ptr3, *evalfit_ptr2; | |
| 35 | int maxgeneraciones, poblacion, nodos; | |
| 36 | ||
| 37 | typedef long long timestamp_t; | |
| 38 | static timestamp_t | |
| 39 | get_timestamp () | |
| 40 | { | |
| 41 | struct timeval now; | |
| 42 | gettimeofday (&now, NULL); | |
| 43 | return now.tv_usec + (timestamp_t)now.tv_sec *1000000 ; | |
| 44 | } | |
| 45 | ||
| 46 | struct gen_datos_tipo | |
| 47 | { | |
| 48 | int *objetivo; | |
| 49 | int tamaobj; | |
| 50 | int pentarboles; | |
| 51 | int vars; | |
| 52 | int tamacrom; | |
| 53 | int maxgen; | |
| 54 | char *cromo_sal; | |
| 55 | int *fitness; | |
| 56 | char *cromo_entrada; | |
| 57 | int fitness_entrada; | |
| 58 | int nivel_max; | |
| 59 | int en_cromo_entrada; | |
| 60 | int *generacion; | |
| 61 | int *tiempo; | |
| 62 | int aux; | |
| 63 | int *aux_sal; | |
| 64 | }; | |
| Examples/ehw4/src/sintesishw_server.c | ||
|---|---|---|
| 1 | /********************************************************************************************************* | |
| 2 | ** Programa para probar la sintesis combinacional mediante programacion genetica, | |
| 3 | ** se usan sockets para repartir carga de trabajo a otros clientes | |
| 4 | ** Se usa periferico evalfit del proyecto ehw3 | |
| 5 | ** se aceleran 5 arboles, que en el presente codigo se llama pentarbol | |
| 6 | ** compilar con math.h -lm | |
| 7 | ** compilar con threads: -lpthread | |
| 8 | ** powerpc-405-linux-gnu-gcc sintesishw_server.c -lm -lpthread -o sintesishw_server_ppc | |
| 9 | ** | |
| 10 | ** | |
| 11 | **********************************************************************************************************/ | |
| 12 | ||
| 13 | #include <stdio.h> | |
| 14 | #include <termios.h> | |
| 15 | #include <sys/mman.h> | |
| 16 | #include <stdlib.h> | |
| 17 | #include <sys/types.h> | |
| 18 | #include <sys/stat.h> | |
| 19 | #include <fcntl.h> | |
| 20 | #include <time.h> | |
| 21 | #include <math.h> | |
| 22 | #include <pthread.h> | |
| 23 | #include <stdio.h> | |
| 24 | #include <sys/socket.h> | |
| 25 | #include <netinet/in.h> | |
| 26 | #include <netdb.h> | |
| 27 | #include <errno.h> | |
| 28 | #include <sys/un.h> | |
| 29 | #include <sintesishw_server.h> | |
| 30 | ||
| 31 | /************************************************************************************************************************************** | |
| 32 | crea socket */ | |
| 33 | int crear_socket() | |
| 34 | { | |
| 35 | int fd; | |
| 36 | struct sockaddr_in server; | |
| 37 | ||
| 38 | if ((fd=socket(AF_INET, SOCK_STREAM, 0)) == -1 ) /* Crear socket */ | |
| 39 | { | |
| 40 | perror("socket"); | |
| 41 | exit(-1); | |
| 42 | } | |
| 43 | server.sin_family = AF_INET; | |
| 44 | server.sin_port = htons(PORT); /* cambiar endianismo */ | |
| 45 | server.sin_addr.s_addr = INADDR_ANY; /* INADDR_ANY coloca nuestra direccion IP */ | |
| 46 | bzero(&(server.sin_zero),8); /* escribimos ceros en el resto de la estructura */ | |
| 47 | if (setsockopt(fd,SOL_SOCKET,SO_REUSEADDR,&server,sizeof(struct sockaddr)) == -1) /* permite reutilizar el puerto */ | |
| 48 | { | |
| 49 | perror("setsockopt"); | |
| 50 | exit(1); | |
| 51 | } | |
| 52 | if(bind(fd,(struct sockaddr*) & server, sizeof(struct sockaddr))==-1) //se asigna el socket | |
| 53 | { | |
| 54 | perror("bind"); | |
| 55 | exit(EXIT_FAILURE); | |
| 56 | } | |
| 57 | return fd; | |
| 58 | } | |
| 59 | ||
| 60 | ||
| 61 | /*******************************************************************************************************************************/ | |
| 62 | /*******************************************************************************************************************************/ | |
| 63 | /*******************************************************************************************************************************/ | |
| 64 | /*******************************************************************************************************************************/ | |
| 65 | ||
| 66 | int main() | |
| 67 | { | |
| 68 | int k, a, i, j = 0, error, vars = 4, *tiempo; | |
| 69 | int conta=0, aux1, aux2, pentarboles, *fitness1, *fitness2, *entrada, *generacion, aux, *aux_sal; | |
| 70 | char o, *ap, *valor_devuelto;; | |
| 71 | char *cromo_sal1, *cromo_sal2, *cromo_entrada, *cromo_ap_aux; | |
| 72 | int objetivo[8192];//= {0,254,123,16,87,56,34,76,89,155,199}; | |
| 73 | struct gen_datos_tipo data_struct1, data_struct2; | |
| 74 | struct gen_datos_tipo *data_struct_ap1, *data_struct_ap2; | |
| 75 | ||
| 76 | int nivel2[]={0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; | |
| 77 | int nivel3[]={0,0,1,1,1,2,2,2,2,3,3, 3, 3, 4, 4, 4}; | |
| 78 | int nivel4[]={0,0,0,0,0,1,1,1,1,1,1, 1, 1, 1, 1, 1}; | |
| 79 | int nivel5[]={0,0,0,0,0,0,0,0,0,0,0, 0, 0, 0, 0, 0}; | |
| 80 | ||
| 81 | /* Variables para tablas de lut*/ | |
| 82 | FILE *f1, *f2; | |
| 83 | int size1, size2; | |
| 84 | ||
| 85 | /* Variables para los sockets */ | |
| 86 | int fd, fd2, numbytes; /* punteros para sockets */ | |
| 87 | struct sockaddr_in server; | |
| 88 | struct sockaddr_in client; | |
| 89 | void *data_socket_rx_ap, *data_socket_tx_ap, *ap1; | |
| 90 | int sin_size; | |
| 91 | ||
| 92 | /*para periferico*/ | |
| 93 | int basemem; | |
| 94 | ||
| 95 | srand ( (time(NULL)) ); | |
| 96 | ||
| 97 | /* Tabla para las LUT*/ | |
| 98 | f1 = fopen("funlut.dat","r"); | |
| 99 | if(f1 == NULL){ printf("\nError de lectura de archivo!");return 0;} | |
| 100 | fseek (f1, 0, SEEK_END); | |
| 101 | size1 = ftell(f1); | |
| 102 | funlut_ap = malloc(size1); if(funlut_ap==0) printf("Error en malloc"); | |
| 103 | rewind (f1); | |
| 104 | fread(funlut_ap,1,size1,f1); | |
| 105 | fclose(f1); | |
| 106 | ||
| 107 | f2 = fopen("puertas.dat","r"); | |
| 108 | if(f2 == NULL){ printf("\nError de lectura de archivo!");return 0;} | |
| 109 | fseek (f2, 0, SEEK_END); | |
| 110 | size2 = ftell(f2); | |
| 111 | puertas_ap = malloc(size2); if(puertas_ap==0) printf("Error en malloc"); | |
| 112 | rewind (f2); | |
| 113 | fread(puertas_ap,1,size2,f2); | |
| 114 | fclose(f2); | |
| 115 | ||
| 116 | basemem = open("/dev/mem", (O_RDWR | O_SYNC)); //abrir dispositivo memoria para mapear dir del periferico | |
| 117 | if(basemem == -1) | |
| 118 | { printf("Error al abrir /dev/mem \n"); | |
| 119 | return -1;} | |
| 120 | ||
| 121 | /** iniciar periferico **/ | |
| 122 | if(HW_ENABLE == 1){ | |
| 123 | evalfit_ptr1 = (int *)init_peripheral(EVALFIT_PHYSBASE1, basemem); | |
| 124 | evalfit_ptr2 = (int *)init_peripheral(EVALFIT_PHYSBASE2, basemem); | |
| 125 | evalfit_ptr3 = (int *)init_peripheral(EVALFIT_PHYSBASE3, basemem); | |
| 126 | evalfit_ptr4 = (int *)init_peripheral(EVALFIT_PHYSBASE4, basemem); | |
| 127 | } | |
| 128 | data_struct_ap1 = &data_struct1; | |
| 129 | data_struct_ap2 = &data_struct2; | |
| 130 | ||
| 131 | /* preparar socket para recibir */ | |
| 132 | data_socket_rx_ap = malloc(100000); | |
| 133 | data_socket_tx_ap = malloc(100000); | |
| 134 | fd = crear_socket(); | |
| 135 | if(listen(fd, BACKLOG) == -1) | |
| 136 | { printf("error en listen()\n"); | |
| 137 | exit(-1); | |
| 138 | } | |
| 139 | ||
| 140 | //int err, sndsize=8192; | |
| 141 | //err = setsockopt(fd2, SOL_SOCKET, SO_RCVBUF, (char *)&sndsize, (int)sizeof(sndsize)); | |
| 142 | ||
| 143 | while(1) | |
| 144 | { | |
| 145 | sin_size=sizeof(struct sockaddr_in); | |
| 146 | if ((fd2 = accept(fd,(struct sockaddr *)&client, &sin_size))==-1) /* llamada a accept() */ | |
| 147 | { | |
| 148 | printf("error en accept()\n"); | |
| 149 | exit(-1); | |
| 150 | } | |
| 151 | /* printf("Se obtuvo una conexion desde %s\n", inet_ntoa(client.sin_addr) ); //mostrara la IP del cliente QUITAR PARA GANAR VELOCIDAD*/ | |
| 152 | ||
| 153 | numbytes=0; | |
| 154 | do | |
| 155 | { | |
| 156 | if ((aux1=recv(fd2,data_socket_rx_ap+numbytes,8192,0)) == -1){ /* recibir datos del cliente*/ | |
| 157 | perror("recv"); | |
| 158 | printf("Error en recv() \n"); | |
| 159 | exit(-1); | |
| 160 | } | |
| 161 | numbytes = numbytes+aux1; | |
| 162 | }while(*(int *)(data_socket_rx_ap+numbytes-4)!=htonl(0xa55a9669)); | |
| 163 | ||
| 164 | ap1 = data_socket_rx_ap; /* Cargar datos en la estructura para la evolucion */ | |
| 165 | data_struct_ap1->tamaobj = htonl(*(int *)ap1) & 0xFFFF; | |
| 166 | maxgeneraciones = htonl(*(int *)ap1) >> 16; | |
| 167 | // printf("\ntama obj:%0x maxgens:%i numbytes:%i-- ", data_struct_ap1->tamaobj, maxgeneraciones,numbytes); | |
| 168 | fflush(stdout); | |
| 169 | ap1 = ap1 + 4; | |
| 170 | for(i=0;i < (data_struct_ap1->tamaobj); i++) | |
| 171 | { | |
| 172 | objetivo[i] =htonl(*(int *)ap1); //XX | |
| 173 | // printf("obj:%i %i ",i,objetivo[i]); | |
| 174 | ap1 = ap1 + 4; | |
| 175 | } | |
| 176 | data_struct_ap1->objetivo = objetivo; | |
| 177 | data_struct_ap1->pentarboles = htonl(*(int *)ap1) & 0XFF; | |
| 178 | pentarboles = data_struct_ap1->pentarboles; | |
| 179 | vars = htonl(*(int *)ap1) >> 16; | |
| 180 | data_struct_ap1->vars = vars; | |
| 181 | ap1 = ap1 + 4; | |
| 182 | data_struct_ap1->tamacrom = htonl(*(int *)ap1) & 0xFFFF; | |
| 183 | poblacion = htonl(*(int *)ap1) >> 16; | |
| 184 | // printf("\ntamacrom:%0x poblacion:%i vars:%i pentarboles:%i maxgeneraciones:%i ", data_struct_ap1->tamacrom, poblacion,vars,pentarboles,maxgeneraciones); | |
| 185 | ap1 = ap1 + 4; | |
| 186 | cromo_entrada = malloc(sizeof(cromo_entrada) * RESULTADOS * LONG_INDIV); if(cromo_entrada==0) printf("Error en malloc"); | |
| 187 | data_struct_ap1->cromo_entrada = cromo_entrada; | |
| 188 | ||
| 189 | for(i = 0; i < (data_struct_ap1 -> tamacrom); i++) | |
| 190 | { | |
| 191 | *(char *)(cromo_entrada + i) = *(char *)ap1; | |
| 192 | ap1 = ap1 + 1; | |
| 193 | } | |
| 194 | ||
| 195 | data_struct_ap1->fitness_entrada = htonl(*(int *)ap1); | |
| 196 | ap1 = ap1 + 4; | |
| 197 | data_struct_ap1->nivel_max = htonl(*(int *)ap1) & 0xFFFF; | |
| 198 | data_struct_ap1->en_cromo_entrada = htonl(*(int *)ap1) >> 16; //han enviado un cromosoma? | |
| 199 | ap1 = ap1 + 4; | |
| 200 | data_struct_ap1->aux = htonl(*(int *)ap1); | |
| 201 | /* printf("\nnivel_max:%0x-- ", data_struct_ap1->nivel_max);*/ | |
| 202 | data_struct_ap1->maxgen = maxgeneraciones; | |
| 203 | ||
| 204 | cromo_sal1 = malloc(sizeof(cromo_sal1) * RESULTADOS * LONG_INDIV); if(cromo_sal1==0) printf("Error en malloc"); /* reservar para cromosomas */ | |
| 205 | fitness1 = malloc(sizeof(fitness1) * RESULTADOS); if(fitness1==0) printf("Error en malloc"); | |
| 206 | cromo_sal2 = malloc(sizeof(cromo_sal2) * RESULTADOS * LONG_INDIV); if(cromo_sal2==0) printf("Error en malloc"); | |
| 207 | fitness2 = malloc(sizeof(fitness2) * RESULTADOS); if(fitness2==0) printf("Error en malloc"); | |
| 208 | generacion = malloc(sizeof(generacion)); if(generacion==0) printf("Error en malloc"); | |
| 209 | tiempo = malloc(sizeof(tiempo)* RESULTADOS ); if(tiempo==0) printf("Error en malloc"); | |
| 210 | aux_sal = malloc(sizeof(aux_sal)* maxgeneraciones * 2 ); if(aux_sal==0) printf("Error en malloc"); | |
| 211 | ||
| 212 | data_struct_ap1->generacion = generacion; | |
| 213 | data_struct_ap1->cromo_sal = cromo_sal1; | |
| 214 | data_struct_ap1->fitness = fitness1; | |
| 215 | data_struct_ap1->fitness_entrada = 0; | |
| 216 | data_struct_ap1->tiempo = tiempo; | |
| 217 | data_struct_ap1->aux_sal = aux_sal; | |
| 218 | ||
| 219 | *generacion = 0; | |
| 220 | ||
| 221 | evolucionar(data_struct_ap1); // evolucionar | |
| 222 | ||
| 223 | /* for(i=0; i < RESULTADOS ;i++)*/ | |
| 224 | /* {*/ | |
| 225 | /* printf(" %i-- fit:%i \t",i , *(fitness1 + i));*/ | |
| 226 | /* mostrar_indiv(cromo_sal1 + (i*LONG_INDIV), pentarboles, vars);*/ | |
| 227 | /* }*/ | |
| 228 | ||
| 229 | ap1 = data_socket_tx_ap; /* devolver resultados */ | |
| 230 | *(int *)ap1 = ntohl(LONG_INDIV); | |
| 231 | ap1 = ap1 + 4; | |
| 232 | ||
| 233 | for(i=0; i < RESULTADOS ;i++) | |
| 234 | { | |
| 235 | for(j=0; j < LONG_INDIV ;j++) | |
| 236 | { | |
| 237 | *(char *)ap1 = *(cromo_sal1 + j + (LONG_INDIV * i)); | |
| 238 | ap1 ++; | |
| 239 | } | |
| 240 | *(int *)ap1 = ntohl(((*generacion) << 16) | (*(fitness1 + i))); | |
| 241 | ap1 = ap1 + 4; | |
| 242 | *(int *)ap1 = ntohl(*tiempo); | |
| 243 | ap1 = ap1 + 4; | |
| 244 | } | |
| 245 | for(i=0; i < maxgeneraciones*2 ;i++) //devolver mediciones | |
| 246 | { | |
| 247 | *(int *)ap1 = ntohl(*(aux_sal+i)); | |
| 248 | ap1 = ap1 + 4; | |
| 249 | } | |
| 250 | numbytes = ap1 - data_socket_tx_ap; | |
| 251 | send(fd2, data_socket_tx_ap, numbytes, 0); /* devuelve cromosoma y fitness al cliente */ | |
| 252 | /* printf("\n");*/ | |
| 253 | ||
| 254 | close(fd2); | |
| 255 | free(cromo_entrada); | |
| 256 | free(cromo_sal1); | |
| 257 | free(fitness1); | |
| 258 | free(cromo_sal2); | |
| 259 | free(fitness2); | |
| 260 | free(generacion); | |
| 261 | free(tiempo); | |
| 262 | free(aux_sal); | |
| 263 | } | |
| 264 | ||
| 265 | ||
| 266 | if(HW_ENABLE == 1){ | |
| 267 | close_peripheral(evalfit_ptr1); | |
| 268 | close_peripheral(evalfit_ptr2); | |
| 269 | close_peripheral(evalfit_ptr3); | |
| 270 | close_peripheral(evalfit_ptr4); | |
| 271 | } | |
| 272 | close(basemem); | |
| 273 | ||
| 274 | ||
| 275 | free(funlut_ap); | |
| 276 | free(puertas_ap); | |
| 277 | free(data_socket_rx_ap); | |
| 278 | free(data_socket_tx_ap); | |
| 279 | shutdown(fd, SHUT_RDWR); | |
| 280 | close(fd); | |
| 281 | ||
| 282 | return 0; | |
| 283 | } | |
| Examples/ehw4/src/sintesishw_server.h | ||
|---|---|---|
| 1 | ||
| 2 | /** Genetic definitions **/ | |
| 3 | #define HW_ENABLE 1 //cambiar en genetic.h habilitar hw, 0 se hace por SW | |
| 4 | ||
| 5 | #define RESULTADOS 2 | |
| 6 | ||
| 7 | #define ARBOLES 5 | |
| 8 | #define LONG_ARBOL 8 | |
| 9 | ||
| 10 | #define nivel1 pentarboles * 4 | |
| 11 | #define ARBOLES_INDIV (int)(nivel1 + *(nivel2+pentarboles) + *(nivel3+pentarboles) + *(nivel4+pentarboles) + *(nivel5+pentarboles)) | |
| 12 | #define LONG_INDIV (int)(ARBOLES_INDIV * LONG_ARBOL) | |
| 13 | ||
| 14 | #define EVALFIT_PHYSBASE1 0xcd800000 | |
| 15 | #define EVALFIT_PHYSBASE2 0xcd820000 | |
| 16 | #define EVALFIT_PHYSBASE3 0xcd840000 | |
| 17 | #define EVALFIT_PHYSBASE4 0xcd860000 | |
| 18 | ||
| 19 | //sockets defs | |
| 20 | #define PORT 3550 /* El puerto que sera abierto */ | |
| 21 | #define BACKLOG 2 /* El numero de conexiones permitidas */ | |
| 22 | #define MAXDATASIZE 10000 /* El numero maximo de datos en bytes */ | |
| 23 | ||
| 24 | /* Variables globales */ | |
| 25 | char *funlut_ap, *puertas_ap; | |
| 26 | void *evalfit_ptr1, *evalfit_ptr4, *evalfit_ptr3, *evalfit_ptr2; | |
| 27 | int maxgeneraciones, poblacion; | |
| 28 | ||
| 29 | ||
| 30 | typedef long long timestamp_t; | |
| 31 | static timestamp_t | |
| 32 | get_timestamp () | |
| 33 | { | |
| 34 | struct timeval now; | |
| 35 | gettimeofday (&now, NULL); | |
| 36 | return now.tv_usec + (timestamp_t)now.tv_sec *1000000 ; | |
| 37 | } | |
| 38 | ||
| 39 | struct gen_datos_tipo | |
| 40 | { | |
| 41 | int *objetivo; | |
| 42 | int tamaobj; | |
| 43 | int pentarboles; | |
| 44 | int vars; | |
| 45 | int tamacrom; | |
| 46 | int maxgen; | |
| 47 | char *cromo_sal; | |
| 48 | int *fitness; | |
| 49 | char *cromo_entrada; | |
| 50 | int fitness_entrada; | |
| 51 | int nivel_max; | |
| 52 | int en_cromo_entrada; | |
| 53 | int *generacion; | |
| 54 | int *tiempo; | |
| 55 | int aux; | |
| 56 | int *aux_sal; | |
| 57 | }; | |
| 58 | ||
| Examples/ehw4/src/test/Makefile | ||
|---|---|---|
| 1 | #OBJS := start.o main.o jz_serial.o | |
| 2 | ||
| 3 | CROSS := mipsel-openwrt-linux- | |
| 4 | INCLUDE = -I. -lm | |
| 5 | CCFLAGS = ${INCLUDE} ${DEBUG} ${WARNINGS} | |
| 6 | #CFLAGS := -O2 -G 0 -mno-abicalls -fno-pic -mips32 -Iinclude | |
| 7 | AFLAGS = -D__ASSEMBLY__ $(CFLAGS) | |
| 8 | LDFLAGS := -T ld.script -nostdlib -EL | |
| 9 | COMMON_SOURCES = jz47xx_gpio.c jz47xx_mmap.c | |
| 10 | COMMON_OBJECTS = $(COMMON_SOURCES:.c=.o) | |
| 11 | H_SOURCES = jz47xx_gpio.h jz47xx_mmap.h | |
| 12 | ||
| 13 | NANO_IP = 192.168.254.101 | |
| 14 | ||
| 15 | all: xburst | |
| 16 | ||
| 17 | xburst: xburst.c xburst.h $(COMMON_OBJECTS) | |
| 18 | $(CROSS)gcc $(COMMON_OBJECTS) xburst.c -o xburst ${CCFLAGS} | |
| 19 | ||
| 20 | .c.o: | |
| 21 | $(CROSS)gcc $(CCFLAGS) -c $< -o $@ | |
| 22 | .S.o: | |
| 23 | $(CROSS)gcc $(AFLAGS) -c $< -o $@ | |
| 24 | ||
| 25 | indent: | |
| 26 | indent -bad -bap -nbc -bl -nce -i2 --no-tabs --line-length120 $(COMMON_SOURCES) $(H_SOURCES) | |
| 27 | ||
| 28 | upload: xburst | |
| 29 | scp xburst root@$(NANO_IP):binaries | |
| Examples/ehw4/src/test/enable_irq.c | ||
|---|---|---|
| 1 | /* | |
| 2 | JZ47xx test gpio | |
| 3 | ||
| 4 | Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com | |
| 5 | Carlos Camargo cicamargoba@unal.edu.co | |
| 6 | ||
| 7 | This program is free software; you can redistribute it and/or modify | |
| 8 | it under the terms of the GNU General Public License as published by | |
| 9 | the Free Software Foundation; either version 2 of the License, or | |
| 10 | (at your option) any later version. | |
| 11 | ||
| 12 | This program is distributed in the hope that it will be useful, | |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | GNU General Public License for more details. | |
| 16 | ||
| 17 | You should have received a copy of the GNU General Public License | |
| 18 | along with this program; if not, write to the Free Software | |
| 19 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ | |
| 20 | ||
| 21 | #include <stdio.h> | |
| 22 | #include <unistd.h> | |
| 23 | ||
| 24 | #include "jz47xx_gpio.h" | |
| 25 | ||
| 26 | #define IRQ_PORT JZ_GPIO_PORT_C | |
| 27 | #define IRQ_PIN 15 | |
| 28 | ||
| 29 | int | |
| 30 | main () | |
| 31 | { | |
| 32 | JZ_PIO *pio = jz_gpio_map (IRQ_PORT); | |
| 33 | ||
| 34 | if (!pio) | |
| 35 | return -1; | |
| 36 | ||
| 37 | jz_gpio_as_irq (pio, IRQ_PIN); | |
| 38 | ||
| 39 | return 0; | |
| 40 | } | |
| Examples/ehw4/src/test/enable_rx.c | ||
|---|---|---|
| 1 | /* | |
| 2 | JZ47xx test gpio | |
| 3 | ||
| 4 | Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com | |
| 5 | Carlos Camargo cicamargoba@unal.edu.co | |
| 6 | ||
| 7 | This program is free software; you can redistribute it and/or modify | |
| 8 | it under the terms of the GNU General Public License as published by | |
| 9 | the Free Software Foundation; either version 2 of the License, or | |
| 10 | (at your option) any later version. | |
| 11 | ||
| 12 | This program is distributed in the hope that it will be useful, | |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | GNU General Public License for more details. | |
| 16 | ||
| 17 | You should have received a copy of the GNU General Public License | |
| 18 | along with this program; if not, write to the Free Software | |
| 19 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ | |
| 20 | ||
| 21 | #include <stdio.h> | |
| 22 | #include <unistd.h> | |
| 23 | ||
| 24 | #include "jz47xx_gpio.h" | |
| 25 | ||
| 26 | #define RXD_PORT JZ_GPIO_PORT_D | |
| 27 | #define RXD_PIN 26 | |
| 28 | ||
| 29 | int | |
| 30 | main () | |
| 31 | { | |
| 32 | JZ_PIO *pio = jz_gpio_map (RXD_PORT); | |
| 33 | ||
| 34 | if (!pio) | |
| 35 | return -1; | |
| 36 | ||
| 37 | jz_gpio_as_func (pio, RXD_PIN, 1); | |
| 38 | ||
| 39 | return 0; | |
| 40 | } | |
| Examples/ehw4/src/test/jz47xx_gpio.c | ||
|---|---|---|
| 1 | /* | |
| 2 | JZ47xx GPIO at userspace | |
| 3 | ||
| 4 | Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com | |
| 5 | ||
| 6 | This program is free software; you can redistribute it and/or modify | |
| 7 | it under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 2 of the License, or | |
| 9 | (at your option) any later version. | |
| 10 | ||
| 11 | This program is distributed in the hope that it will be useful, | |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | GNU General Public License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with this program; if not, write to the Free Software | |
| 18 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ | |
| 19 | ||
| 20 | #include <stdio.h> | |
| 21 | #include <stdlib.h> | |
| 22 | #include <unistd.h> | |
| 23 | ||
| 24 | #include <jz47xx_gpio.h> | |
| 25 | #include <jz47xx_mmap.h> | |
| 26 | ||
| 27 | ||
| 28 | #define JZ_GPIO_BASE 0x10010000 | |
| 29 | ||
| 30 | void | |
| 31 | jz_gpio_as_output (JZ_PIO * pio, unsigned int o) | |
| 32 | { | |
| 33 | pio->PXFUNC = (1 << (o)); | |
| 34 | pio->PXSELC = (1 << (o)); | |
| 35 | pio->PXDIRS = (1 << (o)); | |
| 36 | } | |
| 37 | ||
| 38 | void | |
| 39 | jz_gpio_as_input (JZ_PIO * pio, unsigned int o) | |
| 40 | { | |
| 41 | pio->PXFUNC = (1 << (o)); | |
| 42 | pio->PXSELC = (1 << (o)); | |
| 43 | pio->PXDIRC = (1 << (o)); | |
| 44 | } | |
| 45 | ||
| 46 | void | |
| 47 | jz_gpio_as_irq (JZ_PIO * pio, unsigned int o) | |
| 48 | { | |
| 49 | pio->PXFUNC = (1 << (o)); | |
| 50 | pio->PXSELS = (1 << (o)); | |
| 51 | pio->PXDIRC = (1 << (o)); | |
| 52 | } | |
| 53 | ||
| 54 | void | |
| 55 | jz_gpio_set_pin (JZ_PIO * pio, unsigned int o) | |
| 56 | { | |
| 57 | pio->PXDATS = (1 << (o)); | |
| 58 | } | |
| 59 | ||
| 60 | void | |
| 61 | jz_gpio_clear_pin (JZ_PIO * pio, unsigned int o) | |
| 62 | { | |
| 63 | pio->PXDATC = (1 << (o)); | |
| 64 | } | |
| 65 | ||
| 66 | void | |
| 67 | jz_gpio_out (JZ_PIO * pio, unsigned int o, unsigned int val) | |
| 68 | { | |
| 69 | if (val == 0) | |
| 70 | pio->PXDATC = (1 << (o)); | |
| 71 | else | |
| 72 | pio->PXDATS = (1 << (o)); | |
| 73 | } | |
| 74 | ||
| 75 | unsigned int | |
| 76 | jz_gpio_get_pin (JZ_PIO * pio, unsigned int o) | |
| 77 | { | |
| 78 | return (pio->PXPIN & (1 << o)) ? 1 : 0; | |
| 79 | } | |
| 80 | ||
| 81 | int | |
| 82 | jz_gpio_as_func (JZ_PIO * pio, unsigned int o, int func) | |
| 83 | { | |
| 84 | switch (func) | |
| 85 | { | |
| 86 | case 0: | |
| 87 | pio->PXFUNS = (1 << o); | |
| 88 | pio->PXTRGC = (1 << o); | |
| 89 | pio->PXSELC = (1 << o); | |
| 90 | pio->PXPES = (1 << o); | |
| 91 | return 1; | |
| 92 | ||
| 93 | case 1: | |
| 94 | pio->PXFUNS = (1 << o); | |
| 95 | pio->PXTRGC = (1 << o); | |
| 96 | pio->PXSELS = (1 << o); | |
| 97 | pio->PXPES = (1 << o); | |
| 98 | return 1; | |
| 99 | ||
| 100 | case 2: | |
| 101 | pio->PXFUNS = (1 << o); | |
| 102 | pio->PXTRGS = (1 << o); | |
| 103 | pio->PXSELC = (1 << o); | |
| 104 | pio->PXPES = (1 << o); | |
| 105 | return 1; | |
| 106 | } | |
| 107 | return 0; | |
| 108 | } | |
| 109 | ||
| 110 | JZ_PIO * | |
| 111 | jz_gpio_map (int port) | |
| 112 | { | |
| 113 | JZ_PIO *pio; | |
| 114 | ||
| 115 | pio = (JZ_PIO *) jz_mmap (JZ_GPIO_BASE); | |
| 116 | pio = (JZ_PIO *) ((unsigned int) pio + port * 0x100); | |
| 117 | ||
| 118 | return pio; | |
| 119 | } | |
| Examples/ehw4/src/test/jz47xx_gpio.h | ||
|---|---|---|
| 1 | /* | |
| 2 | JZ47xx GPIO at userspace | |
| 3 | ||
| 4 | Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com | |
| 5 | ||
| 6 | This program is free software; you can redistribute it and/or modify | |
| 7 | it under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 2 of the License, or | |
| 9 | (at your option) any later version. | |
| 10 | ||
| 11 | This program is distributed in the hope that it will be useful, | |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | GNU General Public License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with this program; if not, write to the Free Software | |
| 18 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ | |
| 19 | ||
| 20 | #ifndef __jz47xx_gpio_h__ | |
| 21 | #define __jz47xx_gpio_h__ | |
| 22 | ||
| 23 | #define JZ_GPIO_PORT_A 0 | |
| 24 | #define JZ_GPIO_PORT_B 1 | |
| 25 | #define JZ_GPIO_PORT_C 2 | |
| 26 | #define JZ_GPIO_PORT_D 3 | |
| 27 | ||
| 28 | typedef volatile unsigned int JZ_REG; /* Hardware register definition */ | |
| 29 | ||
| 30 | typedef struct _JZ_PIO | |
| 31 | { | |
| 32 | JZ_REG PXPIN; /* PIN Level Register */ | |
| 33 | JZ_REG Reserved0; | |
| 34 | JZ_REG Reserved1; | |
| 35 | JZ_REG Reserved2; | |
| 36 | JZ_REG PXDAT; /* Port Data Register */ | |
| 37 | JZ_REG PXDATS; /* Port Data Set Register */ | |
| 38 | JZ_REG PXDATC; /* Port Data Clear Register */ | |
| 39 | JZ_REG Reserved3; | |
| 40 | JZ_REG PXIM; /* Interrupt Mask Register */ | |
| 41 | JZ_REG PXIMS; /* Interrupt Mask Set Reg */ | |
| 42 | JZ_REG PXIMC; /* Interrupt Mask Clear Reg */ | |
| 43 | JZ_REG Reserved4; | |
| 44 | JZ_REG PXPE; /* Pull Enable Register */ | |
| 45 | JZ_REG PXPES; /* Pull Enable Set Reg. */ | |
| 46 | JZ_REG PXPEC; /* Pull Enable Clear Reg. */ | |
| 47 | JZ_REG Reserved5; | |
| 48 | JZ_REG PXFUN; /* Function Register */ | |
| 49 | JZ_REG PXFUNS; /* Function Set Register */ | |
| 50 | JZ_REG PXFUNC; /* Function Clear Register */ | |
| 51 | JZ_REG Reserved6; | |
| 52 | JZ_REG PXSEL; /* Select Register */ | |
| 53 | JZ_REG PXSELS; /* Select Set Register */ | |
| 54 | JZ_REG PXSELC; /* Select Clear Register */ | |
| 55 | JZ_REG Reserved7; | |
| 56 | JZ_REG PXDIR; /* Direction Register */ | |
| 57 | JZ_REG PXDIRS; /* Direction Set Register */ | |
| 58 | JZ_REG PXDIRC; /* Direction Clear Register */ | |
| 59 | JZ_REG Reserved8; | |
| 60 | JZ_REG PXTRG; /* Trigger Register */ | |
| 61 | JZ_REG PXTRGS; /* Trigger Set Register */ | |
| 62 | JZ_REG PXTRGC; /* Trigger Set Register */ | |
| 63 | JZ_REG Reserved9; | |
| 64 | JZ_REG PXFLG; /* Port Flag Register */ | |
| 65 | JZ_REG PXFLGC; /* Port Flag clear Register */ | |
| 66 | } JZ_PIO, *PJZ_PIO; | |
| 67 | ||
| 68 | void jz_gpio_as_output (JZ_PIO * pio, unsigned int o); | |
| 69 | ||
| 70 | void jz_gpio_as_input (JZ_PIO * pio, unsigned int o); | |
| 71 | ||
| 72 | void jz_gpio_set_pin (JZ_PIO * pio, unsigned int o); | |
| 73 | ||
| 74 | void jz_gpio_clear_pin (JZ_PIO * pio, unsigned int o); | |
| 75 | ||
| 76 | void jz_gpio_out (JZ_PIO * pio, unsigned int o, unsigned int val); | |
| 77 | ||
| 78 | unsigned int jz_gpio_get_pin (JZ_PIO * pio, unsigned int o); | |
| 79 | ||
| 80 | int jz_gpio_as_func (JZ_PIO * pio, unsigned int o, int func); | |
| 81 | ||
| 82 | JZ_PIO *jz_gpio_map (int port); | |
| 83 | ||
| 84 | #endif | |
| Examples/ehw4/src/test/jz47xx_gpio.o |
|---|
| Examples/ehw4/src/test/jz47xx_mmap.c | ||
|---|---|---|
| 1 | /* | |
| 2 | * JZ47xx GPIO lines | |
| 3 | * | |
| 4 | * Written 2010 by Andres Calderon andres.calderon@emqbit.com | |
| 5 | */ | |
| 6 | ||
| 7 | #include <stdio.h> | |
| 8 | #include <sys/mman.h> | |
| 9 | #include <fcntl.h> | |
| 10 | #include <stdlib.h> | |
| 11 | #include <termios.h> | |
| 12 | #include <unistd.h> | |
| 13 | ||
| 14 | #include <jz47xx_mmap.h> | |
| 15 | ||
| 16 | ||
| 17 | void * | |
| 18 | jz_mmap (off_t address) | |
| 19 | { | |
| 20 | int fd; | |
| 21 | ||
| 22 | void *pio; | |
| 23 | ||
| 24 | if ((fd = open ("/dev/mem", O_RDWR | O_SYNC)) == -1) | |
| 25 | { | |
| 26 | fprintf (stderr, "Cannot open /dev/mem.\n"); | |
| 27 | return 0; | |
| 28 | } | |
| 29 | ||
| 30 | pio = (void *) mmap (0, getpagesize (), PROT_READ | PROT_WRITE, MAP_SHARED, fd, address); | |
| 31 | ||
| 32 | if (pio == (void *) -1) | |
| 33 | { | |
| 34 | fprintf (stderr, "Cannot mmap.\n"); | |
| 35 | return 0; | |
| 36 | } | |
| 37 | ||
| 38 | return pio; | |
| 39 | } | |
| 40 | ||
| 41 | void * | |
| 42 | jz_fpga_map (off_t address) | |
| 43 | { | |
| 44 | int fd; | |
| 45 | ||
| 46 | void *fpga; | |
| 47 | ||
| 48 | if ((fd = open ("/dev/mem", O_RDWR | O_SYNC)) == -1) | |
| 49 | { | |
| 50 | fprintf (stderr, "Cannot open /dev/mem.\n"); | |
| 51 | return 0; | |
| 52 | } | |
| 53 | ||
| 54 | fpga = (void *) mmap (0, FPGA_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, address); | |
| 55 | ||
| 56 | if (fpga == (void *) -1) | |
| 57 | { | |
| 58 | fprintf (stderr, "Cannot mmap.\n"); | |
| 59 | return 0; | |
| 60 | } | |
| 61 | ||
| 62 | return fpga; | |
| 63 | } | |
| 64 | ||
| Examples/ehw4/src/test/jz47xx_mmap.h | ||
|---|---|---|
| 1 | /* | |
| 2 | * JZ47xx GPIO lines | |
| 3 | * | |
| 4 | * Written 2010 by Andres Calderon andres.calderon@emqbit.com | |
| 5 | */ | |
| 6 | ||
| 7 | #ifndef __jz47xx_mmap_h__ | |
| 8 | #define __jz47xx_mmap_h__ | |
| 9 | ||
| 10 | #include <sys/mman.h> | |
| 11 | ||
| 12 | #define FPGA_SIZE (1 << 15) | |
| 13 | ||
| 14 | void *jz_mmap (off_t address); | |
| 15 | void *jz_fpga_map (off_t address); | |
| 16 | ||
| 17 | #endif | |
| Examples/ehw4/src/test/jz47xx_mmap.o |
|---|
| Examples/ehw4/src/test/jz_init_sram.c | ||
|---|---|---|
| 1 | /* SAKC FPGA/SRAM interface test | |
| 2 | ||
| 3 | Copyright (C) 2010 Carlos Camargo cicamargoba@unal.edu.co | |
| 4 | Andres Calderon andres.calderon@emqbit.com | |
| 5 | ||
| 6 | This program is free software; you can redistribute it and/or modify | |
| 7 | it under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 2 of the License, or | |
| 9 | (at your option) any later version. | |
| 10 | ||
| 11 | This program is distributed in the hope that it will be useful, | |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | GNU General Public License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with this program; if not, write to the Free Software | |
| 18 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ | |
| 19 | ||
| 20 | #include <stdio.h> | |
| 21 | #include <unistd.h> | |
| 22 | #include <stdlib.h> | |
| 23 | ||
| 24 | #include "jz47xx_gpio.h" | |
| 25 | #include "jz47xx_mmap.h" | |
| 26 | ||
| 27 | #define CS2_PORT JZ_GPIO_PORT_B | |
| 28 | #define CS2_PIN 26 | |
| 29 | ||
| 30 | int | |
| 31 | main () | |
| 32 | { | |
| 33 | int i; | |
| 34 | JZ_PIO *pio; | |
| 35 | int *virt_addr; | |
| 36 | ||
| 37 | pio = jz_gpio_map (CS2_PORT); | |
| 38 | jz_gpio_as_func (pio, CS2_PIN, 0); | |
| 39 | ||
| 40 | virt_addr = (int *) jz_mmap (0x13010000) + 0x18/sizeof(int); | |
| 41 | ||
| 42 | if (*virt_addr != 0xFFF7700) | |
| 43 | { // 0 WS, 8 bits | |
| 44 | *virt_addr = 0xFFF7700; | |
| 45 | printf ("Configuring CS2 8 bits \n"); | |
| 46 | } | |
| 47 | else | |
| 48 | printf ("CS3, already configured\n"); | |
| 49 | ||
| 50 | virt_addr = (int *) jz_fpga_map (0x15000000); | |
| 51 | ||
| 52 | printf ("Writing Memory..\n"); | |
| 53 | ||
| 54 | srand48(0x3c); | |
| 55 | ||
| 56 | for (i = 0; i < FPGA_SIZE/4; i++) | |
| 57 | virt_addr[i] = (lrand48() & 0x00ff); | |
| 58 | ||
| 59 | printf ("Reading Memory..\n"); | |
| 60 | ||
| 61 | ||
| 62 | srand48(0x3c); | |
| 63 | ||
| 64 | for (i = 0; i < FPGA_SIZE/4; i++){ | |
| 65 | printf("%X\n", virt_addr[i]); | |
| 66 | if (virt_addr[i] != (lrand48() & 0x00ff)){ | |
| 67 | printf ("FPGA - Xburst connection test failed on Address:0x%x\n", i); | |
| 68 | return 1; /* Error */ | |
| 69 | } | |
| 70 | } | |
| 71 | printf ("%d\n", i); | |
| 72 | printf ("FPGA - Xburst connection test passed\n"); | |
| 73 | ||
| 74 | return 0; | |
| 75 | } | |
| Examples/ehw4/src/test/jz_test_gpio.c | ||
|---|---|---|
| 1 | /* | |
| 2 | JZ47xx test gpio | |
| 3 | ||
| 4 | Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com | |
| 5 | Carlos Camargo cicamargoba@unal.edu.co | |
| 6 | ||
| 7 | This program is free software; you can redistribute it and/or modify | |
| 8 | it under the terms of the GNU General Public License as published by | |
| 9 | the Free Software Foundation; either version 2 of the License, or | |
| 10 | (at your option) any later version. | |
| 11 | ||
| 12 | This program is distributed in the hope that it will be useful, | |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | GNU General Public License for more details. | |
| 16 | ||
| 17 | You should have received a copy of the GNU General Public License | |
| 18 | along with this program; if not, write to the Free Software | |
| 19 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ | |
| 20 | ||
| 21 | #include <stdio.h> | |
| 22 | #include <unistd.h> | |
| 23 | ||
| 24 | #include "jz47xx_gpio.h" | |
| 25 | ||
| 26 | //#define TEST_PORT JZ_GPIO_PORT_C | |
| 27 | //#define TEST_PIN 17 | |
| 28 | ||
| 29 | int | |
| 30 | main (int argc,char *argv[]) | |
| 31 | ||
| 32 | { | |
| 33 | int TEST_PORT, TEST_PIN; | |
| 34 | ||
| 35 | if(argc != 3){ | |
| 36 | fprintf(stderr,"\nUsage: %s TEST_PIN_PORT(A=0, B=1, C=2, D=3) TEST_PIN \n",argv[0]); | |
| 37 | } | |
| 38 | ||
| 39 | TEST_PORT = JZ_GPIO_PORT_C; | |
| 40 | TEST_PIN = 17; | |
| 41 | JZ_PIO *pio = jz_gpio_map (TEST_PORT); | |
| 42 | ||
| 43 | if (!pio) | |
| 44 | return -1; | |
| 45 | ||
| 46 | jz_gpio_as_output (pio, TEST_PIN); | |
| 47 | ||
| 48 | int tg = 1; | |
| 49 | ||
| 50 | while (1) | |
| 51 | { | |
| 52 | jz_gpio_out (pio, TEST_PIN, tg); | |
| 53 | printf ("[%d]", jz_gpio_get_pin (pio, TEST_PIN)); | |
| 54 | fflush (stdout); | |
| 55 | usleep (500 * 1000); | |
| 56 | tg = !tg; | |
| 57 | } | |
| 58 | return 0; | |
| 59 | } | |
| Examples/ehw4/src/test/xburst |
|---|
| Examples/ehw4/src/test/xburst.c | ||
|---|---|---|
| 1 | #include <stdio.h> | |
| 2 | #include <stdlib.h> | |
| 3 | #include "fcntl.h" | |
| 4 | #include <sys/mman.h> | |
| 5 | #include <xburst.h> | |
| 6 | #include "jz47xx_gpio.h" | |
| 7 | #include <jz47xx_mmap.h> | |
| 8 | ||
| 9 | #define CS2_PORT JZ_GPIO_PORT_B | |
| 10 | #define CS2_PIN 26 | |
| 11 | ||
| 12 | int periph_map(off_t offset) | |
| 13 | { | |
| 14 | int basemem, baseperiph; | |
| 15 | basemem = open("/dev/mem", (O_RDWR | O_SYNC)); //abrir dispositivo memoria para mapear dir del periferico | |
| 16 | if(basemem == -1) | |
| 17 | { | |
| 18 | printf("Error to open /dev/mem \n"); | |
| 19 | return -1; | |
| 20 | } | |
| 21 | baseperiph = (int )mmap(NULL, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, basemem, offset);// & ~MAP_MASK); | |
| 22 | if (baseperiph == -1) | |
| 23 | { | |
| 24 | printf ("Cannot mmap.\n"); | |
| 25 | return -1; | |
| 26 | } | |
| 27 | return baseperiph; | |
| 28 | } | |
| 29 | ||
| 30 | ||
| 31 | int main(){ | |
| 32 | int i, j; | |
| 33 | int basemem, base_periferico, *ConfigRegsBase_ptr; | |
| 34 | void *peripheral1_ptr; | |
| 35 | void *pio; | |
| 36 | ||
| 37 | printf("Xburst Test..."); | |
| 38 | ||
| 39 | basemem = open("/dev/mem", (O_RDWR | O_SYNC)); //abrir dispositivo memoria para mapear dir del periferico | |
| 40 | if(basemem == -1) | |
| 41 | { | |
| 42 | printf("Error al abrir /dev/mem \n"); | |
| 43 | return -1; | |
| 44 | } | |
| 45 | ||
| 46 | pio = jz_gpio_map(CS2_PORT); | |
| 47 | jz_gpio_as_func (pio, CS2_PIN, 0); | |
| 48 | ||
| 49 | ConfigRegsBase_ptr = (int *)periph_map(CONFIG_REGS_BASE);// + SACR2_OFFSET/sizeof(int);//SMCR2_OFFSET/sizeof(int); | |
| 50 | printf("\n%0x ", *(ConfigRegsBase_ptr + SMCR2_OFFSET/sizeof(int))); | |
| 51 | munmap(ConfigRegsBase_ptr, MAP_SIZE); | |
| 52 | ||
| 53 | peripheral1_ptr = (int *)periph_map(0x14000000); | |
| 54 | ||
| 55 | for(i = 0; i < 0xfff; i=i+4){ | |
| 56 | j = rand(); | |
| 57 | // *(int *)(peripheral1_ptr + i) = j; | |
| 58 | // if(j != *(int *)(peripheral1_ptr + i)){ | |
| 59 | // printf("\nError at %0x offset:%i\n", (int *)(peripheral1_ptr + i), i); exit(0); | |
| 60 | // } | |
| 61 | printf("\nReg %i: write:%0x read:%0x", i, j, *(int *)(peripheral1_ptr + i) ); | |
| 62 | } | |
| 63 | printf("\nPassed Test\n"); | |
| 64 | munmap(peripheral1_ptr, MAP_SIZE); | |
| 65 | ||
| 66 | //munmap(base_periferico, MAP_SIZE); | |
| 67 | close(basemem); | |
| 68 | exit(0); | |
| 69 | } | |
| 70 | ||
| Examples/ehw4/src/test/xburst.h | ||
|---|---|---|
| 1 | ||
| 2 | #define CONFIG_REGS_BASE 0x13010000 | |
| 3 | #define SMCR2_OFFSET 0x18 | |
| 4 | #define SACR2_OFFSET 0x38 | |
| 5 | ||
| 6 | #define MAP_SIZE 0x10000Ul | |
| 7 | #define MAP_MASK (MAP_SIZE - 1) | |
| 8 | #define XBURST_PHYSBASE1 0x14000000 | |
| 9 | ||
| 10 | //SMCR2 reset:0x0FFF7700 Address: 0x13010018 | |
| KICAD_design_files/SAKC_PCB_v2/SAKC.drl | ||
|---|---|---|
| 1 | 1 | M48 |
| 2 | ;DRILL file {PCBnew (20090216-final)} date Fri 23 Apr 2010 01:13:58 PM COT | |
| 3 | ;FORMAT={-.-/ absolute / inch / decimal} | |
| 2 | ;DRILL file {PCBnew (20090216-final)} date Tue 28 Sep 2010 03:28:56 PM COT | |
| 3 | ;FORMAT={-.-/ absolute / metric / decimal} | |
| 4 | 4 | R,T |
| 5 | 5 | VER,1 |
| 6 | 6 | FMAT,2 |
| 7 | INCH,TZ | |
| 7 | METRIC,TZ | |
| 8 | 8 | TCST,OFF |
| 9 | 9 | ICI,OFF |
| 10 | 10 | ATC,ON |
| 11 | T1C0.012 | |
| 12 | T2C0.030 | |
| 13 | T3C0.034 | |
| 14 | T4C0.038 | |
| 15 | T5C0.040 | |
| 16 | T6C0.042 | |
| 17 | T7C0.052 | |
| 18 | T8C0.118 | |
| 11 | T1C0.300 | |
| 12 | T2C0.762 | |
| 13 | T3C0.864 | |
| 14 | T4C0.965 | |
| 15 | T5C1.016 | |
| 16 | T6C1.067 | |
| 17 | T7C1.321 | |
| 18 | T8C2.997 | |
| 19 | 19 | % |
| 20 | 20 | M47 |
| 21 | 21 | G05 |
| 22 | M72 | |
| 22 | M71 | |
| 23 | 23 | T1 |
| 24 | X6.466Y5.799 | |
| 25 | X6.496Y5.734 | |
| 26 | X6.501Y6.072 | |
| 27 | X6.501Y6.091 | |
| 28 | X6.501Y6.112 | |
| 29 | X6.502Y5.899 | |
| 30 | X6.505Y6.206 | |
| 31 | X6.515Y6.554 | |
| 32 | X6.531Y5.500 | |
| 33 | X6.532Y5.434 | |
| 34 | X6.532Y5.467 | |
| 35 | X6.537Y6.410 | |
| 36 | X6.540Y6.137 | |
| 37 | X6.548Y6.548 | |
| 38 | X6.565Y6.109 | |
| 39 | X6.568Y6.424 | |
| 40 | X6.579Y6.778 | |
| 41 | X6.592Y6.453 | |
| 42 | X6.597Y6.138 | |
| 43 | X6.607Y6.493 | |
| 44 | X6.607Y5.997 | |
| 45 | X6.634Y6.522 | |
| 46 | X6.636Y6.984 | |
| 47 | X6.641Y5.972 | |
| 48 | X6.664Y5.202 | |
| 49 | X6.665Y6.851 | |
| 50 | X6.699Y4.806 | |
| 51 | X6.708Y6.805 | |
| 52 | X6.710Y4.771 | |
| 53 | X6.712Y6.032 | |
| 54 | X6.722Y5.762 | |
| 55 | X6.733Y5.571 | |
| 56 | X6.747Y5.159 | |
| 57 | X6.747Y5.832 | |
| 58 | X6.749Y5.641 | |
| 59 | X6.784Y5.897 | |
| 60 | X6.802Y7.076 | |
| 61 | X6.803Y7.160 | |
| 62 | X6.803Y7.120 | |
| 63 | X6.816Y6.075 | |
| 64 | X6.822Y6.130 | |
| 65 | X6.833Y5.202 | |
| 66 | X6.834Y5.889 | |
| 67 | X6.837Y4.383 | |
| 68 | X6.838Y4.598 | |
| 69 | X6.847Y6.969 | |
| 70 | X6.881Y5.477 | |
| 71 | X6.888Y5.640 | |
| 72 | X6.905Y5.392 | |
| 73 | X6.907Y5.222 | |
| 74 | X6.909Y5.355 | |
| 75 | X6.912Y6.997 | |
| 76 | X6.933Y5.767 | |
| 77 | X6.936Y6.478 | |
| 78 | X6.946Y5.592 | |
| 79 | X6.955Y6.064 | |
| 80 | X6.957Y6.284 | |
| 81 | X6.958Y5.985 | |
| 82 | X6.959Y6.759 | |
| 83 | X6.962Y4.697 | |
| 84 | X6.975Y6.254 | |
| 85 | X6.984Y6.587 | |
| 86 | X6.985Y6.310 | |
| 87 | X6.991Y6.198 | |
| 88 | X7.006Y4.628 | |
| 89 | X7.012Y5.221 | |
| 90 | X7.016Y5.714 | |
| 91 | X7.019Y6.217 | |
| 92 | X7.030Y5.385 | |
| 93 | X7.030Y5.888 | |
| 94 | X7.032Y5.618 | |
| 95 | X7.044Y6.066 | |
| 96 | X7.052Y4.641 | |
| 97 | X7.052Y6.196 | |
| 98 | X7.057Y5.914 | |
| 99 | X7.065Y5.364 | |
| 100 | X7.071Y5.855 | |
| 101 | X7.078Y6.237 | |
| 102 | X7.084Y4.601 | |
| 103 | X7.103Y6.190 | |
| 104 | X7.107Y5.485 | |
| 105 | X7.110Y5.084 | |
| 106 | X7.115Y5.997 | |
| 107 | X7.122Y5.007 | |
| 108 | X7.129Y6.255 | |
| 109 | X7.139Y5.929 | |
| 110 | X7.145Y5.081 | |
| 111 | X7.147Y6.230 | |
| 112 | X7.148Y5.430 | |
| 113 | X7.150Y4.541 | |
| 114 | X7.153Y6.891 | |
| 115 | X7.172Y6.203 | |
| 116 | X7.175Y6.920 | |
| 117 | X7.176Y4.813 | |
| 118 | X7.184Y4.486 | |
| 119 | X7.191Y5.899 | |
| 120 | X7.199Y7.225 | |
| 121 | X7.202Y6.243 | |
| 122 | X7.209Y5.844 | |
| 123 | X7.218Y5.384 | |
| 124 | X7.225Y5.708 | |
| 125 | X7.226Y5.590 | |
| 126 | X7.230Y7.232 | |
| 127 | X7.231Y6.226 | |
| 128 | X7.245Y4.866 | |
| 129 | X7.246Y5.845 | |
| 130 | X7.254Y6.527 | |
| 131 | X7.257Y7.214 | |
| 132 | X7.264Y6.222 | |
| 133 | X7.264Y6.291 | |
| 134 | X7.264Y6.497 | |
| 135 | X7.278Y6.562 | |
| 136 | X7.291Y6.462 | |
| 137 | X7.291Y7.215 | |
| 138 | X7.296Y6.593 | |
| 139 | X7.298Y6.163 | |
| 140 | X7.299Y5.877 | |
| 141 | X7.325Y7.210 | |
| 142 | X7.326Y5.728 | |
| 143 | X7.329Y6.599 | |
| 144 | X7.335Y6.284 | |
| 145 | X7.336Y6.177 | |
| 146 | X7.352Y6.687 | |
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| 150 | X7.362Y5.858 | |
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| 153 | X7.385Y7.218 | |
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| 155 | X7.405Y5.910 | |
| 156 | X7.410Y5.549 | |
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| 158 | X7.418Y6.218 | |
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| 160 | X7.442Y5.672 | |
| 161 | X7.443Y6.281 | |
| 162 | X7.445Y6.529 | |
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| 166 | X7.451Y7.325 | |
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| 169 | X7.459Y6.663 | |
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| 171 | X7.484Y5.811 | |
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| 180 | X7.545Y6.739 | |
| 181 | X7.576Y6.752 | |
| 182 | X7.582Y4.826 | |
| 183 | X7.602Y5.361 | |
| 184 | X7.603Y5.722 | |
| 185 | X7.606Y6.663 | |
| 186 | X7.606Y7.026 | |
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| 188 | X7.610Y5.839 | |
| 189 | X7.640Y6.757 | |
| 190 | X7.655Y5.106 | |
| 191 | X7.672Y6.776 | |
| 192 | X7.681Y5.271 | |
| 193 | X7.682Y5.326 | |
| 194 | X7.699Y6.622 | |
| 195 | X7.703Y6.863 | |
| 196 | X7.704Y6.695 | |
| 197 | X7.708Y6.579 | |
| 198 | X7.720Y5.280 | |
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| 200 | X7.726Y4.486 | |
| 201 | X7.734Y6.768 | |
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| 215 | X8.006Y5.766 | |
| 216 | X8.013Y6.691 | |
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| 219 | X8.043Y4.933 | |
| 220 | X8.045Y4.817 | |
| 221 | X8.065Y5.771 | |
| 222 | X8.068Y5.909 | |
| 223 | X8.075Y6.412 | |
| 224 | X8.093Y5.885 | |
| 225 | X8.096Y5.770 | |
| 226 | X8.103Y6.569 | |
| 227 | X8.117Y4.824 | |
| 228 | X8.121Y6.014 | |
| 229 | X8.133Y6.162 | |
| 230 | X8.137Y5.315 | |
| 231 | X8.138Y6.111 | |
| 232 | X8.138Y4.934 | |
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| 234 | X8.139Y6.063 | |
| 235 | X8.141Y5.937 | |
| 236 | X8.146Y6.212 | |
| 237 | X8.149Y5.767 | |
| 238 | X8.150Y5.989 | |
| 239 | X8.158Y6.038 | |
| 240 | X8.160Y4.996 | |
| 241 | X8.164Y6.135 | |
| 242 | X8.164Y6.088 | |
| 243 | X8.165Y5.087 | |
| 244 | X8.173Y5.910 | |
| 245 | X8.174Y6.187 | |
| 246 | X8.175Y6.237 | |
| 247 | X8.179Y5.965 | |
| 248 | X8.183Y6.422 | |
| 249 | X8.213Y5.794 | |
| 250 | X8.217Y5.826 | |
| 251 | X8.226Y6.570 | |
| 252 | X8.238Y5.169 | |
| 253 | X8.247Y5.230 | |
| 254 | X8.264Y6.419 | |
| 255 | X8.274Y5.816 | |
| 256 | X8.276Y4.914 | |
| 257 | X8.298Y6.409 | |
| 258 | X8.303Y5.564 | |
| 259 | X8.310Y4.888 | |
| 260 | X8.322Y6.355 | |
| 261 | X8.330Y5.230 | |
| 262 | X8.337Y6.412 | |
| 263 | X8.341Y4.928 | |
| 264 | X8.348Y6.333 | |
| 265 | X8.349Y5.126 | |
| 266 | X8.377Y5.007 | |
| 267 | X8.389Y5.409 | |
| 268 | X8.413Y7.076 | |
| 269 | X8.429Y5.353 | |
| 270 | X8.439Y4.786 | |
| 271 | X8.443Y5.684 | |
| 272 | X8.444Y6.560 | |
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| 275 | X8.461Y4.937 | |
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| 277 | X8.500Y5.335 | |
| 278 | X8.505Y5.548 | |
| 279 | X8.517Y6.821 | |
| 280 | X8.517Y5.213 | |
| 281 | X8.543Y6.166 | |
| 282 | X8.548Y5.945 | |
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| 285 | X8.558Y7.066 | |
| 286 | X8.564Y6.069 | |
| 287 | X8.569Y6.206 | |
| 288 | X8.598Y5.562 | |
| 289 | X8.607Y5.700 | |
| 290 | X8.609Y5.833 | |
| 291 | X8.638Y6.266 | |
| 292 | X8.643Y6.084 | |
| 293 | X8.657Y5.696 | |
| 294 | X8.663Y6.438 | |
| 295 | X8.664Y5.634 | |
| 296 | X8.677Y5.385 | |
| 297 | X8.688Y6.720 | |
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| 299 | X8.717Y5.425 | |
| 300 | X8.726Y6.697 | |
| 301 | X8.756Y5.848 | |
| 302 | X8.765Y6.316 | |
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| 314 | X8.867Y7.026 | |
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| 316 | X8.884Y5.184 | |
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| 324 | X8.918Y6.566 | |
| 325 | X8.919Y7.067 | |
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| 327 | X8.943Y5.909 | |
| 328 | X8.963Y5.560 | |
| 329 | X8.970Y6.426 | |
| 330 | X8.975Y5.963 | |
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| 332 | X8.977Y6.563 | |
| 333 | X8.990Y6.179 | |
| 334 | X8.994Y5.826 | |
| 335 | X9.004Y6.107 | |
| 336 | X9.006Y6.266 | |
| 337 | X9.022Y5.998 | |
| 338 | X9.027Y6.434 | |
| 339 | X9.037Y6.574 | |
| 340 | X9.048Y6.914 | |
| 341 | X9.070Y7.042 | |
| 342 | X9.071Y6.363 | |
| 343 | X9.073Y6.987 | |
| 344 | X9.090Y5.246 | |
| 345 | X9.099Y6.572 | |
| 346 | X9.115Y4.942 | |
| 347 | X9.128Y7.051 | |
| 348 | X9.129Y6.993 | |
| 349 | X9.130Y6.341 | |
| 350 | X9.136Y4.528 | |
| 351 | X9.137Y6.241 | |
| 352 | X9.139Y5.981 | |
| 353 | X9.149Y4.890 | |
| 354 | X9.149Y4.992 | |
| 355 | X9.150Y5.809 | |
| 356 | X9.153Y6.524 | |
| 357 | X9.168Y6.095 | |
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| 359 | X9.179Y6.990 | |
| 360 | X9.179Y7.048 | |
| 361 | X9.180Y4.942 | |
| 362 | X9.187Y5.278 | |
| 363 | X9.228Y6.991 | |
| 364 | X9.228Y7.049 | |
| 365 | X9.234Y5.090 | |
| 366 | X9.239Y4.698 | |
| 367 | X9.246Y6.127 | |
| 368 | X9.270Y5.977 | |
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| 370 | X9.286Y6.277 | |
| 371 | X9.322Y5.230 | |
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| 375 | X9.406Y5.230 | |
| 24 | X155.499Y-157.300 | |
| 25 | X158.399Y-139.400 | |
| 26 | X158.801Y-137.399 | |
| 27 | X158.999Y-143.401 | |
| 28 | X159.499Y-146.101 | |
| 29 | X160.299Y-169.700 | |
| 30 | X160.500Y-168.100 | |
| 31 | X160.701Y-151.900 | |
| 32 | X160.800Y-150.701 | |
| 33 | X162.799Y-143.401 | |
| 34 | X163.200Y-152.799 | |
| 35 | X163.401Y-153.700 | |
| 36 | X163.627Y-148.488 | |
| 37 | X163.800Y-152.199 | |
| 38 | X163.800Y-162.001 | |
| 39 | X163.901Y-163.299 | |
| 40 | X164.000Y-164.701 | |
| 41 | X164.000Y-166.101 | |
| 42 | X164.099Y-168.900 | |
| 43 | X164.201Y-143.401 | |
| 44 | X164.399Y-151.300 | |
| 45 | X164.399Y-162.601 | |
| 46 | X164.399Y-164.000 | |
| 47 | X164.501Y-160.299 | |
| 48 | X164.600Y-165.499 | |
| 49 | X164.600Y-166.700 | |
| 50 | X165.001Y-144.899 | |
| 51 | X165.100Y-167.401 | |
| 52 | X165.400Y-159.400 | |
| 53 | X167.112Y-175.750 | |
| 54 | X167.401Y-129.499 | |
| 55 | X167.401Y-147.300 | |
| 56 | X168.554Y-180.993 | |
| 57 | X168.699Y-134.501 | |
| 58 | X168.999Y-166.901 | |
| 59 | X169.266Y-132.121 | |
| 60 | X169.291Y-177.615 | |
| 61 | X169.400Y-120.000 | |
| 62 | X169.400Y-163.700 | |
| 63 | X169.400Y-164.501 | |
| 64 | X169.601Y-154.701 | |
| 65 | X169.601Y-166.299 | |
| 66 | X169.863Y-151.399 | |
| 67 | X169.901Y-144.800 | |
| 68 | X170.000Y-142.499 | |
| 69 | X170.000Y-163.101 | |
| 70 | X170.000Y-167.000 | |
| 71 | X170.101Y-164.099 | |
| 72 | X170.101Y-164.899 | |
| 73 | X170.139Y-141.564 | |
| 74 | X170.200Y-120.401 | |
| 75 | X170.383Y-176.446 | |
| 76 | X170.401Y-165.699 | |
| 77 | X170.729Y-146.365 | |
| 78 | X171.023Y-141.508 | |
| 79 | X171.099Y-129.499 | |
| 80 | X171.425Y-143.281 | |
| 81 | X172.601Y-131.300 | |
| 82 | X172.799Y-184.201 | |
| 83 | X173.553Y-132.121 | |
| 84 | X173.594Y-149.576 | |
| 85 | X173.660Y-111.323 | |
| 86 | X173.690Y-116.799 | |
| 87 | X173.914Y-180.612 | |
| 88 | X174.772Y-139.121 | |
| 89 | X174.955Y-143.256 | |
| 90 | X175.387Y-136.957 | |
| 91 | X175.443Y-132.629 | |
| 92 | X175.484Y-136.022 | |
| 93 | X175.565Y-181.323 | |
| 94 | X176.111Y-146.472 | |
| 95 | X176.174Y-164.536 | |
| 96 | X176.439Y-142.047 | |
| 97 | X176.713Y-159.614 | |
| 98 | X176.743Y-152.019 | |
| 99 | X176.835Y-119.304 | |
| 100 | X177.170Y-158.841 | |
| 101 | X177.383Y-167.315 | |
| 102 | X177.414Y-160.284 | |
| 103 | X177.576Y-157.439 | |
| 104 | X177.942Y-117.551 | |
| 105 | X178.097Y-132.621 | |
| 106 | X178.201Y-145.128 | |
| 107 | X178.283Y-157.922 | |
| 108 | X178.562Y-136.779 | |
| 109 | X178.562Y-149.555 | |
| 110 | X178.613Y-142.697 | |
| 111 | X178.918Y-154.076 | |
| 112 | X179.121Y-117.881 | |
| 113 | X179.121Y-157.368 | |
| 114 | X179.243Y-150.205 | |
| 115 | X179.446Y-136.246 | |
| 116 | X179.608Y-148.722 | |
| 117 | X179.791Y-158.415 | |
| 118 | X179.934Y-116.865 | |
| 119 | X180.421Y-157.216 | |
| 120 | X180.518Y-139.319 | |
| 121 | X180.594Y-129.134 | |
| 122 | X180.721Y-152.324 | |
| 123 | X180.899Y-127.178 | |
| 124 | X181.072Y-158.882 | |
| 125 | X181.336Y-150.592 | |
| 126 | X181.483Y-129.057 | |
| 127 | X181.539Y-158.232 | |
| 128 | X181.564Y-137.919 | |
| 129 | X181.610Y-115.341 | |
| 130 | X181.681Y-175.026 | |
| 131 | X182.169Y-157.551 | |
| 132 | X182.245Y-175.768 | |
| 133 | X182.270Y-122.245 | |
| 134 | X182.474Y-113.944 | |
| 135 | X182.659Y-149.824 | |
| 136 | X182.855Y-183.510 | |
| 137 | X182.941Y-158.577 | |
| 138 | X183.119Y-148.448 | |
| 139 | X183.337Y-136.754 | |
| 140 | X183.505Y-144.978 | |
| 141 | X183.530Y-141.996 | |
| 142 | X183.642Y-183.693 | |
| 143 | X183.672Y-158.151 | |
| 144 | X184.018Y-123.586 | |
| 145 | X184.059Y-148.468 | |
| 146 | X184.252Y-165.786 | |
| 147 | X184.318Y-183.223 | |
| 148 | X184.506Y-158.029 | |
| 149 | X184.506Y-159.791 | |
| 150 | X184.516Y-165.029 | |
| 151 | X184.861Y-166.675 | |
| 152 | X185.186Y-164.145 | |
| 153 | X185.196Y-183.266 | |
| 154 | X185.318Y-167.462 | |
| 155 | X185.379Y-156.535 | |
| 156 | X185.395Y-149.276 | |
| 157 | X186.050Y-183.144 | |
| 158 | X186.080Y-145.491 | |
| 159 | X186.162Y-167.615 | |
| 160 | X186.309Y-159.614 | |
| 161 | X186.345Y-156.891 | |
| 162 | X186.741Y-169.850 | |
| 163 | X186.817Y-167.142 | |
| 164 | X186.822Y-183.591 | |
| 165 | X186.842Y-158.064 | |
| 166 | X186.995Y-148.793 | |
| 167 | X187.432Y-178.989 | |
| 168 | X187.482Y-157.358 | |
| 169 | X187.574Y-183.327 | |
| 170 | X187.838Y-179.832 | |
| 171 | X188.087Y-150.114 | |
| 172 | X188.206Y-140.937 | |
| 173 | X188.366Y-180.645 | |
| 174 | X188.407Y-157.937 | |
| 175 | X188.590Y-164.328 | |
| 176 | X189.027Y-144.069 | |
| 177 | X189.057Y-159.532 | |
| 178 | X189.103Y-165.837 | |
| 179 | X189.128Y-181.453 | |
| 180 | X189.154Y-139.548 | |
| 181 | X189.154Y-166.980 | |
| 182 | X189.255Y-186.050 | |
| 183 | X189.301Y-128.260 | |
| 184 | X189.306Y-168.224 | |
| 185 | X189.456Y-169.235 | |
| 186 | X189.489Y-164.099 | |
| 187 | X190.094Y-147.599 | |
| 188 | X190.142Y-167.612 | |
| 189 | X190.475Y-178.206 | |
| 190 | X190.845Y-171.623 | |
| 191 | X190.856Y-174.320 | |
| 192 | X190.886Y-165.242 | |
| 193 | X191.171Y-166.197 | |
| 194 | X191.435Y-139.172 | |
| 195 | X191.577Y-131.999 | |
| 196 | X191.643Y-171.176 | |
| 197 | X192.430Y-171.501 | |
| 198 | X192.593Y-122.570 | |
| 199 | X193.091Y-136.169 | |
| 200 | X193.116Y-145.339 | |
| 201 | X193.192Y-169.240 | |
| 202 | X193.203Y-178.450 | |
| 203 | X193.243Y-186.334 | |
| 204 | X193.294Y-148.311 | |
| 205 | X194.056Y-171.623 | |
| 206 | X194.442Y-129.703 | |
| 207 | X194.869Y-172.110 | |
| 208 | X195.097Y-133.883 | |
| 209 | X195.123Y-135.280 | |
| 210 | X195.562Y-168.191 | |
| 211 | X195.656Y-174.320 | |
| 212 | X195.682Y-170.053 | |
| 213 | X195.783Y-167.107 | |
| 214 | X196.088Y-134.112 | |
| 215 | X196.225Y-147.930 | |
| 216 | X196.240Y-113.944 | |
| 217 | X196.454Y-171.907 | |
| 218 | X197.104Y-112.547 | |
| 219 | X197.145Y-122.347 | |
| 220 | X197.185Y-125.029 | |
| 221 | X197.267Y-171.785 | |
| 222 | X197.348Y-134.478 | |
| 223 | X198.044Y-186.157 | |
| 224 | X198.486Y-130.658 | |
| 225 | X198.852Y-171.907 | |
| 226 | X199.644Y-186.080 | |
| 227 | X201.092Y-130.414 | |
| 228 | X201.447Y-132.121 | |
| 229 | X202.514Y-163.170 | |
| 230 | X202.809Y-162.326 | |
| 231 | X203.342Y-146.467 | |
| 232 | X203.530Y-169.951 | |
| 233 | X203.576Y-149.535 | |
| 234 | X203.987Y-162.585 | |
| 235 | X204.287Y-125.303 | |
| 236 | X204.343Y-122.352 | |
| 237 | X204.851Y-146.583 | |
| 238 | X204.927Y-150.089 | |
| 239 | X205.110Y-162.870 | |
| 240 | X205.567Y-149.479 | |
| 241 | X205.649Y-146.548 | |
| 242 | X205.816Y-166.853 | |
| 243 | X206.172Y-122.530 | |
| 244 | X206.268Y-152.751 | |
| 245 | X206.568Y-156.510 | |
| 246 | X206.680Y-135.001 | |
| 247 | X206.695Y-155.224 | |
| 248 | X206.705Y-125.324 | |
| 249 | X206.715Y-159.187 | |
| 250 | X206.731Y-154.000 | |
| 251 | X206.781Y-150.800 | |
| 252 | X206.908Y-157.785 | |
| 253 | X206.985Y-146.482 | |
| 254 | X207.010Y-152.121 | |
| 255 | X207.213Y-153.365 | |
| 256 | X207.264Y-126.898 | |
| 257 | X207.366Y-155.829 | |
| 258 | X207.376Y-154.635 | |
| 259 | X207.391Y-129.210 | |
| 260 | X207.594Y-150.114 | |
| 261 | X207.609Y-157.145 | |
| 262 | X207.645Y-158.420 | |
| 263 | X207.747Y-151.511 | |
| 264 | X207.858Y-163.119 | |
| 265 | X208.610Y-147.168 | |
| 266 | X208.712Y-147.980 | |
| 267 | X208.930Y-166.878 | |
| 268 | X209.245Y-131.293 | |
| 269 | X209.474Y-132.842 | |
| 270 | X209.906Y-163.048 | |
| 271 | X210.160Y-147.726 | |
| 272 | X210.210Y-124.816 | |
| 273 | X210.759Y-162.799 | |
| 274 | X210.896Y-141.326 | |
| 275 | X211.074Y-124.155 | |
| 276 | X211.379Y-161.417 | |
| 277 | X211.582Y-132.842 | |
| 278 | X211.750Y-162.875 | |
| 279 | X211.856Y-125.171 | |
| 280 | X212.039Y-160.858 | |
| 281 | X212.060Y-130.211 | |
| 282 | X212.776Y-127.173 | |
| 283 | X213.086Y-137.394 | |
| 284 | X213.685Y-179.730 | |
| 285 | X214.097Y-135.966 | |
| 286 | X214.356Y-121.554 | |
| 287 | X214.452Y-144.374 | |
| 288 | X214.478Y-166.624 | |
| 289 | X214.498Y-139.436 | |
| 290 | X214.742Y-178.755 | |
| 291 | X214.904Y-125.405 | |
| 292 | X215.290Y-133.807 | |
| 293 | X215.910Y-135.504 | |
| 294 | X216.027Y-140.919 | |
| 295 | X216.327Y-173.248 | |
| 296 | X216.332Y-132.410 | |
| 297 | X216.997Y-156.616 | |
| 298 | X217.119Y-151.003 | |
| 299 | X217.180Y-150.124 | |
| 300 | X217.221Y-133.833 | |
| 301 | X217.363Y-179.466 | |
| 302 | X217.526Y-154.153 | |
| 303 | X217.653Y-157.632 | |
| 304 | X218.389Y-141.275 | |
| 305 | X218.618Y-144.780 | |
| 306 | X218.669Y-148.158 | |
| 307 | X219.415Y-159.146 | |
| 308 | X219.532Y-154.534 | |
| 309 | X219.885Y-144.683 | |
| 310 | X220.035Y-163.525 | |
| 311 | X220.066Y-143.093 | |
| 312 | X220.396Y-136.779 | |
| 313 | X220.675Y-170.688 | |
| 314 | X221.204Y-159.918 | |
| 315 | X221.412Y-137.795 | |
| 316 | X221.640Y-170.104 | |
| 317 | X222.402Y-148.539 | |
| 318 | X222.626Y-160.426 | |
| 319 | X222.910Y-169.570 | |
| 320 | X222.976Y-171.308 | |
| 321 | X223.190Y-163.576 | |
| 322 | X223.845Y-156.017 | |
| 323 | X223.865Y-175.626 | |
| 324 | X224.053Y-131.648 | |
| 325 | X224.384Y-177.013 | |
| 326 | X224.800Y-179.487 | |
| 327 | X224.841Y-132.918 | |
| 328 | X224.866Y-130.393 | |
| 329 | X224.917Y-148.565 | |
| 330 | X225.222Y-178.460 | |
| 331 | X225.593Y-154.310 | |
| 332 | X225.654Y-131.674 | |
| 333 | X225.654Y-179.502 | |
| 334 | X225.679Y-160.071 | |
| 335 | X225.730Y-134.899 | |
| 336 | X225.984Y-175.158 | |
| 337 | X226.111Y-178.460 | |
| 338 | X226.187Y-141.529 | |
| 339 | X226.416Y-147.650 | |
| 340 | X226.517Y-166.776 | |
| 341 | X226.543Y-179.502 | |
| 342 | X226.893Y-157.196 | |
| 343 | X227.157Y-150.084 | |
| 344 | X227.660Y-141.224 | |
| 345 | X227.828Y-163.210 | |
| 346 | X227.965Y-151.460 | |
| 347 | X227.990Y-160.447 | |
| 348 | X228.016Y-166.700 | |
| 349 | X228.346Y-156.947 | |
| 350 | X228.448Y-147.980 | |
| 351 | X228.702Y-155.118 | |
| 352 | X228.763Y-159.146 | |
| 353 | X229.159Y-152.349 | |
| 354 | X229.291Y-163.413 | |
| 355 | X229.540Y-166.980 | |
| 356 | X229.819Y-175.605 | |
| 357 | X230.388Y-178.877 | |
| 358 | X230.403Y-161.620 | |
| 359 | X230.454Y-177.470 | |
| 360 | X230.886Y-133.248 | |
| 361 | X231.115Y-166.929 | |
| 362 | X231.521Y-125.527 | |
| 363 | X231.851Y-179.095 | |
| 364 | X231.877Y-177.622 | |
| 365 | X231.892Y-161.056 | |
| 366 | X232.054Y-115.001 | |
| 367 | X232.080Y-158.532 | |
| 368 | X232.126Y-151.922 | |
| 369 | X232.385Y-124.206 | |
| 370 | X232.385Y-126.797 | |
| 371 | X232.410Y-147.549 | |
| 372 | X232.491Y-165.720 | |
| 373 | X232.867Y-154.818 | |
| 374 | X233.070Y-128.295 | |
| 375 | X233.147Y-177.546 | |
| 376 | X233.147Y-179.019 | |
| 377 | X233.172Y-125.527 | |
| 378 | X233.350Y-134.061 | |
| 379 | X234.389Y-177.576 | |
| 380 | X234.391Y-179.045 | |
| 381 | X234.533Y-129.276 | |
| 382 | X234.671Y-119.329 | |
| 383 | X234.848Y-155.626 | |
| 384 | X235.448Y-151.816 | |
| 385 | X235.458Y-150.368 | |
| 386 | X235.869Y-159.431 | |
| 387 | X236.799Y-131.900 | |
| 388 | X237.769Y-128.219 | |
| 389 | X238.201Y-131.900 | |
| 376 | 390 | T2 |
| 377 | X6.608Y5.455 | |
| 378 | X6.608Y5.533 | |
| 379 | X6.608Y5.612 | |
| 380 | X6.608Y5.691 | |
| 381 | X6.686Y5.455 | |
| 382 | X6.686Y5.533 | |
| 383 | X6.686Y5.612 | |
| 384 | X6.686Y5.691 | |
| 391 | X155.499Y-136.500 | |
| 392 | X155.499Y-138.481 | |
| 393 | X155.499Y-140.487 | |
| 394 | X155.499Y-142.494 | |
| 395 | X157.480Y-136.500 | |
| 396 | X157.480Y-138.481 | |
| 397 | X157.480Y-140.487 | |
| 398 | X157.480Y-142.494 | |
| 385 | 399 | T3 |
| 386 | X7.990Y4.448 | |
| 387 | X7.991Y4.546 | |
| 388 | X8.090Y4.448 | |
| 389 | X8.091Y4.546 | |
| 390 | X8.190Y4.450 | |
| 391 | X8.191Y4.546 | |
| 392 | X8.290Y4.448 | |
| 393 | X8.291Y4.546 | |
| 394 | X9.369Y5.307 | |
| 395 | X9.369Y5.386 | |
| 396 | X9.369Y5.464 | |
| 397 | X9.369Y5.543 | |
| 398 | X9.369Y5.622 | |
| 399 | X9.369Y5.701 | |
| 400 | X9.369Y5.779 | |
| 401 | X9.369Y5.858 | |
| 402 | X9.369Y5.937 | |
| 403 | X9.369Y6.016 | |
| 404 | X9.369Y6.094 | |
| 405 | X9.369Y6.173 | |
| 406 | X9.369Y6.252 | |
| 407 | X9.369Y6.331 | |
| 408 | X9.369Y6.409 | |
| 409 | X9.369Y6.488 | |
| 410 | X9.369Y6.567 | |
| 411 | X9.369Y6.646 | |
| 412 | X9.369Y6.724 | |
| 413 | X9.369Y6.803 | |
| 414 | X9.448Y5.307 | |
| 415 | X9.448Y5.386 | |
| 416 | X9.448Y5.464 | |
| 417 | X9.448Y5.543 | |
| 418 | X9.448Y5.622 | |
| 419 | X9.448Y5.701 | |
| 420 | X9.448Y5.779 | |
| 421 | X9.448Y5.858 | |
| 422 | X9.448Y5.937 | |
| 423 | X9.448Y6.016 | |
| 424 | X9.448Y6.094 | |
| 425 | X9.448Y6.173 | |
| 426 | X9.448Y6.252 | |
| 427 | X9.448Y6.331 | |
| 428 | X9.448Y6.409 | |
| 429 | X9.448Y6.488 | |
| 430 | X9.448Y6.567 | |
| 431 | X9.448Y6.646 | |
| 432 | X9.448Y6.724 | |
| 433 | X9.448Y6.803 | |
| 400 | X202.946Y-112.979 | |
| 401 | X202.971Y-115.468 | |
| 402 | X205.486Y-112.979 | |
| 403 | X205.511Y-115.468 | |
| 404 | X208.026Y-113.030 | |
| 405 | X208.051Y-115.468 | |
| 406 | X210.566Y-112.979 | |
| 407 | X210.591Y-115.468 | |
| 408 | X237.973Y-134.798 | |
| 409 | X237.973Y-136.804 | |
| 410 | X237.973Y-138.786 | |
| 411 | X237.973Y-140.792 | |
| 412 | X237.973Y-142.799 | |
| 413 | X237.973Y-144.805 | |
| 414 | X237.973Y-146.787 | |
| 415 | X237.973Y-148.793 | |
| 416 | X237.973Y-150.800 | |
| 417 | X237.973Y-152.806 | |
| 418 | X237.973Y-154.788 | |
| 419 | X237.973Y-156.794 | |
| 420 | X237.973Y-158.801 | |
| 421 | X237.973Y-160.807 | |
| 422 | X237.973Y-162.789 | |
| 423 | X237.973Y-164.795 | |
| 424 | X237.973Y-166.802 | |
| 425 | X237.973Y-168.808 | |
| 426 | X237.973Y-170.790 | |
| 427 | X237.973Y-172.796 | |
| 428 | X239.979Y-134.798 | |
| 429 | X239.979Y-136.804 | |
| 430 | X239.979Y-138.786 | |
| 431 | X239.979Y-140.792 | |
| 432 | X239.979Y-142.799 | |
| 433 | X239.979Y-144.805 | |
| 434 | X239.979Y-146.787 | |
| 435 | X239.979Y-148.793 | |
| 436 | X239.979Y-150.800 | |
| 437 | X239.979Y-152.806 | |
| 438 | X239.979Y-154.788 | |
| 439 | X239.979Y-156.794 | |
| 440 | X239.979Y-158.801 | |
| 441 | X239.979Y-160.807 | |
| 442 | X239.979Y-162.789 | |
| 443 | X239.979Y-164.795 | |
| 444 | X239.979Y-166.802 | |
| 445 | X239.979Y-168.808 | |
| 446 | X239.979Y-170.790 | |
| 447 | X239.979Y-172.796 | |
| 434 | 448 | T4 |
| 435 | X7.335Y4.469 | |
| 436 | X7.650Y4.469 | |
| 449 | X186.309Y-113.513 | |
| 450 | X194.310Y-113.513 | |
| 437 | 451 | T5 |
| 438 | X6.505Y4.921 | |
| 439 | X6.505Y5.098 | |
| 440 | X8.456Y7.385 | |
| 441 | X8.633Y7.385 | |
| 442 | X8.886Y7.394 | |
| 443 | X9.063Y7.394 | |
| 452 | X155.699Y-123.599 | |
| 453 | X155.699Y-128.095 | |
| 454 | X214.782Y-187.574 | |
| 455 | X219.278Y-187.574 | |
| 456 | X225.715Y-187.797 | |
| 457 | X230.210Y-187.797 | |
| 444 | 458 | T6 |
| 445 | X6.496Y5.319 | |
| 446 | X6.582Y4.553 | |
| 447 | X6.596Y5.319 | |
| 448 | X6.755Y4.553 | |
| 449 | X8.405Y4.452 | |
| 450 | X8.405Y4.552 | |
| 459 | X155.499Y-133.701 | |
| 460 | X158.039Y-133.701 | |
| 461 | X167.183Y-115.646 | |
| 462 | X171.577Y-115.646 | |
| 463 | X213.487Y-113.081 | |
| 464 | X213.487Y-115.621 | |
| 451 | 465 | T7 |
| 452 | X6.603Y4.871 | |
| 453 | X6.603Y5.147 | |
| 454 | X8.406Y7.287 | |
| 455 | X8.682Y7.287 | |
| 456 | X8.836Y7.296 | |
| 457 | X9.112Y7.296 | |
| 466 | X158.189Y-122.329 | |
| 467 | X158.189Y-129.339 | |
| 468 | X213.512Y-185.085 | |
| 469 | X220.523Y-185.085 | |
| 470 | X224.445Y-185.308 | |
| 471 | X231.455Y-185.308 | |
| 458 | 472 | T8 |
| 459 | X6.589Y7.343 | |
| 460 | X6.847Y4.987 | |
| 461 | X8.567Y4.715 | |
| 462 | X8.717Y4.565 | |
| 463 | X8.717Y4.815 | |
| 464 | X9.380Y4.494 | |
| 465 | X9.381Y7.342 | |
| 473 | X158.775Y-114.699 | |
| 474 | X158.847Y-186.108 | |
| 475 | X217.602Y-119.761 | |
| 476 | X221.412Y-115.951 | |
| 477 | X221.412Y-122.301 | |
| 478 | X238.252Y-114.148 | |
| 479 | X238.277Y-186.487 | |
| 466 | 480 | T0 |
| 467 | 481 | M30 |
| binaries/reflash/Makefile | ||
|---|---|---|
| 2 | 2 | # Written 2010, by Xiangfu Liu. |
| 3 | 3 | # |
| 4 | 4 | |
| 5 | LOADER=openwrt-xburst-qi_lb60-u-boot.bin | |
| 6 | KERNEL=openwrt-xburst-qi_lb60-uImage.bin | |
| 7 | ROOTFS_UBI=openwrt-xburst-qi_lb60-root.ubi | |
| 8 | ROOTFS_UBIFS =openwrt-xburst-qi_lb60-root.ubifs | |
| 9 | ROOTFS_TGZ=openwrt-xburst-qi_lb60-rootfs.tar.gz | |
| 5 | LOADER = openwrt-xburst-qi_lb60-u-boot.bin | |
| 6 | KERNEL = openwrt-xburst-qi_lb60-uImage.bin | |
| 7 | ROOTFS_UBI = openwrt-xburst-qi_lb60-root.ubi | |
| 8 | ROOTFS_UBIFS = openwrt-xburst-qi_lb60-root.ubifs | |
| 9 | ROOTFS_TGZ = openwrt-xburst-qi_lb60-rootfs.tar.gz | |
| 10 | 10 | |
| 11 | 11 | QI_IMAGE_URL=http://downloads.qi-hardware.com/software/images/Ben_NanoNote_2GB_NAND/latest/ |
| 12 | 12 | QI_MIRKO_URL=http://downloads.qi-hardware.com/people/mirko/testing/ |
| lm32/logic/sakc/firmware/boot0-serial/Makefile | ||
|---|---|---|
| 30 | 30 | |
| 31 | 31 | image.bin: image |
| 32 | 32 | $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.bin |
| 33 | $(LM32_OBJCOPY) $(SEGMENTS) -O binary image image_bin.bin | |
| 33 | 34 | |
| 34 | 35 | image.srec: image image.lst |
| 35 | 36 | $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec |
| lm32/logic/sakc/firmware/boot0-serial/image.lst | ||
|---|---|---|
| 1 | ||
| 2 | image: file format elf32-lm32 | |
| 3 | ||
| 4 | Sections: | |
| 5 | Idx Name Size VMA LMA File off Algn | |
| 6 | 0 .text 00000270 00000000 00000000 00000054 2**2 | |
| 7 | CONTENTS, ALLOC, LOAD, CODE | |
| 8 | 1 .rodata 0000001c 00000270 00000270 000002c4 2**2 | |
| 9 | CONTENTS, ALLOC, LOAD, READONLY, DATA | |
| 10 | 2 .data 0000000c 0000028c 0000028c 000002e0 2**2 | |
| 11 | CONTENTS, ALLOC, LOAD, DATA | |
| 12 | 3 .bss 00000004 00000298 00000298 000002ec 2**2 | |
| 13 | ALLOC | |
| 14 | 4 .debug_abbrev 00000219 00000000 00000000 000002ec 2**0 | |
| 15 | CONTENTS, READONLY, DEBUGGING | |
| 16 | 5 .debug_info 000003d0 00000000 00000000 00000505 2**0 | |
| 17 | CONTENTS, READONLY, DEBUGGING | |
| 18 | 6 .debug_line 000002d8 00000000 00000000 000008d5 2**0 | |
| 19 | CONTENTS, READONLY, DEBUGGING | |
| 20 | 7 .debug_frame 000000a0 00000000 00000000 00000bb0 2**2 | |
| 21 | CONTENTS, READONLY, DEBUGGING | |
| 22 | 8 .debug_loc 000000fb 00000000 00000000 00000c50 2**0 | |
| 23 | CONTENTS, READONLY, DEBUGGING | |
| 24 | 9 .debug_pubnames 000000bc 00000000 00000000 00000d4b 2**0 | |
| 25 | CONTENTS, READONLY, DEBUGGING | |
| 26 | 10 .debug_aranges 00000040 00000000 00000000 00000e07 2**0 | |
| 27 | CONTENTS, READONLY, DEBUGGING | |
| 28 | 11 .debug_ranges 00000018 00000000 00000000 00000e47 2**0 | |
| 29 | CONTENTS, READONLY, DEBUGGING | |
| 30 | 12 .debug_str 0000017b 00000000 00000000 00000e5f 2**0 | |
| 31 | CONTENTS, READONLY, DEBUGGING | |
| 32 | 13 .comment 00000011 00000000 00000000 00000fda 2**0 | |
| 33 | CONTENTS, READONLY | |
| 34 | ||
| 35 | Disassembly of section .text: | |
| 36 | ||
| 37 | 00000000 <_ftext>: | |
| 38 | 0: 98 00 00 00 xor r0,r0,r0 | |
| 39 | 4: d0 00 00 00 wcsr IE,r0 | |
| 40 | 8: 78 01 00 00 mvhi r1,0x0 | |
| 41 | c: 38 21 00 00 ori r1,r1,0x0 | |
| 42 | 10: d0 e1 00 00 wcsr EBA,r1 | |
| 43 | 14: f8 00 00 03 calli 20 <_crt0> | |
| 44 | 18: 34 00 00 00 nop | |
| 45 | 1c: 34 00 00 00 nop | |
| 46 | ||
| 47 | 00000020 <_crt0>: | |
| 48 | 20: 78 1c 00 00 mvhi sp,0x0 | |
| 49 | 24: 3b 9c 0f fc ori sp,sp,0xffc | |
| 50 | 28: 78 1a 00 00 mvhi gp,0x0 | |
| 51 | 2c: 3b 5a 02 a0 ori gp,gp,0x2a0 | |
| 52 | 30: 78 01 00 00 mvhi r1,0x0 | |
| 53 | 34: 38 21 02 98 ori r1,r1,0x298 | |
| 54 | 38: 78 03 00 00 mvhi r3,0x0 | |
| 55 | 3c: 38 63 02 9c ori r3,r3,0x29c | |
| 56 | ||
| 57 | 00000040 <.clearBSS>: | |
| 58 | 40: 44 23 00 04 be r1,r3,50 <.callMain> | |
| 59 | 44: 58 20 00 00 sw (r1+0),r0 | |
| 60 | 48: 34 21 00 04 addi r1,r1,4 | |
| 61 | 4c: e3 ff ff fd bi 40 <.clearBSS> | |
| 62 | ||
| 63 | 00000050 <.callMain>: | |
| 64 | 50: 34 01 00 00 mvi r1,0 | |
| 65 | 54: 34 02 00 00 mvi r2,0 | |
| 66 | 58: 34 03 00 00 mvi r3,0 | |
| 67 | 5c: f8 00 00 1d calli d0 <main> | |
| 68 | ||
| 69 | 00000060 <irq_enable>: | |
| 70 | 60: 34 01 00 01 mvi r1,1 | |
| 71 | 64: d0 01 00 00 wcsr IE,r1 | |
| 72 | 68: c3 a0 00 00 ret | |
| 73 | ||
| 74 | 0000006c <irq_mask>: | |
| 75 | 6c: 34 01 00 0f mvi r1,15 | |
| 76 | 70: d0 21 00 00 wcsr IM,r1 | |
| 77 | 74: c3 a0 00 00 ret | |
| 78 | ||
| 79 | 00000078 <irq_disable>: | |
| 80 | 78: 34 01 00 00 mvi r1,0 | |
| 81 | 7c: d0 01 00 00 wcsr IE,r1 | |
| 82 | 80: c3 a0 00 00 ret | |
| 83 | ||
| 84 | 00000084 <jump>: | |
| 85 | 84: c0 20 00 00 b r1 | |
| 86 | ||
| 87 | 00000088 <halt>: | |
| 88 | 88: e0 00 00 00 bi 88 <halt> | |
| 89 | ||
| 90 | 0000008c <read_uint32>: | |
| 91 | */ | |
| 92 | #include "soc-hw.h" | |
| 93 | ||
| 94 | /* prototypes */ | |
| 95 | uint32_t read_uint32() | |
| 96 | { | |
| 97 | 8c: 37 9c ff f8 addi sp,sp,-8 | |
| 98 | 90: 5b 8b 00 08 sw (sp+8),r11 | |
| 99 | 94: 5b 9d 00 04 sw (sp+4),ra | |
| 100 | uint32_t val = 0, i; | |
| 101 | ||
| 102 | for (i = 0; i < 4; i++) { | |
| 103 | val <<= 8; | |
| 104 | val += (uint8_t)uart_getchar(); | |
| 105 | 98: f8 00 00 57 calli 1f4 <uart_getchar> | |
| 106 | uint32_t read_uint32() | |
| 107 | { | |
| 108 | uint32_t val = 0, i; | |
| 109 | ||
| 110 | for (i = 0; i < 4; i++) { | |
| 111 | val <<= 8; | |
| 112 | 9c: 3c 2b 00 08 sli r11,r1,8 | |
| 113 | val += (uint8_t)uart_getchar(); | |
| 114 | a0: f8 00 00 55 calli 1f4 <uart_getchar> | |
| 115 | a4: b5 61 08 00 add r1,r11,r1 | |
| 116 | uint32_t read_uint32() | |
| 117 | { | |
| 118 | uint32_t val = 0, i; | |
| 119 | ||
| 120 | for (i = 0; i < 4; i++) { | |
| 121 | val <<= 8; | |
| 122 | a8: 3c 2b 00 08 sli r11,r1,8 | |
| 123 | val += (uint8_t)uart_getchar(); | |
| 124 | ac: f8 00 00 52 calli 1f4 <uart_getchar> | |
| 125 | b0: b5 61 08 00 add r1,r11,r1 | |
| 126 | uint32_t read_uint32() | |
| 127 | { | |
| 128 | uint32_t val = 0, i; | |
| 129 | ||
| 130 | for (i = 0; i < 4; i++) { | |
| 131 | val <<= 8; | |
| 132 | b4: 3c 2b 00 08 sli r11,r1,8 | |
| 133 | val += (uint8_t)uart_getchar(); | |
| 134 | b8: f8 00 00 4f calli 1f4 <uart_getchar> | |
| 135 | } | |
| 136 | ||
| 137 | return val; | |
| 138 | } | |
| 139 | bc: b5 61 08 00 add r1,r11,r1 | |
| 140 | c0: 2b 9d 00 04 lw ra,(sp+4) | |
| 141 | c4: 2b 8b 00 08 lw r11,(sp+8) | |
| 142 | c8: 37 9c 00 08 addi sp,sp,8 | |
| 143 | cc: c3 a0 00 00 ret | |
| 144 | ||
| 145 | 000000d0 <main>: | |
| 146 | ||
| 147 | int main(int argc, char **argv) | |
| 148 | { | |
| 149 | d0: 37 9c ff e4 addi sp,sp,-28 | |
| 150 | d4: 5b 8b 00 1c sw (sp+28),r11 | |
| 151 | d8: 5b 8c 00 18 sw (sp+24),r12 | |
| 152 | dc: 5b 8d 00 14 sw (sp+20),r13 | |
| 153 | e0: 5b 8e 00 10 sw (sp+16),r14 | |
| 154 | e4: 5b 8f 00 0c sw (sp+12),r15 | |
| 155 | e8: 5b 90 00 08 sw (sp+8),r16 | |
| 156 | ec: 5b 9d 00 04 sw (sp+4),ra | |
| 157 | int8_t *p; | |
| 158 | uint8_t c; | |
| 159 | ||
| 160 | // Initialize UART | |
| 161 | uart_init(); | |
| 162 | f0: f8 00 00 40 calli 1f0 <uart_init> | |
| 163 | ||
| 164 | c = '*'; // print msg on first iteration | |
| 165 | for(;;) { | |
| 166 | uint32_t start, size; | |
| 167 | ||
| 168 | switch (c) { | |
| 169 | f4: 34 0d 00 67 mvi r13,103 | |
| 170 | { | |
| 171 | int8_t *p; | |
| 172 | uint8_t c; | |
| 173 | ||
| 174 | // Initialize UART | |
| 175 | uart_init(); | |
| 176 | f8: 34 01 00 2a mvi r1,42 | |
| 177 | ||
| 178 | c = '*'; // print msg on first iteration | |
| 179 | for(;;) { | |
| 180 | uint32_t start, size; | |
| 181 | ||
| 182 | switch (c) { | |
| 183 | fc: 34 0e 00 75 mvi r14,117 | |
| 184 | 100: 34 0f 00 64 mvi r15,100 | |
| 185 | case 'g': // goto | |
| 186 | start = read_uint32(); | |
| 187 | jump(start); | |
| 188 | break; | |
| 189 | default: | |
| 190 | uart_putstr("**SAKC/bootloader** > \r\n"); | |
| 191 | 104: 78 10 00 00 mvhi r16,0x0 | |
| 192 | ||
| 193 | c = '*'; // print msg on first iteration | |
| 194 | for(;;) { | |
| 195 | uint32_t start, size; | |
| 196 | ||
| 197 | switch (c) { | |
| 198 | 108: 44 2d 00 08 be r1,r13,128 <main+0x58> | |
| 199 | 10c: 44 2e 00 16 be r1,r14,164 <main+0x94> | |
| 200 | 110: 44 2f 00 0a be r1,r15,138 <main+0x68> | |
| 201 | case 'g': // goto | |
| 202 | start = read_uint32(); | |
| 203 | jump(start); | |
| 204 | break; | |
| 205 | default: | |
| 206 | uart_putstr("**SAKC/bootloader** > \r\n"); | |
| 207 | 114: ba 00 08 00 mv r1,r16 | |
| 208 | 118: 38 21 02 70 ori r1,r1,0x270 | |
| 209 | 11c: f8 00 00 48 calli 23c <uart_putstr> | |
| 210 | break; | |
| 211 | }; | |
| 212 | c = uart_getchar(); | |
| 213 | 120: f8 00 00 35 calli 1f4 <uart_getchar> | |
| 214 | ||
| 215 | c = '*'; // print msg on first iteration | |
| 216 | for(;;) { | |
| 217 | uint32_t start, size; | |
| 218 | ||
| 219 | switch (c) { | |
| 220 | 124: 5c 2d ff fa bne r1,r13,10c <main+0x3c> | |
| 221 | size = read_uint32(); | |
| 222 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 223 | uart_putchar( *p ); | |
| 224 | break; | |
| 225 | case 'g': // goto | |
| 226 | start = read_uint32(); | |
| 227 | 128: fb ff ff d9 calli 8c <read_uint32> | |
| 228 | jump(start); | |
| 229 | 12c: fb ff ff d6 calli 84 <jump> | |
| 230 | break; | |
| 231 | default: | |
| 232 | uart_putstr("**SAKC/bootloader** > \r\n"); | |
| 233 | break; | |
| 234 | }; | |
| 235 | c = uart_getchar(); | |
| 236 | 130: f8 00 00 31 calli 1f4 <uart_getchar> | |
| 237 | 134: e3 ff ff fc bi 124 <main+0x54> | |
| 238 | size = read_uint32(); | |
| 239 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 240 | *p = uart_getchar(); | |
| 241 | break; | |
| 242 | case 'd': // download | |
| 243 | start = read_uint32(); | |
| 244 | 138: fb ff ff d5 calli 8c <read_uint32> | |
| 245 | size = read_uint32(); | |
| 246 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 247 | 13c: b8 20 58 00 mv r11,r1 | |
| 248 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 249 | *p = uart_getchar(); | |
| 250 | break; | |
| 251 | case 'd': // download | |
| 252 | start = read_uint32(); | |
| 253 | size = read_uint32(); | |
| 254 | 140: fb ff ff d3 calli 8c <read_uint32> | |
| 255 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 256 | 144: b5 61 60 00 add r12,r11,r1 | |
| 257 | 148: 51 6c ff f6 bgeu r11,r12,120 <main+0x50> | |
| 258 | uart_putchar( *p ); | |
| 259 | 14c: 41 61 00 00 lbu r1,(r11+0) | |
| 260 | *p = uart_getchar(); | |
| 261 | break; | |
| 262 | case 'd': // download | |
| 263 | start = read_uint32(); | |
| 264 | size = read_uint32(); | |
| 265 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 266 | 150: 35 6b 00 01 addi r11,r11,1 | |
| 267 | uart_putchar( *p ); | |
| 268 | 154: f8 00 00 31 calli 218 <uart_putchar> | |
| 269 | *p = uart_getchar(); | |
| 270 | break; | |
| 271 | case 'd': // download | |
| 272 | start = read_uint32(); | |
| 273 | size = read_uint32(); | |
| 274 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 275 | 158: 55 8b ff fd bgu r12,r11,14c <main+0x7c> | |
| 276 | break; | |
| 277 | default: | |
| 278 | uart_putstr("**SAKC/bootloader** > \r\n"); | |
| 279 | break; | |
| 280 | }; | |
| 281 | c = uart_getchar(); | |
| 282 | 15c: f8 00 00 26 calli 1f4 <uart_getchar> | |
| 283 | 160: e3 ff ff f1 bi 124 <main+0x54> | |
| 284 | for(;;) { | |
| 285 | uint32_t start, size; | |
| 286 | ||
| 287 | switch (c) { | |
| 288 | case 'u': // upload | |
| 289 | start = read_uint32(); | |
| 290 | 164: fb ff ff ca calli 8c <read_uint32> | |
| 291 | size = read_uint32(); | |
| 292 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 293 | 168: b8 20 58 00 mv r11,r1 | |
| 294 | uint32_t start, size; | |
| 295 | ||
| 296 | switch (c) { | |
| 297 | case 'u': // upload | |
| 298 | start = read_uint32(); | |
| 299 | size = read_uint32(); | |
| 300 | 16c: fb ff ff c8 calli 8c <read_uint32> | |
| 301 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 302 | 170: b5 61 60 00 add r12,r11,r1 | |
| 303 | 174: 51 6c ff eb bgeu r11,r12,120 <main+0x50> | |
| 304 | *p = uart_getchar(); | |
| 305 | 178: f8 00 00 1f calli 1f4 <uart_getchar> | |
| 306 | 17c: 31 61 00 00 sb (r11+0),r1 | |
| 307 | ||
| 308 | switch (c) { | |
| 309 | case 'u': // upload | |
| 310 | start = read_uint32(); | |
| 311 | size = read_uint32(); | |
| 312 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
| 313 | 180: 35 6b 00 01 addi r11,r11,1 | |
| 314 | 184: 55 8b ff fd bgu r12,r11,178 <main+0xa8> | |
| 315 | break; | |
| 316 | default: | |
| 317 | uart_putstr("**SAKC/bootloader** > \r\n"); | |
| 318 | break; | |
| 319 | }; | |
| 320 | c = uart_getchar(); | |
| 321 | 188: f8 00 00 1b calli 1f4 <uart_getchar> | |
| 322 | 18c: e3 ff ff e6 bi 124 <main+0x54> | |
| 323 | ||
| 324 | 00000190 <sleep>: | |
| 325 | void sleep(int msec) | |
| 326 | { | |
| 327 | uint32_t tcr; | |
| 328 | ||
| 329 | // Use timer0.1 | |
| 330 | timer0->compare1 = (FCPU/1000)*msec; | |
| 331 | 190: 78 02 00 00 mvhi r2,0x0 | |
| 332 | 194: 38 42 02 90 ori r2,r2,0x290 | |
| 333 | 198: 38 03 c3 50 mvu r3,0xc350 | |
| 334 | 19c: 28 42 00 00 lw r2,(r2+0) | |
| 335 | 1a0: 88 23 08 00 mul r1,r1,r3 | |
| 336 | 1a4: 58 41 00 10 sw (r2+16),r1 | |
| 337 | timer0->counter1 = 0; | |
| 338 | 1a8: 34 01 00 00 mvi r1,0 | |
| 339 | 1ac: 58 41 00 14 sw (r2+20),r1 | |
| 340 | timer0->tcr1 = TIMER_EN | TIMER_IRQEN; | |
| 341 | 1b0: 34 01 00 0a mvi r1,10 | |
| 342 | 1b4: 58 41 00 0c sw (r2+12),r1 | |
| 343 | ||
| 344 | do { | |
| 345 | //halt(); | |
| 346 | tcr = timer0->tcr1; | |
| 347 | 1b8: 28 41 00 0c lw r1,(r2+12) | |
| 348 | } while ( ! (tcr & TIMER_TRIG) ); | |
| 349 | 1bc: 20 21 00 01 andi r1,r1,0x1 | |
| 350 | 1c0: 44 20 ff fe be r1,r0,1b8 <sleep+0x28> | |
| 351 | } | |
| 352 | 1c4: c3 a0 00 00 ret | |
| 353 | ||
| 354 | 000001c8 <tic_init>: | |
| 355 | ||
| 356 | void tic_init() | |
| 357 | { | |
| 358 | // Setup timer0.0 | |
| 359 | timer0->compare0 = (FCPU/1000); | |
| 360 | 1c8: 78 01 00 00 mvhi r1,0x0 | |
| 361 | 1cc: 38 21 02 90 ori r1,r1,0x290 | |
| 362 | 1d0: 28 21 00 00 lw r1,(r1+0) | |
| 363 | 1d4: 38 02 c3 50 mvu r2,0xc350 | |
| 364 | 1d8: 58 22 00 04 sw (r1+4),r2 | |
| 365 | timer0->counter0 = 0; | |
| 366 | 1dc: 34 02 00 00 mvi r2,0 | |
| 367 | 1e0: 58 22 00 08 sw (r1+8),r2 | |
| 368 | timer0->tcr0 = TIMER_EN | TIMER_AR | TIMER_IRQEN; | |
| 369 | 1e4: 34 02 00 0e mvi r2,14 | |
| 370 | 1e8: 58 22 00 00 sw (r1+0),r2 | |
| 371 | } | |
| 372 | 1ec: c3 a0 00 00 ret | |
| 373 | ||
| 374 | 000001f0 <uart_init>: | |
| 375 | //uart0->lcr = 0x03; // Line Control Register: 8N1 | |
| 376 | //uart0->mcr = 0x00; // Modem Control Register | |
| 377 | ||
| 378 | // Setup Divisor register (Fclk / Baud) | |
| 379 | //uart0->div = (FCPU/(57600*16)); | |
| 380 | } | |
| 381 | 1f0: c3 a0 00 00 ret | |
| 382 | ||
| 383 | 000001f4 <uart_getchar>: | |
| 384 | ||
| 385 | char uart_getchar() | |
| 386 | { | |
| 387 | 1f4: 78 01 00 00 mvhi r1,0x0 | |
| 388 | 1f8: 38 21 02 8c ori r1,r1,0x28c | |
| 389 | 1fc: 28 22 00 00 lw r2,(r1+0) | |
| 390 | while (! (uart0->ucr & UART_DR)) ; | |
| 391 | 200: 28 41 00 00 lw r1,(r2+0) | |
| 392 | 204: 20 21 00 01 andi r1,r1,0x1 | |
| 393 | 208: 44 20 ff fe be r1,r0,200 <uart_getchar+0xc> | |
| 394 | return uart0->rxtx; | |
| 395 | 20c: 28 41 00 04 lw r1,(r2+4) | |
| 396 | } | |
| 397 | 210: 20 21 00 ff andi r1,r1,0xff | |
| 398 | 214: c3 a0 00 00 ret | |
| 399 | ||
| 400 | 00000218 <uart_putchar>: | |
| 401 | ||
| 402 | void uart_putchar(char c) | |
| 403 | { | |
| 404 | 218: 78 02 00 00 mvhi r2,0x0 | |
| 405 | 21c: 38 42 02 8c ori r2,r2,0x28c | |
| 406 | 220: 28 43 00 00 lw r3,(r2+0) | |
| 407 | 224: 20 21 00 ff andi r1,r1,0xff | |
| 408 | while (uart0->ucr & UART_BUSY) ; | |
| 409 | 228: 28 62 00 00 lw r2,(r3+0) | |
| 410 | 22c: 20 42 00 10 andi r2,r2,0x10 | |
| 411 | 230: 5c 40 ff fe bne r2,r0,228 <uart_putchar+0x10> | |
| 412 | uart0->rxtx = c; | |
| 413 | 234: 58 61 00 04 sw (r3+4),r1 | |
| 414 | } | |
| 415 | 238: c3 a0 00 00 ret | |
| 416 | ||
| 417 | 0000023c <uart_putstr>: | |
| 418 | ||
| 419 | void uart_putstr(char *str) | |
| 420 | { | |
| 421 | char *c = str; | |
| 422 | while(*c) { | |
| 423 | 23c: 40 24 00 00 lbu r4,(r1+0) | |
| 424 | 240: 44 80 00 0b be r4,r0,26c <uart_putstr+0x30> | |
| 425 | 244: 78 02 00 00 mvhi r2,0x0 | |
| 426 | 248: 38 42 02 8c ori r2,r2,0x28c | |
| 427 | 24c: 28 43 00 00 lw r3,(r2+0) | |
| 428 | return uart0->rxtx; | |
| 429 | } | |
| 430 | ||
| 431 | void uart_putchar(char c) | |
| 432 | { | |
| 433 | while (uart0->ucr & UART_BUSY) ; | |
| 434 | 250: 28 62 00 00 lw r2,(r3+0) | |
| 435 | 254: 20 42 00 10 andi r2,r2,0x10 | |
| 436 | 258: 5c 40 ff fe bne r2,r0,250 <uart_putstr+0x14> | |
| 437 | uart0->rxtx = c; | |
| 438 | 25c: 58 64 00 04 sw (r3+4),r4 | |
| 439 | void uart_putstr(char *str) | |
| 440 | { | |
| 441 | char *c = str; | |
| 442 | while(*c) { | |
| 443 | uart_putchar(*c); | |
| 444 | c++; | |
| 445 | 260: 34 21 00 01 addi r1,r1,1 | |
| 446 | } | |
| 447 | ||
| 448 | void uart_putstr(char *str) | |
| 449 | { | |
| 450 | char *c = str; | |
| 451 | while(*c) { | |
| 452 | 264: 40 24 00 00 lbu r4,(r1+0) | |
| 453 | 268: 5c 82 ff fa bne r4,r2,250 <uart_putstr+0x14> | |
| 454 | 26c: c3 a0 00 00 ret | |
| lm32/logic/sakc/firmware/boot0-serial/image.srec | ||
|---|---|---|
| 1 | S00D0000696D6167652E7372656314 | |
| 2 | S113000098000000D00000007801000038210000B2 | |
| 3 | S1130010D0E10000F80000033400000034000000C8 | |
| 4 | S1130020781C00003B9C0FFC781A00003B5A02A08D | |
| 5 | S11300307801000038210298780300003863029C9C | |
| 6 | S1130040442300045820000034210004E3FFFFFD92 | |
| 7 | S1130050340100003402000034030000F800001DE5 | |
| 8 | S113006034010001D0010000C3A000003401000FDE | |
| 9 | S1130070D0210000C3A0000034010000D001000022 | |
| 10 | S1130080C3A00000C0200000E0000000379CFFF87F | |
| 11 | S11300905B8B00085B9D0004F80000573C2B0008B4 | |
| 12 | S11300A0F8000055B56108003C2B0008F800005228 | |
| 13 | S11300B0B56108003C2B0008F800004FB56108004A | |
| 14 | S11300C02B9D00042B8B0008379C0008C3A0000064 | |
| 15 | S11300D0379CFFE45B8B001C5B8C00185B8D001469 | |
| 16 | S11300E05B8E00105B8F000C5B9000085B9D00042E | |
| 17 | S11300F0F8000040340D00673401002A340E007506 | |
| 18 | S1130100340F006478100000442D0008442E0016BB | |
| 19 | S1130110442F000ABA00080038210270F800004891 | |
| 20 | S1130120F80000355C2DFFFAFBFFFFD9FBFFFFD67B | |
| 21 | S1130130F8000031E3FFFFFCFBFFFFD5B8205800B7 | |
| 22 | S1130140FBFFFFD3B5616000516CFFF64161000015 | |
| 23 | S1130150356B0001F8000031558BFFFDF8000026D7 | |
| 24 | S1130160E3FFFFF1FBFFFFCAB8205800FBFFFFC805 | |
| 25 | S1130170B5616000516CFFEBF800001F31610000B5 | |
| 26 | S1130180356B0001558BFFFDF800001BE3FFFFE614 | |
| 27 | S113019078020000384202903803C350284200001D | |
| 28 | S11301A0882308005841001034010000584100140D | |
| 29 | S11301B03401000A5841000C2841000C20210001A0 | |
| 30 | S11301C04420FFFEC3A00000780100003821029003 | |
| 31 | S11301D0282100003802C3505822000434020000D1 | |
| 32 | S11301E0582200083402000E58220000C3A0000068 | |
| 33 | S11301F0C3A00000780100003821028C28220000EE | |
| 34 | S113020028410000202100014420FFFE2841000471 | |
| 35 | S1130210202100FFC3A00000780200003842028CB5 | |
| 36 | S113022028430000202100FF286200002042001023 | |
| 37 | S11302305C40FFFE58610004C3A00000402400009D | |
| 38 | S11302404480000B780200003842028C28430000EE | |
| 39 | S113025028620000204200105C40FFFE5864000445 | |
| 40 | S113026034210001402400005C82FFFAC3A0000096 | |
| 41 | S11302702A2A53414B432F626F6F746C6F6164651C | |
| 42 | S10F0280722A2A203E200D0A0000000013 | |
| 43 | S10F028CF0000000F0010000F00200008F | |
| 44 | S9030000FC | |
| lm32/logic/sakc/system_tb.v | ||
|---|---|---|
| 52 | 52 | |
| 53 | 53 | $dumpfile("system_tb.vcd"); |
| 54 | 54 | //$monitor("%b,%b,%b,%b",clk,rst,uart_txd,uart_rxd); |
| 55 | // $dumpvars(-1, dut); | |
| 56 | $dumpvars(-1,clk,rst,uart_txd,uart_rxd); | |
| 55 | $dumpvars(-1, dut); | |
| 56 | //$dumpvars(-1,clk,rst,uart_txd,uart_rxd); | |
| 57 | 57 | // reset |
| 58 | 58 | #0 rst <= 0; |
| 59 | 59 | #80 rst <= 1; |
| plasma/bootldr/bootldr.c | ||
|---|---|---|
| 239 | 239 | } |
| 240 | 240 | break; |
| 241 | 241 | case 0x3c: //raw test.bin file |
| 242 | ptr1 = (unsigned char*)0x10000000; | |
| 242 | ptr1 = (unsigned char*)0xE00; | |
| 243 | 243 | for(i = 0; i < 1024*1024; ++i) |
| 244 | 244 | { |
| 245 | 245 | ptr1[i] = (unsigned char)ch; |
| ... | ... | |
| 252 | 252 | break; //assume end of file |
| 253 | 253 | ch = getch(); |
| 254 | 254 | } |
| 255 | funcPtr = (FuncPtr)0x10000000; | |
| 255 | funcPtr = (FuncPtr)0xE00; | |
| 256 | 256 | funcPtr(); |
| 257 | 257 | break; |
| 258 | 258 | } |
| plasma/gpio/Makefile | ||
|---|---|---|
| 10 | 10 | OBJCOPY = $(CROSS)-objcopy |
| 11 | 11 | INC_PATH = ../include |
| 12 | 12 | CFLAGS = -O -I$(INC_PATH) -Wall -c -s |
| 13 | ILDFLAGS = -Ttext 0 -eentry -Map $@.map -s -N | |
| 13 | ILDFLAGS = -Ttext 0xE00 -eentry -Map $@.map -s -N | |
| 14 | 14 | LDFLAGS = -Ttext 0x10000000 -eentry -Map $@.map -s -N |
| 15 | 15 | |
| 16 | 16 | #Internal RAM 0x00 |
| plasma/logic/ram_image.vhd | ||
|---|---|---|
| 45 | 45 | INIT_01 => X"8f8f8f8f8f8f8f8f8f8f8f8f8f8f8f8f8f230c008c8c3caf00af00af2340afaf", |
| 46 | 46 | INIT_02 => X"acacacac0003373cac038cac8cac8cac8c243c40034040033423038f038f8f8f", |
| 47 | 47 | INIT_03 => X"000300ac0300000034038c8c8c8c8c8c8c8c8c8c8c8c3403acacacacacacacac", |
| 48 | INIT_04 => X"3c34ac343c34a42434a42434a42434a02434a02434a02434a02434a024343c27", | |
| 49 | INIT_05 => X"8cac343caf008c34a730009434a330009034af008ca730009434a3300090ac34", | |
| 50 | INIT_06 => X"008f300093af00008f8caf24008faf00343c8faf00008f300093af008c34af00", | |
| 51 | INIT_07 => X"30008c343c0008af0000008f8caf00000000008faf000000000000008faf0000", | |
| 52 | INIT_08 => X"2727038f8f8f0000140082260c82240c00142400100080afafaf270003ac3c10", | |
| 53 | INIT_09 => X"8f240caf2727038f8f8f8f021626240c2608240c00102c3002242400afafafaf", | |
| 54 | INIT_0A => X"8c001424ac00008c243c3c243c2703008f8c3c10000caf2730038c343c270300", | |
| 55 | INIT_0B => X"0000000000000000000000000000000000000000000000000000000000002403", | |
| 56 | INIT_0C => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 57 | INIT_0D => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 58 | INIT_0E => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 59 | INIT_0F => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 60 | INIT_10 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 61 | INIT_11 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 62 | INIT_12 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 63 | INIT_13 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 64 | INIT_14 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 65 | INIT_15 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 66 | INIT_16 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 67 | INIT_17 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 68 | INIT_18 => X"0000000000000000000000000000000000000000000000000000000000000000", | |
| 48 | INIT_04 => X"1c24001030008c24ac24ac9424003c00180003241c24a4248c0018ac2400003c", | |
| 49 | INIT_05 => X"a00024241028302400a03c24243c3c0003001030008cacac242400003c000300", | |
| 50 | INIT_06 => X"100010000c00102a0200260c24af08af2424240000afafafafaf270103001424", | |
| 51 | INIT_07 => X"240c001a001427038f8f8f8f8f8f8f02240c240c000824102c24142c24142e24", | |
| 52 | INIT_08 => X"008c34ac3c3c24240c3c240c3caf0cafafafafafafafafaf270008260c24240c", | |
| 53 | INIT_09 => X"3c240c3c240c3c240c3c3c3c3c3c3c003c3c0c003c240c3c3c1430248c3c1030", | |
| 54 | INIT_0A => X"0000142c2400000c240c3c270c260c260c260c260c240c3c240c3c240c3c240c", | |
| 55 | INIT_0B => X"000c000c00000c240c3c3c08240c3c000c000c8e0000008c0024003c3c102c26", | |
| 56 | INIT_0C => X"0200000010000c240c3c3c080002a208000c000c00000c240c3c0008923c08ae", | |
| 57 | INIT_0D => X"000010000c240c3c3c080216a002260c00000010000c240c3c3c080216260c90", | |
| 58 | INIT_0E => X"260c8c02240c3c00000010000c240c3c3c08240c000c000c0014002490020000", | |
| 59 | INIT_0F => X"120008a23c24003c08240c3c021402240c000c260c8c021032021002240c000c", | |
| 60 | INIT_10 => X"3c083c0c003c000c0014343c000c240c3c3c080000240016260c262610000c24", | |
| 61 | INIT_11 => X"008c343c3c08240c000c000c2608240c3c000c020c240c3c00000c240c3c020c", | |
| 62 | INIT_12 => X"82000c2682000c241400100082260c00240800100080afafaf270003ac001030", | |
| 63 | INIT_13 => X"038f8f8f8f0216260c2424142c3002242400afafafaf272703008f8f8f001400", | |
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| 195 | 195 | |
| 196 | 196 | RAMB16_S9_inst2 : RAMB16_S9 |
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| 273 | 273 | RAMB16_S9_inst3 : RAMB16_S9 |
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