Date:2010-10-15 19:59:46 (12 years 11 months ago)
Author:Carlos Camargo
Commit:43de1a582cae639ee5d44fafba2bccd110b9460f
Message:Fixing cai9n loader for lm32 errors

Files: lm32/logic/sakc/firmware/cain_loader/Makefile (1 diff)
lm32/logic/sakc/firmware/cain_loader/crt0ram.S (1 diff)
lm32/logic/sakc/firmware/cain_loader/image.ram (1 diff)
lm32/logic/sakc/firmware/cain_loader/linker.ld (1 diff)
lm32/logic/sakc/firmware/cain_loader/main.c (1 diff)
lm32/logic/sakc/firmware/cain_loader/soc-hw.c (1 diff)
lm32/logic/sakc/firmware/cain_loader/soc-hw.h (1 diff)
lm32/logic/sakc/firmware/cain_loader/xmodem.c (1 diff)
lm32/logic/sakc/firmware/loader_cain/Makefile (1 diff)
lm32/logic/sakc/firmware/loader_cain/crt0ram.S (1 diff)
lm32/logic/sakc/firmware/loader_cain/linker.ld (1 diff)
lm32/logic/sakc/firmware/loader_cain/main.c (1 diff)
lm32/logic/sakc/firmware/loader_cain/soc-hw.c (1 diff)
lm32/logic/sakc/firmware/loader_cain/soc-hw.h (1 diff)
lm32/logic/sakc/firmware/loader_cain/xmodem.c (1 diff)
lm32/logic/sakc/system.v (1 diff)

Change Details

lm32/logic/sakc/firmware/cain_loader/Makefile
1LM32_CC=lm32-elf-gcc
2LM32_LD=lm32-elf-ld
3LM32_OBJCOPY=lm32-elf-objcopy
4LM32_OBJDUMP=lm32-elf-objdump
5
6SREC2VRAM ?= ../../tools/srec2vram/srec2vram
7VRAMFILE=image.ram
8
9CFLAGS=-MMD -O2 -Wall -g -s -fomit-frame-pointer -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
10LDFLAGS=-nostdlib -nodefaultlibs -Tlinker.ld
11SEGMENTS = -j .text -j .rodata -j .data
12
13all: image.srec $(VRAMFILE)
14
15crt0ram.o: crt0ram.S
16    $(LM32_CC) $(CFLAGS) -c crt0ram.S
17
18main.o: main.c
19    $(LM32_CC) $(CFLAGS) -c main.c
20
21soc-hw.o: soc-hw.c
22    $(LM32_CC) $(CFLAGS) -c soc-hw.c
23
24xmodem.o: xmodem.c
25    $(LM32_CC) $(CFLAGS) -c xmodem.c
26
27image: crt0ram.o main.o soc-hw.o xmodem.o
28    $(LM32_LD) $(LDFLAGS) -Map image.map -N -o image crt0ram.o main.o soc-hw.o xmodem.o
29
30image.lst: image
31    $(LM32_OBJDUMP) -h -S $< > $@
32
33image.bin: image
34    $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.bin
35    $(LM32_OBJCOPY) $(SEGMENTS) -O binary image image_bin.bin
36
37image.srec: image image.lst
38    $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec
39
40$(VHDLFILE): image.srec
41    $(SREC2VHDL) image.srec > $(VHDLFILE)
42
43$(VRAMFILE): image.srec
44    $(SREC2VRAM) image.srec 0x00000000 0x1000 > $(VRAMFILE)
45
46clean:
47    rm -f image image.lst image.bin image.srec image.map *.o *.d *.bin
48
49DEPS := $(wildcard *.d)
50ifneq ($(DEPS),)
51include $(DEPS)
52endif
53
lm32/logic/sakc/firmware/cain_loader/crt0ram.S
1/*
2 * LatticeMico32 C startup code.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26/* Exception handlers - Must be 32 bytes long. */
27        .section .text, "ax", @progbits
28        .global _start
29        .global irq_enable, irq_disable, irq_mask, jump, halt
30_start:
31_reset_handler:
32    xor r0, r0, r0
33    wcsr IE, r0
34    mvhi r1, hi(_reset_handler)
35    ori r1, r1, lo(_reset_handler)
36    wcsr EBA, r1
37    calli _crt0
38    nop
39    nop
40
41_crt0:
42    /* Setup stack and global pointer */
43    mvhi sp, hi(_fstack)
44    ori sp, sp, lo(_fstack)
45    mvhi gp, hi(_gp)
46    ori gp, gp, lo(_gp)
47
48    /* Clear BSS */
49    mvhi r1, hi(_fbss)
50    ori r1, r1, lo(_fbss)
51    mvhi r3, hi(_ebss)
52    ori r3, r3, lo(_ebss)
53.clearBSS:
54    be r1, r3, .callMain
55    sw (r1+0), r0
56    addi r1, r1, 4
57    bi .clearBSS
58
59.callMain:
60    mvi r1, 0
61    mvi r2, 0
62    mvi r3, 0
63    calli main
64
65irq_enable:
66    mvi r1, 1
67    wcsr IE, r1
68    ret
69
70irq_mask:
71    mvi r1, 0x0000000f
72    wcsr IM, r1
73    ret
74
75irq_disable:
76    mvi r1, 0
77    wcsr IE, r1
78    ret
79
80jump:
81    b r1
82
83halt:
84    bi halt
85
lm32/logic/sakc/firmware/cain_loader/image.ram
198000000
2d0000000
378010000
438210000
5d0e10000
6f8000003
734000000
834000000
9781c0000
103b9c0ffc
11781a0000
123b5a0710
1378010000
1438210708
1578030000
163863070c
1744230004
1858200000
1934210004
20e3fffffd
2134010000
2234020000
2334030000
24f8000041
2534010001
26d0010000
27c3a00000
283401000f
29d0210000
30c3a00000
3134010000
32d0010000
33c3a00000
34c0200000
35e0000000
36379cfff8
375b8b0008
385b9d0004
39f800006e
403c2b0008
41f800006c
42b5610800
433c2b0008
44f8000069
45b5610800
463c2b0008
47f8000066
48b5610800
492b9d0004
502b8b0008
51379c0008
52c3a00000
53379cffd0
545b8b0010
555b8c000c
565b9b0008
575b9d0004
58b820d800
5978010000
6038210498
61f800006a
6237820014
63b8406000
6437830034
652361000f
6658410000
6734420004
68037b0004
695c43fffc
70358cfffc
71379b0030
72340b0009
732b620000
7434410030
75484b000c
76f800005b
77377bfffc
785f6cfffb
7934010020
80f800004e
812b9d0004
822b8b0010
832b8c000c
842b9b0008
85379c0030
86c3a00000
8734410037
88e3fffff4
89379cffe4
905b8b001c
915b8c0018
925b8d0014
935b8e0010
945b8f000c
955b900008
965b9d0004
97780c0000
98f8000032
99340b0031
10078100000
101780f0000
102780d0000
103e0000004
104b9a00800
105382104d0
106f800003d
107b9800800
1083821049c
109f800003a
110f8000027
1115c2bfff9
11234012000
113f8000058
114b8207000
115ba000800
116382104b8
117f8000032
118b9c00800
119fbffffbe
120b9e00800
121382104c4
122f800002d
123e3fffff0
12478020000
12538420700
1263803c350
12728420000
12888230800
12958410010
13034010000
13158410014
1323401000a
1335841000c
1342841000c
13520210001
1364420fffe
137c3a00000
13878010000
13938210700
14028210000
1413802c350
14258220004
14334020000
14458220008
1453402000e
14658220000
147c3a00000
148c3a00000
14978010000
150382106fc
15128220000
15228410000
15320210001
1544420fffe
15528410004
156202100ff
157c3a00000
15878020000
159384206fc
16028430000
161202100ff
16228620000
16320420010
1645c40fffe
16558610004
166c3a00000
16740240000
1684480000b
16978020000
170384206fc
17128430000
17228620000
17320420010
1745c40fffe
17558640004
17634210001
17740240000
1785c82fffa
179c3a00000
180b8204000
18148400003
18234010000
183c3a00000
18434010000
18578070000
18638e704fc
187b8201800
188b5032000
18940840000
19000260008
1913c250008
19298c42000
193b4842000
194b4e42000
1952c840000
19634630001
19798852000
1982081ffff
1995c62fff5
200c3a00000
201379cffdc
2025b8b0024
2035b8c0020
2045b8d001c
2055b8e0018
2065b8f0014
2075b900010
2085b91000c
2095b920008
2105b9d0004
211780b0002
212b9601800
213b8206000
21438630000
21534010000
21634000000
21734210001
2185c23fffe
21978010000
220382104e0
221fbffffca
222fbffffb7
223b9601000
22438420000
22534010000
22634000000
22734210001
2285c22fffe
22934010043
23034110001
231780d0000
232fbffffb6
233ba209000
23439ad04fc
23534100000
236340e0082
237fbffffa8
2385c320027
239fbffffa6
240b8207800
241fbffffa4
242a42f0800
243202b00ff
2445d600023
2455df10022
246fbffff9f
247b58b1000
24830410000
249356b0001
2505d6efffc
251b9801000
25234030000
253358c0080
25440440000
25500650008
2563c630008
25798a42000
258b4842000
259b5a42000
2602c840000
26134420001
26298831800
2632063ffff
2645d82fff6
26541820000
2663c420008
267b4220800
2682021ffff
2695c23000a
27035ef0001
27134010006
27221f100ff
27336100080
274fbffff8c
275fbffff82
2764432ffdb
27734020004
2784422000e
27934100000
280ba000800
2812b9d0004
2822b8b0024
2832b8c0020
2842b8d001c
2852b8e0018
2862b8f0014
2872b900010
2882b91000c
2892b920008
290379c0024
291c3a00000
29234010006
293fbffff79
294e3fffff2
29530780000
2960a313a20
29755706c6f
29861642070
299726f6772
300616d2074
3016f205241
3024d0d0a00
30352656365
30469766564
30520000000
30620627974
30765730d0a
30800000000
309496e7661
3106c696420
311696e7075
312740d0a00
31352656365
3146976696e
3156720586d
3166f64656d
31720747261
3186e736665
319720a0000
32000001021
32120423063
322408450a5
32360c670e7
32481089129
325a14ab16b
326c18cd1ad
327e1cef1ef
32812310210
32932732252
33052b54294
33172f762d6
33293398318
333b37ba35a
334d3bdc39c
335f3ffe3de
33624623443
33704201401
33864e674c7
33944a45485
340a56ab54b
34185289509
342e5eef5cf
343c5acd58d
34436532672
34516110630
34676d766f6
347569546b4
348b75ba77a
34997198738
350f7dfe7fe
351d79dc7bc
35248c458e5
353688678a7
35408401861
35528023823
356c9ccd9ed
357e98ef9af
35889489969
359a90ab92b
3605af54ad4
3617ab76a96
3621a710a50
3633a332a12
364dbfdcbdc
365fbbfeb9e
3669b798b58
367bb3bab1a
3686ca67c87
3694ce45cc5
3702c223c03
3710c601c41
372edaefd8f
373cdecddcd
374ad2abd0b
3758d689d49
3767e976eb6
3775ed54ef4
3783e132e32
3791e510e70
380ff9fefbe
381dfddcffc
382bf1baf3a
3839f598f78
384918881a9
385b1caa1eb
386d10cc12d
387f14ee16f
388108000a1
38930c220e3
39050044025
39170466067
39283b99398
393a3fbb3da
394c33dd31c
395e37ff35e
39602b11290
39722f332d2
39842355214
39962777256
400b5eaa5cb
40195a88589
402f56ee54f
403d52cc50d
40434e224c3
40514a00481
40674666447
40754244405
408a7dbb7fa
409879997b8
410e75ff77e
411c71dd73c
41226d336f2
413069116b0
41466577676
41546155634
416d94cc96d
417f90ee92f
41899c889e9
419b98aa9ab
42058444865
42178066827
42218c008e1
423388228a3
424cb7ddb5c
425eb3ffb1e
4268bf99bd8
427abbbbb9a
4284a755a54
4296a377a16
4300af11ad0
4312ab33a92
432fd2eed0f
433dd6ccd4d
434bdaaad8b
4359de88dc9
4367c266c07
4375c644c45
4383ca22c83
4391ce00cc1
440ef1fff3e
441cf5ddf7c
442af9bbfba
4438fd99ff8
4446e177e36
4454e555e74
4462e933eb2
4470ed11ef0
448f0000000
449f0010000
450f0020000
45100000000
45200000000
45300000000
45400000000
45500000000
45600000000
45700000000
45800000000
45900000000
46000000000
46100000000
46200000000
46300000000
46400000000
46500000000
46600000000
46700000000
46800000000
46900000000
47000000000
47100000000
47200000000
47300000000
47400000000
47500000000
47600000000
47700000000
47800000000
47900000000
48000000000
48100000000
48200000000
48300000000
48400000000
48500000000
48600000000
48700000000
48800000000
48900000000
49000000000
49100000000
49200000000
49300000000
49400000000
49500000000
49600000000
49700000000
49800000000
49900000000
50000000000
50100000000
50200000000
50300000000
50400000000
50500000000
50600000000
50700000000
50800000000
50900000000
51000000000
51100000000
51200000000
51300000000
51400000000
51500000000
51600000000
51700000000
51800000000
51900000000
52000000000
52100000000
52200000000
52300000000
52400000000
52500000000
52600000000
52700000000
52800000000
52900000000
53000000000
53100000000
53200000000
53300000000
53400000000
53500000000
53600000000
53700000000
53800000000
53900000000
54000000000
54100000000
54200000000
54300000000
54400000000
54500000000
54600000000
54700000000
54800000000
54900000000
55000000000
55100000000
55200000000
55300000000
55400000000
55500000000
55600000000
55700000000
55800000000
55900000000
56000000000
56100000000
56200000000
56300000000
56400000000
56500000000
56600000000
56700000000
56800000000
56900000000
57000000000
57100000000
57200000000
57300000000
57400000000
57500000000
57600000000
57700000000
57800000000
57900000000
58000000000
58100000000
58200000000
58300000000
58400000000
58500000000
58600000000
58700000000
58800000000
58900000000
59000000000
59100000000
59200000000
59300000000
59400000000
59500000000
59600000000
59700000000
59800000000
59900000000
60000000000
60100000000
60200000000
60300000000
60400000000
60500000000
60600000000
60700000000
60800000000
60900000000
61000000000
61100000000
61200000000
61300000000
61400000000
61500000000
61600000000
61700000000
61800000000
61900000000
62000000000
62100000000
62200000000
62300000000
62400000000
62500000000
62600000000
62700000000
62800000000
62900000000
63000000000
63100000000
63200000000
63300000000
63400000000
63500000000
63600000000
63700000000
63800000000
63900000000
64000000000
64100000000
64200000000
64300000000
64400000000
64500000000
64600000000
64700000000
64800000000
64900000000
65000000000
65100000000
65200000000
65300000000
65400000000
65500000000
65600000000
65700000000
65800000000
65900000000
66000000000
66100000000
66200000000
66300000000
66400000000
66500000000
66600000000
66700000000
66800000000
66900000000
67000000000
67100000000
67200000000
67300000000
67400000000
67500000000
67600000000
67700000000
67800000000
67900000000
68000000000
68100000000
68200000000
68300000000
68400000000
68500000000
68600000000
68700000000
68800000000
68900000000
69000000000
69100000000
69200000000
69300000000
69400000000
69500000000
69600000000
69700000000
69800000000
69900000000
70000000000
70100000000
70200000000
70300000000
70400000000
70500000000
70600000000
70700000000
70800000000
70900000000
71000000000
71100000000
71200000000
71300000000
71400000000
71500000000
71600000000
71700000000
71800000000
71900000000
72000000000
72100000000
72200000000
72300000000
72400000000
72500000000
72600000000
72700000000
72800000000
72900000000
73000000000
73100000000
73200000000
73300000000
73400000000
73500000000
73600000000
73700000000
73800000000
73900000000
74000000000
74100000000
74200000000
74300000000
74400000000
74500000000
74600000000
74700000000
74800000000
74900000000
75000000000
75100000000
75200000000
75300000000
75400000000
75500000000
75600000000
75700000000
75800000000
75900000000
76000000000
76100000000
76200000000
76300000000
76400000000
76500000000
76600000000
76700000000
76800000000
76900000000
77000000000
77100000000
77200000000
77300000000
77400000000
77500000000
77600000000
77700000000
77800000000
77900000000
78000000000
78100000000
78200000000
78300000000
78400000000
78500000000
78600000000
78700000000
78800000000
78900000000
79000000000
79100000000
79200000000
79300000000
79400000000
79500000000
79600000000
79700000000
79800000000
79900000000
80000000000
80100000000
80200000000
80300000000
80400000000
80500000000
80600000000
80700000000
80800000000
80900000000
81000000000
81100000000
81200000000
81300000000
81400000000
81500000000
81600000000
81700000000
81800000000
81900000000
82000000000
82100000000
82200000000
82300000000
82400000000
82500000000
82600000000
82700000000
82800000000
82900000000
83000000000
83100000000
83200000000
83300000000
83400000000
83500000000
83600000000
83700000000
83800000000
83900000000
84000000000
84100000000
84200000000
84300000000
84400000000
84500000000
84600000000
84700000000
84800000000
84900000000
85000000000
85100000000
85200000000
85300000000
85400000000
85500000000
85600000000
85700000000
85800000000
85900000000
86000000000
86100000000
86200000000
86300000000
86400000000
86500000000
86600000000
86700000000
86800000000
86900000000
87000000000
87100000000
87200000000
87300000000
87400000000
87500000000
87600000000
87700000000
87800000000
87900000000
88000000000
88100000000
88200000000
88300000000
88400000000
88500000000
88600000000
88700000000
88800000000
88900000000
89000000000
89100000000
89200000000
89300000000
89400000000
89500000000
89600000000
89700000000
89800000000
89900000000
90000000000
90100000000
90200000000
90300000000
90400000000
90500000000
90600000000
90700000000
90800000000
90900000000
91000000000
91100000000
91200000000
91300000000
91400000000
91500000000
91600000000
91700000000
91800000000
91900000000
92000000000
92100000000
92200000000
92300000000
92400000000
92500000000
92600000000
92700000000
92800000000
92900000000
93000000000
93100000000
93200000000
93300000000
93400000000
93500000000
93600000000
93700000000
93800000000
93900000000
94000000000
94100000000
94200000000
94300000000
94400000000
94500000000
94600000000
94700000000
94800000000
94900000000
95000000000
95100000000
95200000000
95300000000
95400000000
95500000000
95600000000
95700000000
95800000000
95900000000
96000000000
96100000000
96200000000
96300000000
96400000000
96500000000
96600000000
96700000000
96800000000
96900000000
97000000000
97100000000
97200000000
97300000000
97400000000
97500000000
97600000000
97700000000
97800000000
97900000000
98000000000
98100000000
98200000000
98300000000
98400000000
98500000000
98600000000
98700000000
98800000000
98900000000
99000000000
99100000000
99200000000
99300000000
99400000000
99500000000
99600000000
99700000000
99800000000
99900000000
100000000000
100100000000
100200000000
100300000000
100400000000
100500000000
100600000000
100700000000
100800000000
100900000000
101000000000
101100000000
101200000000
101300000000
101400000000
101500000000
101600000000
101700000000
101800000000
101900000000
102000000000
102100000000
102200000000
102300000000
102400000000
lm32/logic/sakc/firmware/cain_loader/linker.ld
1OUTPUT_FORMAT("elf32-lm32")
2ENTRY(_start)
3
4__DYNAMIC = 0;
5
6
7_BRAM_START = 0x00000000;
8_BRAM_SIZE = 0x1000;
9_BRAM_END = _BRAM_START + _BRAM_SIZE;
10
11MEMORY {
12  bram : ORIGIN = 0x00000000, LENGTH = 0x1000 /* 4k */
13}
14
15SECTIONS
16{
17  .text :
18  {
19    _ftext = .;
20    *(.text .stub .text.* .gnu.linkonce.t.*)
21    _etext = .;
22  } > bram
23
24  .rodata :
25  {
26    . = ALIGN(4);
27    _frodata = .;
28    *(.rodata .rodata.* .gnu.linkonce.r.*)
29    *(.rodata1)
30    _erodata = .;
31  } > bram
32
33  .data :
34  {
35    . = ALIGN(4);
36    _fdata = .;
37    *(.data .data.* .gnu.linkonce.d.*)
38    *(.data1)
39    _gp = ALIGN(16);
40    *(.sdata .sdata.* .gnu.linkonce.s.*)
41    _edata = .;
42  } > bram
43
44  .bss :
45  {
46    . = ALIGN(4);
47    _fbss = .;
48    *(.dynsbss)
49    *(.sbss .sbss.* .gnu.linkonce.sb.*)
50    *(.scommon)
51    *(.dynbss)
52    *(.bss .bss.* .gnu.linkonce.b.*)
53    *(COMMON)
54    _ebss = .;
55    _end = .;
56  } > bram
57}
58
59PROVIDE(_fstack = ORIGIN(bram) + LENGTH(bram) - 4);
lm32/logic/sakc/firmware/cain_loader/main.c
1/**
2 * Primitive first stage bootloader
3 *
4 *
5 */
6#include "soc-hw.h"
7
8/* prototypes */
9uint32_t read_uint32()
10{
11    uint32_t val = 0, i;
12
13    for (i = 0; i < 4; i++) {
14        val <<= 8;
15        val += (uint8_t)uart_getchar();
16    }
17
18    return val;
19}
20
21void hexprint(unsigned int hexval)
22{
23  int digit[8], pos;
24  uart_putstr("0x");
25  for(pos = 0; pos < 8; pos++)
26    {
27      digit[pos] = (hexval & 0xF); /* last hexit */
28      hexval = hexval >> 4;
29    }
30  for(pos = 7; pos > -1; pos--)
31    {
32      if(digit[pos] < 0xA)
33        uart_putstr((char *)digit[pos] + '0');
34      else
35        uart_putstr((char *)digit[pos] + 'A' - 10);
36    }
37  uart_putchar(' ');
38}
39
40
41int main(int argc, char **argv)
42{
43    int8_t *p;
44    uint8_t c;
45    int key, len, autoboot = 1, dispmenu = 1;
46
47    // Initialize UART
48    uart_init();
49
50
51
52
53  while(1){ /* loop forever until u-boot gets booted or the board is reset */
54    if(dispmenu){
55     uart_putstr("\n1: Upload program to RAM\r\n");
56// uart_putstr("2: Upload u-boot to Dataflash\r\n");
57// uart_putstr("3: Upload Kernel to Dataflash\r\n");
58// uart_putstr("4: Start u-boot\r\n");
59// uart_putstr("5: Upload Filesystem image\r\n");
60// uart_putstr("6: Memory test\r\n");
61      dispmenu = 0;
62    }
63
64      key = uart_getchar();
65      autoboot = 0;
66
67    if(key == '1'){
68      len = rxmodem((unsigned char *)0x2000);
69      uart_putstr("Received ");
70      hexprint(len);
71      uart_putstr(" bytes\r\n");
72// jump(0x1000);
73      dispmenu = 1;
74    }
75    else{
76      uart_putstr("Invalid input\r\n");
77      dispmenu = 1;
78    }
79
80
81
82  }
83
84
85
86    c = '*'; // print msg on first iteration
87    for(;;) {
88        uint32_t start, size;
89
90        switch (c) {
91            case 'u': // upload
92                start = read_uint32();
93                size = read_uint32();
94                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
95                    *p = uart_getchar();
96                break;
97        case 'd': // download
98                start = read_uint32();
99                size = read_uint32();
100                for (p = (int8_t *) start; p < (int8_t *) (start+size); p++)
101                uart_putchar( *p );
102                break;
103            case 'g': // goto
104                start = read_uint32();
105                jump(start);
106                break;
107        default:
108            uart_putstr("**SAKC/bootloader** > \r\n");
109            break;
110        };
111        c = uart_getchar();
112    }
113}
114
lm32/logic/sakc/firmware/cain_loader/soc-hw.c
1#include "soc-hw.h"
2
3uart_t *uart0 = (uart_t *) 0xF0000000;
4timer_t *timer0 = (timer_t *) 0xF0010000;
5gpio_t *gpio0 = (gpio_t *) 0xF0020000;
6// uint32_t *sram0 = (uint32_t *) 0x40000000;
7
8uint32_t msec = 0;
9
10/***************************************************************************
11 * General utility functions
12 */
13void sleep(int msec)
14{
15    uint32_t tcr;
16
17    // Use timer0.1
18    timer0->compare1 = (FCPU/1000)*msec;
19    timer0->counter1 = 0;
20    timer0->tcr1 = TIMER_EN | TIMER_IRQEN;
21
22    do {
23        //halt();
24         tcr = timer0->tcr1;
25     } while ( ! (tcr & TIMER_TRIG) );
26}
27
28void tic_init()
29{
30    // Setup timer0.0
31    timer0->compare0 = (FCPU/1000);
32    timer0->counter0 = 0;
33    timer0->tcr0 = TIMER_EN | TIMER_AR | TIMER_IRQEN;
34}
35
36/***************************************************************************
37 * UART Functions
38 */
39void uart_init()
40{
41    //uart0->ier = 0x00; // Interrupt Enable Register
42    //uart0->lcr = 0x03; // Line Control Register: 8N1
43    //uart0->mcr = 0x00; // Modem Control Register
44
45    // Setup Divisor register (Fclk / Baud)
46    //uart0->div = (FCPU/(57600*16));
47}
48
49char uart_getchar()
50{
51    while (! (uart0->ucr & UART_DR)) ;
52    return uart0->rxtx;
53}
54
55void uart_putchar(char c)
56{
57    while (uart0->ucr & UART_BUSY) ;
58    uart0->rxtx = c;
59}
60
61void uart_putstr(char *str)
62{
63    char *c = str;
64    while(*c) {
65        uart_putchar(*c);
66        c++;
67    }
68}
69
lm32/logic/sakc/firmware/cain_loader/soc-hw.h
1#ifndef SPIKEHW_H
2#define SPIKEHW_H
3
4#define PROMSTART 0x00000000
5#define RAMSTART 0x00000800
6#define RAMSIZE 0x400
7#define RAMEND (RAMSTART + RAMSIZE)
8
9#define RAM_START 0x40000000
10#define RAM_SIZE 0x04000000
11
12#define FCPU 50000000
13
14#define UART_RXBUFSIZE 32
15
16/****************************************************************************
17 * Types
18 */
19typedef unsigned int uint32_t; // 32 Bit
20typedef signed int int32_t; // 32 Bit
21
22typedef unsigned char uint8_t; // 8 Bit
23typedef signed char int8_t; // 8 Bit
24
25/****************************************************************************
26 * Interrupt handling
27 */
28typedef void(*isr_ptr_t)(void);
29
30void irq_enable();
31void irq_disable();
32void irq_set_mask(uint32_t mask);
33uint32_t irq_get_mak();
34
35void isr_init();
36void isr_register(int irq, isr_ptr_t isr);
37void isr_unregister(int irq);
38
39/****************************************************************************
40 * General Stuff
41 */
42void halt();
43void jump(uint32_t addr);
44
45
46/****************************************************************************
47 * Timer
48 */
49#define TIMER_EN 0x08 // Enable Timer
50#define TIMER_AR 0x04 // Auto-Reload
51#define TIMER_IRQEN 0x02 // IRQ Enable
52#define TIMER_TRIG 0x01 // Triggered (reset when writing to TCR)
53
54typedef struct {
55    volatile uint32_t tcr0;
56    volatile uint32_t compare0;
57    volatile uint32_t counter0;
58    volatile uint32_t tcr1;
59    volatile uint32_t compare1;
60    volatile uint32_t counter1;
61} timer_t;
62
63void msleep(uint32_t msec);
64void nsleep(uint32_t nsec);
65
66void tic_init();
67
68
69/***************************************************************************
70 * GPIO0
71 */
72typedef struct {
73    volatile uint32_t ctrl;
74    volatile uint32_t dummy1;
75    volatile uint32_t dummy2;
76    volatile uint32_t dummy3;
77    volatile uint32_t in;
78    volatile uint32_t out;
79    volatile uint32_t oe;
80} gpio_t;
81
82/***************************************************************************
83 * UART0
84 */
85#define UART_DR 0x01 // RX Data Ready
86#define UART_ERR 0x02 // RX Error
87#define UART_BUSY 0x10 // TX Busy
88
89typedef struct {
90   volatile uint32_t ucr;
91   volatile uint32_t rxtx;
92} uart_t;
93
94void uart_init();
95void uart_putchar(char c);
96void uart_putstr(char *str);
97char uart_getchar();
98
99
100/***************************************************************************
101 * Pointer to actual components
102 */
103extern timer_t *timer0;
104extern uart_t *uart0;
105extern gpio_t *gpio0;
106extern uint32_t *sram0;
107
108#endif // SPIKEHW_H
lm32/logic/sakc/firmware/cain_loader/xmodem.c
1/*
2    Copyright 2001, 2002 Georges Menie (www.menie.org)
3    Copyright 2004 Darrell Harmon modified to work in a bootloader
4
5    This program is free software; you can redistribute it and/or modify
6    it under the terms of the GNU Lesser General Public License as published by
7    the Free Software Foundation; either version 2 of the License, or
8    (at your option) any later version.
9
10    This program is distributed in the hope that it will be useful,
11    but WITHOUT ANY WARRANTY; without even the implied warranty of
12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13    GNU Lesser General Public License for more details.
14
15    You should have received a copy of the GNU Lesser General Public License
16    along with this program; if not, write to the Free Software
17    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18*/
19
20#include "soc-hw.h"
21
22#define SOH 0x01
23#define EOT 0x04
24#define ACK 0x06
25#define NAK 0x15
26
27
28/* CRC16 implementation acording to CCITT standards */
29
30static const unsigned short crc16tab[256]= {
31    0x0000,0x1021,0x2042,0x3063,0x4084,0x50a5,0x60c6,0x70e7,
32    0x8108,0x9129,0xa14a,0xb16b,0xc18c,0xd1ad,0xe1ce,0xf1ef,
33    0x1231,0x0210,0x3273,0x2252,0x52b5,0x4294,0x72f7,0x62d6,
34    0x9339,0x8318,0xb37b,0xa35a,0xd3bd,0xc39c,0xf3ff,0xe3de,
35    0x2462,0x3443,0x0420,0x1401,0x64e6,0x74c7,0x44a4,0x5485,
36    0xa56a,0xb54b,0x8528,0x9509,0xe5ee,0xf5cf,0xc5ac,0xd58d,
37    0x3653,0x2672,0x1611,0x0630,0x76d7,0x66f6,0x5695,0x46b4,
38    0xb75b,0xa77a,0x9719,0x8738,0xf7df,0xe7fe,0xd79d,0xc7bc,
39    0x48c4,0x58e5,0x6886,0x78a7,0x0840,0x1861,0x2802,0x3823,
40    0xc9cc,0xd9ed,0xe98e,0xf9af,0x8948,0x9969,0xa90a,0xb92b,
41    0x5af5,0x4ad4,0x7ab7,0x6a96,0x1a71,0x0a50,0x3a33,0x2a12,
42    0xdbfd,0xcbdc,0xfbbf,0xeb9e,0x9b79,0x8b58,0xbb3b,0xab1a,
43    0x6ca6,0x7c87,0x4ce4,0x5cc5,0x2c22,0x3c03,0x0c60,0x1c41,
44    0xedae,0xfd8f,0xcdec,0xddcd,0xad2a,0xbd0b,0x8d68,0x9d49,
45    0x7e97,0x6eb6,0x5ed5,0x4ef4,0x3e13,0x2e32,0x1e51,0x0e70,
46    0xff9f,0xefbe,0xdfdd,0xcffc,0xbf1b,0xaf3a,0x9f59,0x8f78,
47    0x9188,0x81a9,0xb1ca,0xa1eb,0xd10c,0xc12d,0xf14e,0xe16f,
48    0x1080,0x00a1,0x30c2,0x20e3,0x5004,0x4025,0x7046,0x6067,
49    0x83b9,0x9398,0xa3fb,0xb3da,0xc33d,0xd31c,0xe37f,0xf35e,
50    0x02b1,0x1290,0x22f3,0x32d2,0x4235,0x5214,0x6277,0x7256,
51    0xb5ea,0xa5cb,0x95a8,0x8589,0xf56e,0xe54f,0xd52c,0xc50d,
52    0x34e2,0x24c3,0x14a0,0x0481,0x7466,0x6447,0x5424,0x4405,
53    0xa7db,0xb7fa,0x8799,0x97b8,0xe75f,0xf77e,0xc71d,0xd73c,
54    0x26d3,0x36f2,0x0691,0x16b0,0x6657,0x7676,0x4615,0x5634,
55    0xd94c,0xc96d,0xf90e,0xe92f,0x99c8,0x89e9,0xb98a,0xa9ab,
56    0x5844,0x4865,0x7806,0x6827,0x18c0,0x08e1,0x3882,0x28a3,
57    0xcb7d,0xdb5c,0xeb3f,0xfb1e,0x8bf9,0x9bd8,0xabbb,0xbb9a,
58    0x4a75,0x5a54,0x6a37,0x7a16,0x0af1,0x1ad0,0x2ab3,0x3a92,
59    0xfd2e,0xed0f,0xdd6c,0xcd4d,0xbdaa,0xad8b,0x9de8,0x8dc9,
60    0x7c26,0x6c07,0x5c64,0x4c45,0x3ca2,0x2c83,0x1ce0,0x0cc1,
61    0xef1f,0xff3e,0xcf5d,0xdf7c,0xaf9b,0xbfba,0x8fd9,0x9ff8,
62    0x6e17,0x7e36,0x4e55,0x5e74,0x2e93,0x3eb2,0x0ed1,0x1ef0
63};
64
65unsigned short crc16_ccitt(const void *buf, int len)
66{
67    int counter;
68    unsigned short crc = 0;
69    for( counter = 0; counter < len; counter++)
70        crc = (crc<<8) ^ crc16tab[((crc>>8) ^ *(char *)buf++)&0x00FF];
71    return crc;
72}
73
74int rxmodem(unsigned char *dest)
75{
76    unsigned long *ptr = (unsigned long *) 0x0;
77    unsigned short crc, tcrc;
78    int i, pid = 1, len = 0;
79
80        for(i = 0; i < 0x20000; i++) { asm("nop;"); }
81    uart_putstr("Receiving Xmodem transfer\n");
82    uart_getchar ();
83        for(i = 0; i < 0x20000; i++) { asm("nop;"); }
84    uart_putchar ('C');
85
86    while(1)
87    {
88        int c, pid1, pid2;
89
90        c = uart_getchar ();
91        if (c != SOH)
92        {
93            if (c == EOT)
94            {
95                uart_putchar (ACK);
96                return len;
97            }
98            else
99                return 0;
100        }
101
102        pid1 = uart_getchar ();
103        pid2 = uart_getchar ();
104
105        if ((pid1 & 0xFF) != (~pid2 & 0xFF))
106            return 0;
107
108        if (pid1 != pid)
109            return 0;
110
111        for (i = 0; i < 130; i++)
112            *dest++ = uart_getchar ();
113
114        crc = crc16_ccitt (dest - 130, 128);
115        tcrc = (*(dest - 2)<<8) + *(dest - 1);
116        if (crc != tcrc)
117            return 0;
118        else
119        {
120            pid = (pid + 1) & 0xFF;
121            dest -= 2;
122            len += 128;
123            uart_putchar (ACK);
124        }
125    }
126}
127
lm32/logic/sakc/firmware/loader_cain/Makefile
1LM32_CC=lm32-elf-gcc
2LM32_LD=lm32-elf-ld
3LM32_OBJCOPY=lm32-elf-objcopy
4LM32_OBJDUMP=lm32-elf-objdump
5
6SREC2VRAM ?= ../../tools/srec2vram/srec2vram
7VRAMFILE=image.ram
8
9CFLAGS=-MMD -O2 -Wall -g -s -fomit-frame-pointer -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled
10LDFLAGS=-nostdlib -nodefaultlibs -Tlinker.ld
11SEGMENTS = -j .text -j .rodata -j .data
12
13all: image.srec $(VRAMFILE)
14
15crt0ram.o: crt0ram.S
16    $(LM32_CC) $(CFLAGS) -c crt0ram.S
17
18main.o: main.c
19    $(LM32_CC) $(CFLAGS) -c main.c
20
21soc-hw.o: soc-hw.c
22    $(LM32_CC) $(CFLAGS) -c soc-hw.c
23
24xmodem.o: xmodem.c
25    $(LM32_CC) $(CFLAGS) -c xmodem.c
26
27image: crt0ram.o main.o soc-hw.o xmodem.o
28    $(LM32_LD) $(LDFLAGS) -Map image.map -N -o image crt0ram.o main.o soc-hw.o xmodem.o
29
30image.lst: image
31    $(LM32_OBJDUMP) -h -S $< > $@
32
33image.bin: image
34    $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.bin
35    $(LM32_OBJCOPY) $(SEGMENTS) -O binary image image_bin.bin
36
37image.srec: image image.lst
38    $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec
39
40$(VHDLFILE): image.srec
41    $(SREC2VHDL) image.srec > $(VHDLFILE)
42
43$(VRAMFILE): image.srec
44    $(SREC2VRAM) image.srec 0x00000000 0x1000 > $(VRAMFILE)
45
46clean:
47    rm -f image image.lst image.bin image.srec image.map image.ram *.o *.d
48
49DEPS := $(wildcard *.d)
50ifneq ($(DEPS),)
51include $(DEPS)
52endif
53
lm32/logic/sakc/firmware/loader_cain/crt0ram.S
1/*
2 * LatticeMico32 C startup code.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26/* Exception handlers - Must be 32 bytes long. */
27        .section .text, "ax", @progbits
28        .global _start
29        .global irq_enable, irq_disable, irq_mask, jump, halt
30_start:
31_reset_handler:
32    xor r0, r0, r0
33    wcsr IE, r0
34    mvhi r1, hi(_reset_handler)
35    ori r1, r1, lo(_reset_handler)
36    wcsr EBA, r1
37    calli _crt0
38    nop
39    nop
40
41_crt0:
42    /* Setup stack and global pointer */
43    mvhi sp, hi(_fstack)
44    ori sp, sp, lo(_fstack)
45    mvhi gp, hi(_gp)
46    ori gp, gp, lo(_gp)
47
48    /* Clear BSS */
49    mvhi r1, hi(_fbss)
50    ori r1, r1, lo(_fbss)
51    mvhi r3, hi(_ebss)
52    ori r3, r3, lo(_ebss)
53.clearBSS:
54    be r1, r3, .callMain
55    sw (r1+0), r0
56    addi r1, r1, 4
57    bi .clearBSS
58
59.callMain:
60    mvi r1, 0
61    mvi r2, 0
62    mvi r3, 0
63    calli main
64
65irq_enable:
66    mvi r1, 1
67    wcsr IE, r1
68    ret
69
70irq_mask:
71    mvi r1, 0x0000000f
72    wcsr IM, r1
73    ret
74
75irq_disable:
76    mvi r1, 0
77    wcsr IE, r1
78    ret
79
80jump:
81    b r1
82
83halt:
84    bi halt
85
lm32/logic/sakc/firmware/loader_cain/linker.ld
1OUTPUT_FORMAT("elf32-lm32")
2ENTRY(_start)
3
4__DYNAMIC = 0;
5
6
7_BRAM_START = 0x00000000;
8_BRAM_SIZE = 0x1000;
9_BRAM_END = _BRAM_START + _BRAM_SIZE;
10
11MEMORY {
12  bram : ORIGIN = 0x00000000, LENGTH = 0x1000 /* 4k */
13}
14
15SECTIONS
16{
17  .text :
18  {
19    _ftext = .;
20    *(.text .stub .text.* .gnu.linkonce.t.*)
21    _etext = .;
22  } > bram
23
24  .rodata :
25  {
26    . = ALIGN(4);
27    _frodata = .;
28    *(.rodata .rodata.* .gnu.linkonce.r.*)
29    *(.rodata1)
30    _erodata = .;
31  } > bram
32
33  .data :
34  {
35    . = ALIGN(4);
36    _fdata = .;
37    *(.data .data.* .gnu.linkonce.d.*)
38    *(.data1)
39    _gp = ALIGN(16);
40    *(.sdata .sdata.* .gnu.linkonce.s.*)
41    _edata = .;
42  } > bram
43
44  .bss :
45  {
46    . = ALIGN(4);
47    _fbss = .;
48    *(.dynsbss)
49    *(.sbss .sbss.* .gnu.linkonce.sb.*)
50    *(.scommon)
51    *(.dynbss)
52    *(.bss .bss.* .gnu.linkonce.b.*)
53    *(COMMON)
54    _ebss = .;
55    _end = .;
56  } > bram
57}
58
59PROVIDE(_fstack = ORIGIN(bram) + LENGTH(bram) - 4);
lm32/logic/sakc/firmware/loader_cain/main.c
1#include "soc-hw.h"
2
3unsigned int i, j,k; // Loop counter.
4
5
6int main() {
7  int key, len, autoboot = 1, dispmenu = 1;
8
9  uart_putstr("Cain's bootloader!!! \r\n");
10
11  while(1){ /* loop forever until u-boot gets booted or the board is reset */
12    if(dispmenu){
13     uart_putstr("\n1: Upload program to RAM\r\n");
14// uart_putstr("2: Upload u-boot to Dataflash\r\n");
15// uart_putstr("3: Upload Kernel to Dataflash\r\n");
16// uart_putstr("4: Start u-boot\r\n");
17// uart_putstr("5: Upload Filesystem image\r\n");
18// uart_putstr("6: Memory test\r\n");
19      dispmenu = 0;
20    }
21      key = uart_getchar();
22      autoboot = 0;
23
24    if(key == '1'){
25      len = rxmodem((unsigned char *)0x1000);
26      uart_putstr("Received ");
27      hexprint(len);
28      uart_putstr(" bytes\r\n");
29 // jump(RAM_BASE);
30      dispmenu = 1;
31    }
32    else{
33      uart_putstr("Invalid input\r\n");
34      dispmenu = 1;
35    }
36  }
37
38  while(1){ asm("nop;"); }
39
40  return (0);
41}
lm32/logic/sakc/firmware/loader_cain/soc-hw.c
1#include "soc-hw.h"
2
3uart_t *uart0 = (uart_t *) 0xF0000000;
4timer_t *timer0 = (timer_t *) 0xF0010000;
5gpio_t *gpio0 = (gpio_t *) 0xF0020000;
6
7uint32_t msec = 0;
8
9/***************************************************************************
10 * General utility functions
11 */
12void sleep(int msec)
13{
14    uint32_t tcr;
15
16    // Use timer0.1
17    timer0->compare1 = (FCPU/1000)*msec;
18    timer0->counter1 = 0;
19    timer0->tcr1 = TIMER_EN | TIMER_IRQEN;
20
21    do {
22        //halt();
23         tcr = timer0->tcr1;
24     } while ( ! (tcr & TIMER_TRIG) );
25}
26
27void tic_init()
28{
29    // Setup timer0.0
30    timer0->compare0 = (FCPU/1000);
31    timer0->counter0 = 0;
32    timer0->tcr0 = TIMER_EN | TIMER_AR | TIMER_IRQEN;
33}
34
35/***************************************************************************
36 * UART Functions
37 */
38void uart_init()
39{
40    //uart0->ier = 0x00; // Interrupt Enable Register
41    //uart0->lcr = 0x03; // Line Control Register: 8N1
42    //uart0->mcr = 0x00; // Modem Control Register
43
44    // Setup Divisor register (Fclk / Baud)
45    //uart0->div = (FCPU/(57600*16));
46}
47
48char uart_getchar()
49{
50    while (! (uart0->ucr & UART_DR)) ;
51    return uart0->rxtx;
52}
53
54void uart_putchar(char c)
55{
56    while (uart0->ucr & UART_BUSY) ;
57    uart0->rxtx = c;
58}
59
60void uart_putstr(char *str)
61{
62    char *c = str;
63    while(*c) {
64        uart_putchar(*c);
65        c++;
66    }
67}
68
69void hexprint(unsigned int hexval)
70{
71  int digit[8], pos;
72  uart_putstr("0x");
73  for(pos = 0; pos < 8; pos++)
74    {
75      digit[pos] = (hexval & 0xF); /* last hexit */
76      hexval = hexval >> 4;
77    }
78  for(pos = 7; pos > -1; pos--)
79    {
80      if(digit[pos] < 0xA)
81        uart_putstr((char *)digit[pos] + '0');
82      else
83        uart_putstr((char *)digit[pos] + 'A' - 10);
84    }
85  uart_putchar(' ');
86}
87
88
89
lm32/logic/sakc/firmware/loader_cain/soc-hw.h
1#ifndef SPIKEHW_H
2#define SPIKEHW_H
3
4#define PROMSTART 0x00000000
5#define RAMSTART 0x00000800
6#define RAMSIZE 0x400
7#define RAMEND (RAMSTART + RAMSIZE)
8
9#define RAM_START 0x40000000
10#define RAM_SIZE 0x04000000
11
12#define FCPU 50000000
13
14#define UART_RXBUFSIZE 32
15
16/****************************************************************************
17 * Types
18 */
19typedef unsigned int uint32_t; // 32 Bit
20typedef signed int int32_t; // 32 Bit
21
22typedef unsigned char uint8_t; // 8 Bit
23typedef signed char int8_t; // 8 Bit
24
25/****************************************************************************
26 * Interrupt handling
27 */
28typedef void(*isr_ptr_t)(void);
29
30void irq_enable();
31void irq_disable();
32void irq_set_mask(uint32_t mask);
33uint32_t irq_get_mak();
34
35void isr_init();
36void isr_register(int irq, isr_ptr_t isr);
37void isr_unregister(int irq);
38
39/****************************************************************************
40 * General Stuff
41 */
42void halt();
43void jump(uint32_t addr);
44
45
46/****************************************************************************
47 * Timer
48 */
49#define TIMER_EN 0x08 // Enable Timer
50#define TIMER_AR 0x04 // Auto-Reload
51#define TIMER_IRQEN 0x02 // IRQ Enable
52#define TIMER_TRIG 0x01 // Triggered (reset when writing to TCR)
53
54typedef struct {
55    volatile uint32_t tcr0;
56    volatile uint32_t compare0;
57    volatile uint32_t counter0;
58    volatile uint32_t tcr1;
59    volatile uint32_t compare1;
60    volatile uint32_t counter1;
61} timer_t;
62
63void msleep(uint32_t msec);
64void nsleep(uint32_t nsec);
65
66void tic_init();
67
68
69/***************************************************************************
70 * GPIO0
71 */
72typedef struct {
73    volatile uint32_t ctrl;
74    volatile uint32_t dummy1;
75    volatile uint32_t dummy2;
76    volatile uint32_t dummy3;
77    volatile uint32_t in;
78    volatile uint32_t out;
79    volatile uint32_t oe;
80} gpio_t;
81
82/***************************************************************************
83 * UART0
84 */
85#define UART_DR 0x01 // RX Data Ready
86#define UART_ERR 0x02 // RX Error
87#define UART_BUSY 0x10 // TX Busy
88
89typedef struct {
90   volatile uint32_t ucr;
91   volatile uint32_t rxtx;
92} uart_t;
93
94void uart_init();
95void uart_putchar(char c);
96void uart_putstr(char *str);
97char uart_getchar();
98
99
100/***************************************************************************
101 * Pointer to actual components
102 */
103extern timer_t *timer0;
104extern uart_t *uart0;
105extern gpio_t *gpio0;
106extern uint32_t *sram0;
107
108int rxmodem(unsigned char *dest);
109void hexprint(unsigned int hexval);
110
111#endif // SPIKEHW_H
lm32/logic/sakc/firmware/loader_cain/xmodem.c
1/*
2    Copyright 2001, 2002 Georges Menie (www.menie.org)
3    Copyright 2004 Darrell Harmon modified to work in a bootloader
4
5    This program is free software; you can redistribute it and/or modify
6    it under the terms of the GNU Lesser General Public License as published by
7    the Free Software Foundation; either version 2 of the License, or
8    (at your option) any later version.
9
10    This program is distributed in the hope that it will be useful,
11    but WITHOUT ANY WARRANTY; without even the implied warranty of
12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13    GNU Lesser General Public License for more details.
14
15    You should have received a copy of the GNU Lesser General Public License
16    along with this program; if not, write to the Free Software
17    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18*/
19
20#include "soc-hw.h"
21
22#define SOH 0x01
23#define EOT 0x04
24#define ACK 0x06
25#define NAK 0x15
26
27
28/* CRC16 implementation acording to CCITT standards */
29
30static const unsigned short crc16tab[256]= {
31    0x0000,0x1021,0x2042,0x3063,0x4084,0x50a5,0x60c6,0x70e7,
32    0x8108,0x9129,0xa14a,0xb16b,0xc18c,0xd1ad,0xe1ce,0xf1ef,
33    0x1231,0x0210,0x3273,0x2252,0x52b5,0x4294,0x72f7,0x62d6,
34    0x9339,0x8318,0xb37b,0xa35a,0xd3bd,0xc39c,0xf3ff,0xe3de,
35    0x2462,0x3443,0x0420,0x1401,0x64e6,0x74c7,0x44a4,0x5485,
36    0xa56a,0xb54b,0x8528,0x9509,0xe5ee,0xf5cf,0xc5ac,0xd58d,
37    0x3653,0x2672,0x1611,0x0630,0x76d7,0x66f6,0x5695,0x46b4,
38    0xb75b,0xa77a,0x9719,0x8738,0xf7df,0xe7fe,0xd79d,0xc7bc,
39    0x48c4,0x58e5,0x6886,0x78a7,0x0840,0x1861,0x2802,0x3823,
40    0xc9cc,0xd9ed,0xe98e,0xf9af,0x8948,0x9969,0xa90a,0xb92b,
41    0x5af5,0x4ad4,0x7ab7,0x6a96,0x1a71,0x0a50,0x3a33,0x2a12,
42    0xdbfd,0xcbdc,0xfbbf,0xeb9e,0x9b79,0x8b58,0xbb3b,0xab1a,
43    0x6ca6,0x7c87,0x4ce4,0x5cc5,0x2c22,0x3c03,0x0c60,0x1c41,
44    0xedae,0xfd8f,0xcdec,0xddcd,0xad2a,0xbd0b,0x8d68,0x9d49,
45    0x7e97,0x6eb6,0x5ed5,0x4ef4,0x3e13,0x2e32,0x1e51,0x0e70,
46    0xff9f,0xefbe,0xdfdd,0xcffc,0xbf1b,0xaf3a,0x9f59,0x8f78,
47    0x9188,0x81a9,0xb1ca,0xa1eb,0xd10c,0xc12d,0xf14e,0xe16f,
48    0x1080,0x00a1,0x30c2,0x20e3,0x5004,0x4025,0x7046,0x6067,
49    0x83b9,0x9398,0xa3fb,0xb3da,0xc33d,0xd31c,0xe37f,0xf35e,
50    0x02b1,0x1290,0x22f3,0x32d2,0x4235,0x5214,0x6277,0x7256,
51    0xb5ea,0xa5cb,0x95a8,0x8589,0xf56e,0xe54f,0xd52c,0xc50d,
52    0x34e2,0x24c3,0x14a0,0x0481,0x7466,0x6447,0x5424,0x4405,
53    0xa7db,0xb7fa,0x8799,0x97b8,0xe75f,0xf77e,0xc71d,0xd73c,
54    0x26d3,0x36f2,0x0691,0x16b0,0x6657,0x7676,0x4615,0x5634,
55    0xd94c,0xc96d,0xf90e,0xe92f,0x99c8,0x89e9,0xb98a,0xa9ab,
56    0x5844,0x4865,0x7806,0x6827,0x18c0,0x08e1,0x3882,0x28a3,
57    0xcb7d,0xdb5c,0xeb3f,0xfb1e,0x8bf9,0x9bd8,0xabbb,0xbb9a,
58    0x4a75,0x5a54,0x6a37,0x7a16,0x0af1,0x1ad0,0x2ab3,0x3a92,
59    0xfd2e,0xed0f,0xdd6c,0xcd4d,0xbdaa,0xad8b,0x9de8,0x8dc9,
60    0x7c26,0x6c07,0x5c64,0x4c45,0x3ca2,0x2c83,0x1ce0,0x0cc1,
61    0xef1f,0xff3e,0xcf5d,0xdf7c,0xaf9b,0xbfba,0x8fd9,0x9ff8,
62    0x6e17,0x7e36,0x4e55,0x5e74,0x2e93,0x3eb2,0x0ed1,0x1ef0
63};
64
65unsigned short crc16_ccitt(const void *buf, int len)
66{
67    int counter;
68    unsigned short crc = 0;
69    for( counter = 0; counter < len; counter++)
70        crc = (crc<<8) ^ crc16tab[((crc>>8) ^ *(char *)buf++)&0x00FF];
71    return crc;
72}
73
74int rxmodem(unsigned char *dest)
75{
76    unsigned long *ptr = (unsigned long *) 0x0;
77    unsigned short crc, tcrc;
78    int i, pid = 1, len = 0;
79
80    for (i = 0; i < 0x100000; i++)
81    {
82        *ptr = 0;
83        ptr++;
84    }
85
86
87    uart_putstr("Receiving Xmodem transfer\n");
88    uart_getchar ();
89        for(i = 0; i < 0x20000000; i++) { asm("nop;"); }
90    uart_putchar ('C');
91
92    while(1)
93    {
94        int c, pid1, pid2;
95
96        c = uart_getchar ();
97        if (c != SOH)
98        {
99            if (c == EOT)
100            {
101                uart_putchar (ACK);
102                return len;
103            }
104            else
105                return 0;
106        }
107
108        pid1 = uart_getchar ();
109        pid2 = uart_getchar ();
110
111        if ((pid1 & 0xFF) != (~pid2 & 0xFF))
112            return 0;
113
114        if (pid1 != pid)
115            return 0;
116
117        for (i = 0; i < 130; i++)
118            *dest++ = uart_getchar ();
119
120        crc = crc16_ccitt (dest - 130, 128);
121        tcrc = (*(dest - 2)<<8) + *(dest - 1);
122        if (crc != tcrc)
123            return 0;
124        else
125        {
126            pid = (pid + 1) & 0xFF;
127            dest -= 2;
128            len += 128;
129            uart_putchar (ACK);
130        }
131    }
132}
133
lm32/logic/sakc/system.v
66
77module system
88#(
9    parameter bootram_file = "../firmware/loader_cain/image.ram",
9    parameter bootram_file = "../firmware/cain_loader/image.ram",
1010// parameter bootram_file = "../firmware/boot0-serial/image.ram",
1111    parameter clk_freq = 50000000,
1212    parameter uart_baud_rate = 57600

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