Hardware Design: SIE
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Hardware Design: SIE Commit Details
Change Details
lm32/logic/sakc/firmware/cain_loader/Makefile | ||
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1 | LM32_CC=lm32-elf-gcc | |
2 | LM32_LD=lm32-elf-ld | |
3 | LM32_OBJCOPY=lm32-elf-objcopy | |
4 | LM32_OBJDUMP=lm32-elf-objdump | |
5 | ||
6 | SREC2VRAM ?= ../../tools/srec2vram/srec2vram | |
7 | VRAMFILE=image.ram | |
8 | ||
9 | CFLAGS=-MMD -O2 -Wall -g -s -fomit-frame-pointer -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled | |
10 | LDFLAGS=-nostdlib -nodefaultlibs -Tlinker.ld | |
11 | SEGMENTS = -j .text -j .rodata -j .data | |
12 | ||
13 | all: image.srec $(VRAMFILE) | |
14 | ||
15 | crt0ram.o: crt0ram.S | |
16 | $(LM32_CC) $(CFLAGS) -c crt0ram.S | |
17 | ||
18 | main.o: main.c | |
19 | $(LM32_CC) $(CFLAGS) -c main.c | |
20 | ||
21 | soc-hw.o: soc-hw.c | |
22 | $(LM32_CC) $(CFLAGS) -c soc-hw.c | |
23 | ||
24 | xmodem.o: xmodem.c | |
25 | $(LM32_CC) $(CFLAGS) -c xmodem.c | |
26 | ||
27 | image: crt0ram.o main.o soc-hw.o xmodem.o | |
28 | $(LM32_LD) $(LDFLAGS) -Map image.map -N -o image crt0ram.o main.o soc-hw.o xmodem.o | |
29 | ||
30 | image.lst: image | |
31 | $(LM32_OBJDUMP) -h -S $< > $@ | |
32 | ||
33 | image.bin: image | |
34 | $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.bin | |
35 | $(LM32_OBJCOPY) $(SEGMENTS) -O binary image image_bin.bin | |
36 | ||
37 | image.srec: image image.lst | |
38 | $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec | |
39 | ||
40 | $(VHDLFILE): image.srec | |
41 | $(SREC2VHDL) image.srec > $(VHDLFILE) | |
42 | ||
43 | $(VRAMFILE): image.srec | |
44 | $(SREC2VRAM) image.srec 0x00000000 0x1000 > $(VRAMFILE) | |
45 | ||
46 | clean: | |
47 | rm -f image image.lst image.bin image.srec image.map *.o *.d *.bin | |
48 | ||
49 | DEPS := $(wildcard *.d) | |
50 | ifneq ($(DEPS),) | |
51 | include $(DEPS) | |
52 | endif | |
53 |
lm32/logic/sakc/firmware/cain_loader/crt0ram.S | ||
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1 | /* | |
2 | * LatticeMico32 C startup code. | |
3 | * | |
4 | * Redistribution and use in source and binary forms, with or without | |
5 | * modification, are permitted provided that the following conditions | |
6 | * are met: | |
7 | * 1. Redistributions of source code must retain the above copyright | |
8 | * notice, this list of conditions and the following disclaimer. | |
9 | * 2. Redistributions in binary form must reproduce the above copyright | |
10 | * notice, this list of conditions and the following disclaimer in the | |
11 | * documentation and/or other materials provided with the distribution. | |
12 | * | |
13 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
14 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
15 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
16 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE | |
17 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
18 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
19 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
20 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
21 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
22 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
23 | * SUCH DAMAGE. | |
24 | */ | |
25 | ||
26 | /* Exception handlers - Must be 32 bytes long. */ | |
27 | .section .text, "ax", @progbits | |
28 | .global _start | |
29 | .global irq_enable, irq_disable, irq_mask, jump, halt | |
30 | _start: | |
31 | _reset_handler: | |
32 | xor r0, r0, r0 | |
33 | wcsr IE, r0 | |
34 | mvhi r1, hi(_reset_handler) | |
35 | ori r1, r1, lo(_reset_handler) | |
36 | wcsr EBA, r1 | |
37 | calli _crt0 | |
38 | nop | |
39 | nop | |
40 | ||
41 | _crt0: | |
42 | /* Setup stack and global pointer */ | |
43 | mvhi sp, hi(_fstack) | |
44 | ori sp, sp, lo(_fstack) | |
45 | mvhi gp, hi(_gp) | |
46 | ori gp, gp, lo(_gp) | |
47 | ||
48 | /* Clear BSS */ | |
49 | mvhi r1, hi(_fbss) | |
50 | ori r1, r1, lo(_fbss) | |
51 | mvhi r3, hi(_ebss) | |
52 | ori r3, r3, lo(_ebss) | |
53 | .clearBSS: | |
54 | be r1, r3, .callMain | |
55 | sw (r1+0), r0 | |
56 | addi r1, r1, 4 | |
57 | bi .clearBSS | |
58 | ||
59 | .callMain: | |
60 | mvi r1, 0 | |
61 | mvi r2, 0 | |
62 | mvi r3, 0 | |
63 | calli main | |
64 | ||
65 | irq_enable: | |
66 | mvi r1, 1 | |
67 | wcsr IE, r1 | |
68 | ret | |
69 | ||
70 | irq_mask: | |
71 | mvi r1, 0x0000000f | |
72 | wcsr IM, r1 | |
73 | ret | |
74 | ||
75 | irq_disable: | |
76 | mvi r1, 0 | |
77 | wcsr IE, r1 | |
78 | ret | |
79 | ||
80 | jump: | |
81 | b r1 | |
82 | ||
83 | halt: | |
84 | bi halt | |
85 |
lm32/logic/sakc/firmware/cain_loader/image.ram | ||
---|---|---|
1 | 98000000 | |
2 | d0000000 | |
3 | 78010000 | |
4 | 38210000 | |
5 | d0e10000 | |
6 | f8000003 | |
7 | 34000000 | |
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44 | f8000069 | |
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305 | 20000000 | |
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307 | 65730d0a | |
308 | 00000000 | |
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313 | 52656365 | |
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318 | 6e736665 | |
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320 | 00001021 | |
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448 | f0000000 | |
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450 | f0020000 | |
451 | 00000000 | |
452 | 00000000 | |
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455 | 00000000 | |
456 | 00000000 | |
457 | 00000000 | |
458 | 00000000 | |
459 | 00000000 | |
460 | 00000000 | |
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463 | 00000000 | |
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466 | 00000000 | |
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468 | 00000000 | |
469 | 00000000 | |
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471 | 00000000 | |
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475 | 00000000 | |
476 | 00000000 | |
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480 | 00000000 | |
481 | 00000000 | |
482 | 00000000 | |
483 | 00000000 | |
484 | 00000000 | |
485 | 00000000 | |
486 | 00000000 | |
487 | 00000000 | |
488 | 00000000 | |
489 | 00000000 | |
490 | 00000000 | |
491 | 00000000 | |
492 | 00000000 | |
493 | 00000000 | |
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495 | 00000000 | |
496 | 00000000 | |
497 | 00000000 | |
498 | 00000000 | |
499 | 00000000 | |
500 | 00000000 | |
501 | 00000000 | |
502 | 00000000 | |
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504 | 00000000 | |
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506 | 00000000 | |
507 | 00000000 | |
508 | 00000000 | |
509 | 00000000 | |
510 | 00000000 | |
511 | 00000000 | |
512 | 00000000 | |
513 | 00000000 | |
514 | 00000000 | |
515 | 00000000 | |
516 | 00000000 | |
517 | 00000000 | |
518 | 00000000 | |
519 | 00000000 | |
520 | 00000000 | |
521 | 00000000 | |
522 | 00000000 | |
523 | 00000000 | |
524 | 00000000 | |
525 | 00000000 | |
526 | 00000000 | |
527 | 00000000 | |
528 | 00000000 | |
529 | 00000000 | |
530 | 00000000 | |
531 | 00000000 | |
532 | 00000000 | |
533 | 00000000 | |
534 | 00000000 | |
535 | 00000000 | |
536 | 00000000 | |
537 | 00000000 | |
538 | 00000000 | |
539 | 00000000 | |
540 | 00000000 | |
541 | 00000000 | |
542 | 00000000 | |
543 | 00000000 | |
544 | 00000000 | |
545 | 00000000 | |
546 | 00000000 | |
547 | 00000000 | |
548 | 00000000 | |
549 | 00000000 | |
550 | 00000000 | |
551 | 00000000 | |
552 | 00000000 | |
553 | 00000000 | |
554 | 00000000 | |
555 | 00000000 | |
556 | 00000000 | |
557 | 00000000 | |
558 | 00000000 | |
559 | 00000000 | |
560 | 00000000 | |
561 | 00000000 | |
562 | 00000000 | |
563 | 00000000 | |
564 | 00000000 | |
565 | 00000000 | |
566 | 00000000 | |
567 | 00000000 | |
568 | 00000000 | |
569 | 00000000 | |
570 | 00000000 | |
571 | 00000000 | |
572 | 00000000 | |
573 | 00000000 | |
574 | 00000000 | |
575 | 00000000 | |
576 | 00000000 | |
577 | 00000000 | |
578 | 00000000 | |
579 | 00000000 | |
580 | 00000000 | |
581 | 00000000 | |
582 | 00000000 | |
583 | 00000000 | |
584 | 00000000 | |
585 | 00000000 | |
586 | 00000000 | |
587 | 00000000 | |
588 | 00000000 | |
589 | 00000000 | |
590 | 00000000 | |
591 | 00000000 | |
592 | 00000000 | |
593 | 00000000 | |
594 | 00000000 | |
595 | 00000000 | |
596 | 00000000 | |
597 | 00000000 | |
598 | 00000000 | |
599 | 00000000 | |
600 | 00000000 | |
601 | 00000000 | |
602 | 00000000 | |
603 | 00000000 | |
604 | 00000000 | |
605 | 00000000 | |
606 | 00000000 | |
607 | 00000000 | |
608 | 00000000 | |
609 | 00000000 | |
610 | 00000000 | |
611 | 00000000 | |
612 | 00000000 | |
613 | 00000000 | |
614 | 00000000 | |
615 | 00000000 | |
616 | 00000000 | |
617 | 00000000 | |
618 | 00000000 | |
619 | 00000000 | |
620 | 00000000 | |
621 | 00000000 | |
622 | 00000000 | |
623 | 00000000 | |
624 | 00000000 | |
625 | 00000000 | |
626 | 00000000 | |
627 | 00000000 | |
628 | 00000000 | |
629 | 00000000 | |
630 | 00000000 | |
631 | 00000000 | |
632 | 00000000 | |
633 | 00000000 | |
634 | 00000000 | |
635 | 00000000 | |
636 | 00000000 | |
637 | 00000000 | |
638 | 00000000 | |
639 | 00000000 | |
640 | 00000000 | |
641 | 00000000 | |
642 | 00000000 | |
643 | 00000000 | |
644 | 00000000 | |
645 | 00000000 | |
646 | 00000000 | |
647 | 00000000 | |
648 | 00000000 | |
649 | 00000000 | |
650 | 00000000 | |
651 | 00000000 | |
652 | 00000000 | |
653 | 00000000 | |
654 | 00000000 | |
655 | 00000000 | |
656 | 00000000 | |
657 | 00000000 | |
658 | 00000000 | |
659 | 00000000 | |
660 | 00000000 | |
661 | 00000000 | |
662 | 00000000 | |
663 | 00000000 | |
664 | 00000000 | |
665 | 00000000 | |
666 | 00000000 | |
667 | 00000000 | |
668 | 00000000 | |
669 | 00000000 | |
670 | 00000000 | |
671 | 00000000 | |
672 | 00000000 | |
673 | 00000000 | |
674 | 00000000 | |
675 | 00000000 | |
676 | 00000000 | |
677 | 00000000 | |
678 | 00000000 | |
679 | 00000000 | |
680 | 00000000 | |
681 | 00000000 | |
682 | 00000000 | |
683 | 00000000 | |
684 | 00000000 | |
685 | 00000000 | |
686 | 00000000 | |
687 | 00000000 | |
688 | 00000000 | |
689 | 00000000 | |
690 | 00000000 | |
691 | 00000000 | |
692 | 00000000 | |
693 | 00000000 | |
694 | 00000000 | |
695 | 00000000 | |
696 | 00000000 | |
697 | 00000000 | |
698 | 00000000 | |
699 | 00000000 | |
700 | 00000000 | |
701 | 00000000 | |
702 | 00000000 | |
703 | 00000000 | |
704 | 00000000 | |
705 | 00000000 | |
706 | 00000000 | |
707 | 00000000 | |
708 | 00000000 | |
709 | 00000000 | |
710 | 00000000 | |
711 | 00000000 | |
712 | 00000000 | |
713 | 00000000 | |
714 | 00000000 | |
715 | 00000000 | |
716 | 00000000 | |
717 | 00000000 | |
718 | 00000000 | |
719 | 00000000 | |
720 | 00000000 | |
721 | 00000000 | |
722 | 00000000 | |
723 | 00000000 | |
724 | 00000000 | |
725 | 00000000 | |
726 | 00000000 | |
727 | 00000000 | |
728 | 00000000 | |
729 | 00000000 | |
730 | 00000000 | |
731 | 00000000 | |
732 | 00000000 | |
733 | 00000000 | |
734 | 00000000 | |
735 | 00000000 | |
736 | 00000000 | |
737 | 00000000 | |
738 | 00000000 | |
739 | 00000000 | |
740 | 00000000 | |
741 | 00000000 | |
742 | 00000000 | |
743 | 00000000 | |
744 | 00000000 | |
745 | 00000000 | |
746 | 00000000 | |
747 | 00000000 | |
748 | 00000000 | |
749 | 00000000 | |
750 | 00000000 | |
751 | 00000000 | |
752 | 00000000 | |
753 | 00000000 | |
754 | 00000000 | |
755 | 00000000 | |
756 | 00000000 | |
757 | 00000000 | |
758 | 00000000 | |
759 | 00000000 | |
760 | 00000000 | |
761 | 00000000 | |
762 | 00000000 | |
763 | 00000000 | |
764 | 00000000 | |
765 | 00000000 | |
766 | 00000000 | |
767 | 00000000 | |
768 | 00000000 | |
769 | 00000000 | |
770 | 00000000 | |
771 | 00000000 | |
772 | 00000000 | |
773 | 00000000 | |
774 | 00000000 | |
775 | 00000000 | |
776 | 00000000 | |
777 | 00000000 | |
778 | 00000000 | |
779 | 00000000 | |
780 | 00000000 | |
781 | 00000000 | |
782 | 00000000 | |
783 | 00000000 | |
784 | 00000000 | |
785 | 00000000 | |
786 | 00000000 | |
787 | 00000000 | |
788 | 00000000 | |
789 | 00000000 | |
790 | 00000000 | |
791 | 00000000 | |
792 | 00000000 | |
793 | 00000000 | |
794 | 00000000 | |
795 | 00000000 | |
796 | 00000000 | |
797 | 00000000 | |
798 | 00000000 | |
799 | 00000000 | |
800 | 00000000 | |
801 | 00000000 | |
802 | 00000000 | |
803 | 00000000 | |
804 | 00000000 | |
805 | 00000000 | |
806 | 00000000 | |
807 | 00000000 | |
808 | 00000000 | |
809 | 00000000 | |
810 | 00000000 | |
811 | 00000000 | |
812 | 00000000 | |
813 | 00000000 | |
814 | 00000000 | |
815 | 00000000 | |
816 | 00000000 | |
817 | 00000000 | |
818 | 00000000 | |
819 | 00000000 | |
820 | 00000000 | |
821 | 00000000 | |
822 | 00000000 | |
823 | 00000000 | |
824 | 00000000 | |
825 | 00000000 | |
826 | 00000000 | |
827 | 00000000 | |
828 | 00000000 | |
829 | 00000000 | |
830 | 00000000 | |
831 | 00000000 | |
832 | 00000000 | |
833 | 00000000 | |
834 | 00000000 | |
835 | 00000000 | |
836 | 00000000 | |
837 | 00000000 | |
838 | 00000000 | |
839 | 00000000 | |
840 | 00000000 | |
841 | 00000000 | |
842 | 00000000 | |
843 | 00000000 | |
844 | 00000000 | |
845 | 00000000 | |
846 | 00000000 | |
847 | 00000000 | |
848 | 00000000 | |
849 | 00000000 | |
850 | 00000000 | |
851 | 00000000 | |
852 | 00000000 | |
853 | 00000000 | |
854 | 00000000 | |
855 | 00000000 | |
856 | 00000000 | |
857 | 00000000 | |
858 | 00000000 | |
859 | 00000000 | |
860 | 00000000 | |
861 | 00000000 | |
862 | 00000000 | |
863 | 00000000 | |
864 | 00000000 | |
865 | 00000000 | |
866 | 00000000 | |
867 | 00000000 | |
868 | 00000000 | |
869 | 00000000 | |
870 | 00000000 | |
871 | 00000000 | |
872 | 00000000 | |
873 | 00000000 | |
874 | 00000000 | |
875 | 00000000 | |
876 | 00000000 | |
877 | 00000000 | |
878 | 00000000 | |
879 | 00000000 | |
880 | 00000000 | |
881 | 00000000 | |
882 | 00000000 | |
883 | 00000000 | |
884 | 00000000 | |
885 | 00000000 | |
886 | 00000000 | |
887 | 00000000 | |
888 | 00000000 | |
889 | 00000000 | |
890 | 00000000 | |
891 | 00000000 | |
892 | 00000000 | |
893 | 00000000 | |
894 | 00000000 | |
895 | 00000000 | |
896 | 00000000 | |
897 | 00000000 | |
898 | 00000000 | |
899 | 00000000 | |
900 | 00000000 | |
901 | 00000000 | |
902 | 00000000 | |
903 | 00000000 | |
904 | 00000000 | |
905 | 00000000 | |
906 | 00000000 | |
907 | 00000000 | |
908 | 00000000 | |
909 | 00000000 | |
910 | 00000000 | |
911 | 00000000 | |
912 | 00000000 | |
913 | 00000000 | |
914 | 00000000 | |
915 | 00000000 | |
916 | 00000000 | |
917 | 00000000 | |
918 | 00000000 | |
919 | 00000000 | |
920 | 00000000 | |
921 | 00000000 | |
922 | 00000000 | |
923 | 00000000 | |
924 | 00000000 | |
925 | 00000000 | |
926 | 00000000 | |
927 | 00000000 | |
928 | 00000000 | |
929 | 00000000 | |
930 | 00000000 | |
931 | 00000000 | |
932 | 00000000 | |
933 | 00000000 | |
934 | 00000000 | |
935 | 00000000 | |
936 | 00000000 | |
937 | 00000000 | |
938 | 00000000 | |
939 | 00000000 | |
940 | 00000000 | |
941 | 00000000 | |
942 | 00000000 | |
943 | 00000000 | |
944 | 00000000 | |
945 | 00000000 | |
946 | 00000000 | |
947 | 00000000 | |
948 | 00000000 | |
949 | 00000000 | |
950 | 00000000 | |
951 | 00000000 | |
952 | 00000000 | |
953 | 00000000 | |
954 | 00000000 | |
955 | 00000000 | |
956 | 00000000 | |
957 | 00000000 | |
958 | 00000000 | |
959 | 00000000 | |
960 | 00000000 | |
961 | 00000000 | |
962 | 00000000 | |
963 | 00000000 | |
964 | 00000000 | |
965 | 00000000 | |
966 | 00000000 | |
967 | 00000000 | |
968 | 00000000 | |
969 | 00000000 | |
970 | 00000000 | |
971 | 00000000 | |
972 | 00000000 | |
973 | 00000000 | |
974 | 00000000 | |
975 | 00000000 | |
976 | 00000000 | |
977 | 00000000 | |
978 | 00000000 | |
979 | 00000000 | |
980 | 00000000 | |
981 | 00000000 | |
982 | 00000000 | |
983 | 00000000 | |
984 | 00000000 | |
985 | 00000000 | |
986 | 00000000 | |
987 | 00000000 | |
988 | 00000000 | |
989 | 00000000 | |
990 | 00000000 | |
991 | 00000000 | |
992 | 00000000 | |
993 | 00000000 | |
994 | 00000000 | |
995 | 00000000 | |
996 | 00000000 | |
997 | 00000000 | |
998 | 00000000 | |
999 | 00000000 | |
1000 | 00000000 | |
1001 | 00000000 | |
1002 | 00000000 | |
1003 | 00000000 | |
1004 | 00000000 | |
1005 | 00000000 | |
1006 | 00000000 | |
1007 | 00000000 | |
1008 | 00000000 | |
1009 | 00000000 | |
1010 | 00000000 | |
1011 | 00000000 | |
1012 | 00000000 | |
1013 | 00000000 | |
1014 | 00000000 | |
1015 | 00000000 | |
1016 | 00000000 | |
1017 | 00000000 | |
1018 | 00000000 | |
1019 | 00000000 | |
1020 | 00000000 | |
1021 | 00000000 | |
1022 | 00000000 | |
1023 | 00000000 | |
1024 | 00000000 |
lm32/logic/sakc/firmware/cain_loader/linker.ld | ||
---|---|---|
1 | OUTPUT_FORMAT("elf32-lm32") | |
2 | ENTRY(_start) | |
3 | ||
4 | __DYNAMIC = 0; | |
5 | ||
6 | ||
7 | _BRAM_START = 0x00000000; | |
8 | _BRAM_SIZE = 0x1000; | |
9 | _BRAM_END = _BRAM_START + _BRAM_SIZE; | |
10 | ||
11 | MEMORY { | |
12 | bram : ORIGIN = 0x00000000, LENGTH = 0x1000 /* 4k */ | |
13 | } | |
14 | ||
15 | SECTIONS | |
16 | { | |
17 | .text : | |
18 | { | |
19 | _ftext = .; | |
20 | *(.text .stub .text.* .gnu.linkonce.t.*) | |
21 | _etext = .; | |
22 | } > bram | |
23 | ||
24 | .rodata : | |
25 | { | |
26 | . = ALIGN(4); | |
27 | _frodata = .; | |
28 | *(.rodata .rodata.* .gnu.linkonce.r.*) | |
29 | *(.rodata1) | |
30 | _erodata = .; | |
31 | } > bram | |
32 | ||
33 | .data : | |
34 | { | |
35 | . = ALIGN(4); | |
36 | _fdata = .; | |
37 | *(.data .data.* .gnu.linkonce.d.*) | |
38 | *(.data1) | |
39 | _gp = ALIGN(16); | |
40 | *(.sdata .sdata.* .gnu.linkonce.s.*) | |
41 | _edata = .; | |
42 | } > bram | |
43 | ||
44 | .bss : | |
45 | { | |
46 | . = ALIGN(4); | |
47 | _fbss = .; | |
48 | *(.dynsbss) | |
49 | *(.sbss .sbss.* .gnu.linkonce.sb.*) | |
50 | *(.scommon) | |
51 | *(.dynbss) | |
52 | *(.bss .bss.* .gnu.linkonce.b.*) | |
53 | *(COMMON) | |
54 | _ebss = .; | |
55 | _end = .; | |
56 | } > bram | |
57 | } | |
58 | ||
59 | PROVIDE(_fstack = ORIGIN(bram) + LENGTH(bram) - 4); |
lm32/logic/sakc/firmware/cain_loader/main.c | ||
---|---|---|
1 | /** | |
2 | * Primitive first stage bootloader | |
3 | * | |
4 | * | |
5 | */ | |
6 | #include "soc-hw.h" | |
7 | ||
8 | /* prototypes */ | |
9 | uint32_t read_uint32() | |
10 | { | |
11 | uint32_t val = 0, i; | |
12 | ||
13 | for (i = 0; i < 4; i++) { | |
14 | val <<= 8; | |
15 | val += (uint8_t)uart_getchar(); | |
16 | } | |
17 | ||
18 | return val; | |
19 | } | |
20 | ||
21 | void hexprint(unsigned int hexval) | |
22 | { | |
23 | int digit[8], pos; | |
24 | uart_putstr("0x"); | |
25 | for(pos = 0; pos < 8; pos++) | |
26 | { | |
27 | digit[pos] = (hexval & 0xF); /* last hexit */ | |
28 | hexval = hexval >> 4; | |
29 | } | |
30 | for(pos = 7; pos > -1; pos--) | |
31 | { | |
32 | if(digit[pos] < 0xA) | |
33 | uart_putstr((char *)digit[pos] + '0'); | |
34 | else | |
35 | uart_putstr((char *)digit[pos] + 'A' - 10); | |
36 | } | |
37 | uart_putchar(' '); | |
38 | } | |
39 | ||
40 | ||
41 | int main(int argc, char **argv) | |
42 | { | |
43 | int8_t *p; | |
44 | uint8_t c; | |
45 | int key, len, autoboot = 1, dispmenu = 1; | |
46 | ||
47 | // Initialize UART | |
48 | uart_init(); | |
49 | ||
50 | ||
51 | ||
52 | ||
53 | while(1){ /* loop forever until u-boot gets booted or the board is reset */ | |
54 | if(dispmenu){ | |
55 | uart_putstr("\n1: Upload program to RAM\r\n"); | |
56 | // uart_putstr("2: Upload u-boot to Dataflash\r\n"); | |
57 | // uart_putstr("3: Upload Kernel to Dataflash\r\n"); | |
58 | // uart_putstr("4: Start u-boot\r\n"); | |
59 | // uart_putstr("5: Upload Filesystem image\r\n"); | |
60 | // uart_putstr("6: Memory test\r\n"); | |
61 | dispmenu = 0; | |
62 | } | |
63 | ||
64 | key = uart_getchar(); | |
65 | autoboot = 0; | |
66 | ||
67 | if(key == '1'){ | |
68 | len = rxmodem((unsigned char *)0x2000); | |
69 | uart_putstr("Received "); | |
70 | hexprint(len); | |
71 | uart_putstr(" bytes\r\n"); | |
72 | // jump(0x1000); | |
73 | dispmenu = 1; | |
74 | } | |
75 | else{ | |
76 | uart_putstr("Invalid input\r\n"); | |
77 | dispmenu = 1; | |
78 | } | |
79 | ||
80 | ||
81 | ||
82 | } | |
83 | ||
84 | ||
85 | ||
86 | c = '*'; // print msg on first iteration | |
87 | for(;;) { | |
88 | uint32_t start, size; | |
89 | ||
90 | switch (c) { | |
91 | case 'u': // upload | |
92 | start = read_uint32(); | |
93 | size = read_uint32(); | |
94 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
95 | *p = uart_getchar(); | |
96 | break; | |
97 | case 'd': // download | |
98 | start = read_uint32(); | |
99 | size = read_uint32(); | |
100 | for (p = (int8_t *) start; p < (int8_t *) (start+size); p++) | |
101 | uart_putchar( *p ); | |
102 | break; | |
103 | case 'g': // goto | |
104 | start = read_uint32(); | |
105 | jump(start); | |
106 | break; | |
107 | default: | |
108 | uart_putstr("**SAKC/bootloader** > \r\n"); | |
109 | break; | |
110 | }; | |
111 | c = uart_getchar(); | |
112 | } | |
113 | } | |
114 |
lm32/logic/sakc/firmware/cain_loader/soc-hw.c | ||
---|---|---|
1 | #include "soc-hw.h" | |
2 | ||
3 | uart_t *uart0 = (uart_t *) 0xF0000000; | |
4 | timer_t *timer0 = (timer_t *) 0xF0010000; | |
5 | gpio_t *gpio0 = (gpio_t *) 0xF0020000; | |
6 | // uint32_t *sram0 = (uint32_t *) 0x40000000; | |
7 | ||
8 | uint32_t msec = 0; | |
9 | ||
10 | /*************************************************************************** | |
11 | * General utility functions | |
12 | */ | |
13 | void sleep(int msec) | |
14 | { | |
15 | uint32_t tcr; | |
16 | ||
17 | // Use timer0.1 | |
18 | timer0->compare1 = (FCPU/1000)*msec; | |
19 | timer0->counter1 = 0; | |
20 | timer0->tcr1 = TIMER_EN | TIMER_IRQEN; | |
21 | ||
22 | do { | |
23 | //halt(); | |
24 | tcr = timer0->tcr1; | |
25 | } while ( ! (tcr & TIMER_TRIG) ); | |
26 | } | |
27 | ||
28 | void tic_init() | |
29 | { | |
30 | // Setup timer0.0 | |
31 | timer0->compare0 = (FCPU/1000); | |
32 | timer0->counter0 = 0; | |
33 | timer0->tcr0 = TIMER_EN | TIMER_AR | TIMER_IRQEN; | |
34 | } | |
35 | ||
36 | /*************************************************************************** | |
37 | * UART Functions | |
38 | */ | |
39 | void uart_init() | |
40 | { | |
41 | //uart0->ier = 0x00; // Interrupt Enable Register | |
42 | //uart0->lcr = 0x03; // Line Control Register: 8N1 | |
43 | //uart0->mcr = 0x00; // Modem Control Register | |
44 | ||
45 | // Setup Divisor register (Fclk / Baud) | |
46 | //uart0->div = (FCPU/(57600*16)); | |
47 | } | |
48 | ||
49 | char uart_getchar() | |
50 | { | |
51 | while (! (uart0->ucr & UART_DR)) ; | |
52 | return uart0->rxtx; | |
53 | } | |
54 | ||
55 | void uart_putchar(char c) | |
56 | { | |
57 | while (uart0->ucr & UART_BUSY) ; | |
58 | uart0->rxtx = c; | |
59 | } | |
60 | ||
61 | void uart_putstr(char *str) | |
62 | { | |
63 | char *c = str; | |
64 | while(*c) { | |
65 | uart_putchar(*c); | |
66 | c++; | |
67 | } | |
68 | } | |
69 |
lm32/logic/sakc/firmware/cain_loader/soc-hw.h | ||
---|---|---|
1 | #ifndef SPIKEHW_H | |
2 | #define SPIKEHW_H | |
3 | ||
4 | #define PROMSTART 0x00000000 | |
5 | #define RAMSTART 0x00000800 | |
6 | #define RAMSIZE 0x400 | |
7 | #define RAMEND (RAMSTART + RAMSIZE) | |
8 | ||
9 | #define RAM_START 0x40000000 | |
10 | #define RAM_SIZE 0x04000000 | |
11 | ||
12 | #define FCPU 50000000 | |
13 | ||
14 | #define UART_RXBUFSIZE 32 | |
15 | ||
16 | /**************************************************************************** | |
17 | * Types | |
18 | */ | |
19 | typedef unsigned int uint32_t; // 32 Bit | |
20 | typedef signed int int32_t; // 32 Bit | |
21 | ||
22 | typedef unsigned char uint8_t; // 8 Bit | |
23 | typedef signed char int8_t; // 8 Bit | |
24 | ||
25 | /**************************************************************************** | |
26 | * Interrupt handling | |
27 | */ | |
28 | typedef void(*isr_ptr_t)(void); | |
29 | ||
30 | void irq_enable(); | |
31 | void irq_disable(); | |
32 | void irq_set_mask(uint32_t mask); | |
33 | uint32_t irq_get_mak(); | |
34 | ||
35 | void isr_init(); | |
36 | void isr_register(int irq, isr_ptr_t isr); | |
37 | void isr_unregister(int irq); | |
38 | ||
39 | /**************************************************************************** | |
40 | * General Stuff | |
41 | */ | |
42 | void halt(); | |
43 | void jump(uint32_t addr); | |
44 | ||
45 | ||
46 | /**************************************************************************** | |
47 | * Timer | |
48 | */ | |
49 | #define TIMER_EN 0x08 // Enable Timer | |
50 | #define TIMER_AR 0x04 // Auto-Reload | |
51 | #define TIMER_IRQEN 0x02 // IRQ Enable | |
52 | #define TIMER_TRIG 0x01 // Triggered (reset when writing to TCR) | |
53 | ||
54 | typedef struct { | |
55 | volatile uint32_t tcr0; | |
56 | volatile uint32_t compare0; | |
57 | volatile uint32_t counter0; | |
58 | volatile uint32_t tcr1; | |
59 | volatile uint32_t compare1; | |
60 | volatile uint32_t counter1; | |
61 | } timer_t; | |
62 | ||
63 | void msleep(uint32_t msec); | |
64 | void nsleep(uint32_t nsec); | |
65 | ||
66 | void tic_init(); | |
67 | ||
68 | ||
69 | /*************************************************************************** | |
70 | * GPIO0 | |
71 | */ | |
72 | typedef struct { | |
73 | volatile uint32_t ctrl; | |
74 | volatile uint32_t dummy1; | |
75 | volatile uint32_t dummy2; | |
76 | volatile uint32_t dummy3; | |
77 | volatile uint32_t in; | |
78 | volatile uint32_t out; | |
79 | volatile uint32_t oe; | |
80 | } gpio_t; | |
81 | ||
82 | /*************************************************************************** | |
83 | * UART0 | |
84 | */ | |
85 | #define UART_DR 0x01 // RX Data Ready | |
86 | #define UART_ERR 0x02 // RX Error | |
87 | #define UART_BUSY 0x10 // TX Busy | |
88 | ||
89 | typedef struct { | |
90 | volatile uint32_t ucr; | |
91 | volatile uint32_t rxtx; | |
92 | } uart_t; | |
93 | ||
94 | void uart_init(); | |
95 | void uart_putchar(char c); | |
96 | void uart_putstr(char *str); | |
97 | char uart_getchar(); | |
98 | ||
99 | ||
100 | /*************************************************************************** | |
101 | * Pointer to actual components | |
102 | */ | |
103 | extern timer_t *timer0; | |
104 | extern uart_t *uart0; | |
105 | extern gpio_t *gpio0; | |
106 | extern uint32_t *sram0; | |
107 | ||
108 | #endif // SPIKEHW_H |
lm32/logic/sakc/firmware/cain_loader/xmodem.c | ||
---|---|---|
1 | /* | |
2 | Copyright 2001, 2002 Georges Menie (www.menie.org) | |
3 | Copyright 2004 Darrell Harmon modified to work in a bootloader | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU Lesser General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU Lesser General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU Lesser General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #include "soc-hw.h" | |
21 | ||
22 | #define SOH 0x01 | |
23 | #define EOT 0x04 | |
24 | #define ACK 0x06 | |
25 | #define NAK 0x15 | |
26 | ||
27 | ||
28 | /* CRC16 implementation acording to CCITT standards */ | |
29 | ||
30 | static const unsigned short crc16tab[256]= { | |
31 | 0x0000,0x1021,0x2042,0x3063,0x4084,0x50a5,0x60c6,0x70e7, | |
32 | 0x8108,0x9129,0xa14a,0xb16b,0xc18c,0xd1ad,0xe1ce,0xf1ef, | |
33 | 0x1231,0x0210,0x3273,0x2252,0x52b5,0x4294,0x72f7,0x62d6, | |
34 | 0x9339,0x8318,0xb37b,0xa35a,0xd3bd,0xc39c,0xf3ff,0xe3de, | |
35 | 0x2462,0x3443,0x0420,0x1401,0x64e6,0x74c7,0x44a4,0x5485, | |
36 | 0xa56a,0xb54b,0x8528,0x9509,0xe5ee,0xf5cf,0xc5ac,0xd58d, | |
37 | 0x3653,0x2672,0x1611,0x0630,0x76d7,0x66f6,0x5695,0x46b4, | |
38 | 0xb75b,0xa77a,0x9719,0x8738,0xf7df,0xe7fe,0xd79d,0xc7bc, | |
39 | 0x48c4,0x58e5,0x6886,0x78a7,0x0840,0x1861,0x2802,0x3823, | |
40 | 0xc9cc,0xd9ed,0xe98e,0xf9af,0x8948,0x9969,0xa90a,0xb92b, | |
41 | 0x5af5,0x4ad4,0x7ab7,0x6a96,0x1a71,0x0a50,0x3a33,0x2a12, | |
42 | 0xdbfd,0xcbdc,0xfbbf,0xeb9e,0x9b79,0x8b58,0xbb3b,0xab1a, | |
43 | 0x6ca6,0x7c87,0x4ce4,0x5cc5,0x2c22,0x3c03,0x0c60,0x1c41, | |
44 | 0xedae,0xfd8f,0xcdec,0xddcd,0xad2a,0xbd0b,0x8d68,0x9d49, | |
45 | 0x7e97,0x6eb6,0x5ed5,0x4ef4,0x3e13,0x2e32,0x1e51,0x0e70, | |
46 | 0xff9f,0xefbe,0xdfdd,0xcffc,0xbf1b,0xaf3a,0x9f59,0x8f78, | |
47 | 0x9188,0x81a9,0xb1ca,0xa1eb,0xd10c,0xc12d,0xf14e,0xe16f, | |
48 | 0x1080,0x00a1,0x30c2,0x20e3,0x5004,0x4025,0x7046,0x6067, | |
49 | 0x83b9,0x9398,0xa3fb,0xb3da,0xc33d,0xd31c,0xe37f,0xf35e, | |
50 | 0x02b1,0x1290,0x22f3,0x32d2,0x4235,0x5214,0x6277,0x7256, | |
51 | 0xb5ea,0xa5cb,0x95a8,0x8589,0xf56e,0xe54f,0xd52c,0xc50d, | |
52 | 0x34e2,0x24c3,0x14a0,0x0481,0x7466,0x6447,0x5424,0x4405, | |
53 | 0xa7db,0xb7fa,0x8799,0x97b8,0xe75f,0xf77e,0xc71d,0xd73c, | |
54 | 0x26d3,0x36f2,0x0691,0x16b0,0x6657,0x7676,0x4615,0x5634, | |
55 | 0xd94c,0xc96d,0xf90e,0xe92f,0x99c8,0x89e9,0xb98a,0xa9ab, | |
56 | 0x5844,0x4865,0x7806,0x6827,0x18c0,0x08e1,0x3882,0x28a3, | |
57 | 0xcb7d,0xdb5c,0xeb3f,0xfb1e,0x8bf9,0x9bd8,0xabbb,0xbb9a, | |
58 | 0x4a75,0x5a54,0x6a37,0x7a16,0x0af1,0x1ad0,0x2ab3,0x3a92, | |
59 | 0xfd2e,0xed0f,0xdd6c,0xcd4d,0xbdaa,0xad8b,0x9de8,0x8dc9, | |
60 | 0x7c26,0x6c07,0x5c64,0x4c45,0x3ca2,0x2c83,0x1ce0,0x0cc1, | |
61 | 0xef1f,0xff3e,0xcf5d,0xdf7c,0xaf9b,0xbfba,0x8fd9,0x9ff8, | |
62 | 0x6e17,0x7e36,0x4e55,0x5e74,0x2e93,0x3eb2,0x0ed1,0x1ef0 | |
63 | }; | |
64 | ||
65 | unsigned short crc16_ccitt(const void *buf, int len) | |
66 | { | |
67 | int counter; | |
68 | unsigned short crc = 0; | |
69 | for( counter = 0; counter < len; counter++) | |
70 | crc = (crc<<8) ^ crc16tab[((crc>>8) ^ *(char *)buf++)&0x00FF]; | |
71 | return crc; | |
72 | } | |
73 | ||
74 | int rxmodem(unsigned char *dest) | |
75 | { | |
76 | unsigned long *ptr = (unsigned long *) 0x0; | |
77 | unsigned short crc, tcrc; | |
78 | int i, pid = 1, len = 0; | |
79 | ||
80 | for(i = 0; i < 0x20000; i++) { asm("nop;"); } | |
81 | uart_putstr("Receiving Xmodem transfer\n"); | |
82 | uart_getchar (); | |
83 | for(i = 0; i < 0x20000; i++) { asm("nop;"); } | |
84 | uart_putchar ('C'); | |
85 | ||
86 | while(1) | |
87 | { | |
88 | int c, pid1, pid2; | |
89 | ||
90 | c = uart_getchar (); | |
91 | if (c != SOH) | |
92 | { | |
93 | if (c == EOT) | |
94 | { | |
95 | uart_putchar (ACK); | |
96 | return len; | |
97 | } | |
98 | else | |
99 | return 0; | |
100 | } | |
101 | ||
102 | pid1 = uart_getchar (); | |
103 | pid2 = uart_getchar (); | |
104 | ||
105 | if ((pid1 & 0xFF) != (~pid2 & 0xFF)) | |
106 | return 0; | |
107 | ||
108 | if (pid1 != pid) | |
109 | return 0; | |
110 | ||
111 | for (i = 0; i < 130; i++) | |
112 | *dest++ = uart_getchar (); | |
113 | ||
114 | crc = crc16_ccitt (dest - 130, 128); | |
115 | tcrc = (*(dest - 2)<<8) + *(dest - 1); | |
116 | if (crc != tcrc) | |
117 | return 0; | |
118 | else | |
119 | { | |
120 | pid = (pid + 1) & 0xFF; | |
121 | dest -= 2; | |
122 | len += 128; | |
123 | uart_putchar (ACK); | |
124 | } | |
125 | } | |
126 | } | |
127 |
lm32/logic/sakc/firmware/loader_cain/Makefile | ||
---|---|---|
1 | LM32_CC=lm32-elf-gcc | |
2 | LM32_LD=lm32-elf-ld | |
3 | LM32_OBJCOPY=lm32-elf-objcopy | |
4 | LM32_OBJDUMP=lm32-elf-objdump | |
5 | ||
6 | SREC2VRAM ?= ../../tools/srec2vram/srec2vram | |
7 | VRAMFILE=image.ram | |
8 | ||
9 | CFLAGS=-MMD -O2 -Wall -g -s -fomit-frame-pointer -mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled | |
10 | LDFLAGS=-nostdlib -nodefaultlibs -Tlinker.ld | |
11 | SEGMENTS = -j .text -j .rodata -j .data | |
12 | ||
13 | all: image.srec $(VRAMFILE) | |
14 | ||
15 | crt0ram.o: crt0ram.S | |
16 | $(LM32_CC) $(CFLAGS) -c crt0ram.S | |
17 | ||
18 | main.o: main.c | |
19 | $(LM32_CC) $(CFLAGS) -c main.c | |
20 | ||
21 | soc-hw.o: soc-hw.c | |
22 | $(LM32_CC) $(CFLAGS) -c soc-hw.c | |
23 | ||
24 | xmodem.o: xmodem.c | |
25 | $(LM32_CC) $(CFLAGS) -c xmodem.c | |
26 | ||
27 | image: crt0ram.o main.o soc-hw.o xmodem.o | |
28 | $(LM32_LD) $(LDFLAGS) -Map image.map -N -o image crt0ram.o main.o soc-hw.o xmodem.o | |
29 | ||
30 | image.lst: image | |
31 | $(LM32_OBJDUMP) -h -S $< > $@ | |
32 | ||
33 | image.bin: image | |
34 | $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.bin | |
35 | $(LM32_OBJCOPY) $(SEGMENTS) -O binary image image_bin.bin | |
36 | ||
37 | image.srec: image image.lst | |
38 | $(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec | |
39 | ||
40 | $(VHDLFILE): image.srec | |
41 | $(SREC2VHDL) image.srec > $(VHDLFILE) | |
42 | ||
43 | $(VRAMFILE): image.srec | |
44 | $(SREC2VRAM) image.srec 0x00000000 0x1000 > $(VRAMFILE) | |
45 | ||
46 | clean: | |
47 | rm -f image image.lst image.bin image.srec image.map image.ram *.o *.d | |
48 | ||
49 | DEPS := $(wildcard *.d) | |
50 | ifneq ($(DEPS),) | |
51 | include $(DEPS) | |
52 | endif | |
53 |
lm32/logic/sakc/firmware/loader_cain/crt0ram.S | ||
---|---|---|
1 | /* | |
2 | * LatticeMico32 C startup code. | |
3 | * | |
4 | * Redistribution and use in source and binary forms, with or without | |
5 | * modification, are permitted provided that the following conditions | |
6 | * are met: | |
7 | * 1. Redistributions of source code must retain the above copyright | |
8 | * notice, this list of conditions and the following disclaimer. | |
9 | * 2. Redistributions in binary form must reproduce the above copyright | |
10 | * notice, this list of conditions and the following disclaimer in the | |
11 | * documentation and/or other materials provided with the distribution. | |
12 | * | |
13 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
14 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
15 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
16 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE | |
17 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
18 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
19 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
20 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
21 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
22 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
23 | * SUCH DAMAGE. | |
24 | */ | |
25 | ||
26 | /* Exception handlers - Must be 32 bytes long. */ | |
27 | .section .text, "ax", @progbits | |
28 | .global _start | |
29 | .global irq_enable, irq_disable, irq_mask, jump, halt | |
30 | _start: | |
31 | _reset_handler: | |
32 | xor r0, r0, r0 | |
33 | wcsr IE, r0 | |
34 | mvhi r1, hi(_reset_handler) | |
35 | ori r1, r1, lo(_reset_handler) | |
36 | wcsr EBA, r1 | |
37 | calli _crt0 | |
38 | nop | |
39 | nop | |
40 | ||
41 | _crt0: | |
42 | /* Setup stack and global pointer */ | |
43 | mvhi sp, hi(_fstack) | |
44 | ori sp, sp, lo(_fstack) | |
45 | mvhi gp, hi(_gp) | |
46 | ori gp, gp, lo(_gp) | |
47 | ||
48 | /* Clear BSS */ | |
49 | mvhi r1, hi(_fbss) | |
50 | ori r1, r1, lo(_fbss) | |
51 | mvhi r3, hi(_ebss) | |
52 | ori r3, r3, lo(_ebss) | |
53 | .clearBSS: | |
54 | be r1, r3, .callMain | |
55 | sw (r1+0), r0 | |
56 | addi r1, r1, 4 | |
57 | bi .clearBSS | |
58 | ||
59 | .callMain: | |
60 | mvi r1, 0 | |
61 | mvi r2, 0 | |
62 | mvi r3, 0 | |
63 | calli main | |
64 | ||
65 | irq_enable: | |
66 | mvi r1, 1 | |
67 | wcsr IE, r1 | |
68 | ret | |
69 | ||
70 | irq_mask: | |
71 | mvi r1, 0x0000000f | |
72 | wcsr IM, r1 | |
73 | ret | |
74 | ||
75 | irq_disable: | |
76 | mvi r1, 0 | |
77 | wcsr IE, r1 | |
78 | ret | |
79 | ||
80 | jump: | |
81 | b r1 | |
82 | ||
83 | halt: | |
84 | bi halt | |
85 |
lm32/logic/sakc/firmware/loader_cain/linker.ld | ||
---|---|---|
1 | OUTPUT_FORMAT("elf32-lm32") | |
2 | ENTRY(_start) | |
3 | ||
4 | __DYNAMIC = 0; | |
5 | ||
6 | ||
7 | _BRAM_START = 0x00000000; | |
8 | _BRAM_SIZE = 0x1000; | |
9 | _BRAM_END = _BRAM_START + _BRAM_SIZE; | |
10 | ||
11 | MEMORY { | |
12 | bram : ORIGIN = 0x00000000, LENGTH = 0x1000 /* 4k */ | |
13 | } | |
14 | ||
15 | SECTIONS | |
16 | { | |
17 | .text : | |
18 | { | |
19 | _ftext = .; | |
20 | *(.text .stub .text.* .gnu.linkonce.t.*) | |
21 | _etext = .; | |
22 | } > bram | |
23 | ||
24 | .rodata : | |
25 | { | |
26 | . = ALIGN(4); | |
27 | _frodata = .; | |
28 | *(.rodata .rodata.* .gnu.linkonce.r.*) | |
29 | *(.rodata1) | |
30 | _erodata = .; | |
31 | } > bram | |
32 | ||
33 | .data : | |
34 | { | |
35 | . = ALIGN(4); | |
36 | _fdata = .; | |
37 | *(.data .data.* .gnu.linkonce.d.*) | |
38 | *(.data1) | |
39 | _gp = ALIGN(16); | |
40 | *(.sdata .sdata.* .gnu.linkonce.s.*) | |
41 | _edata = .; | |
42 | } > bram | |
43 | ||
44 | .bss : | |
45 | { | |
46 | . = ALIGN(4); | |
47 | _fbss = .; | |
48 | *(.dynsbss) | |
49 | *(.sbss .sbss.* .gnu.linkonce.sb.*) | |
50 | *(.scommon) | |
51 | *(.dynbss) | |
52 | *(.bss .bss.* .gnu.linkonce.b.*) | |
53 | *(COMMON) | |
54 | _ebss = .; | |
55 | _end = .; | |
56 | } > bram | |
57 | } | |
58 | ||
59 | PROVIDE(_fstack = ORIGIN(bram) + LENGTH(bram) - 4); |
lm32/logic/sakc/firmware/loader_cain/main.c | ||
---|---|---|
1 | #include "soc-hw.h" | |
2 | ||
3 | unsigned int i, j,k; // Loop counter. | |
4 | ||
5 | ||
6 | int main() { | |
7 | int key, len, autoboot = 1, dispmenu = 1; | |
8 | ||
9 | uart_putstr("Cain's bootloader!!! \r\n"); | |
10 | ||
11 | while(1){ /* loop forever until u-boot gets booted or the board is reset */ | |
12 | if(dispmenu){ | |
13 | uart_putstr("\n1: Upload program to RAM\r\n"); | |
14 | // uart_putstr("2: Upload u-boot to Dataflash\r\n"); | |
15 | // uart_putstr("3: Upload Kernel to Dataflash\r\n"); | |
16 | // uart_putstr("4: Start u-boot\r\n"); | |
17 | // uart_putstr("5: Upload Filesystem image\r\n"); | |
18 | // uart_putstr("6: Memory test\r\n"); | |
19 | dispmenu = 0; | |
20 | } | |
21 | key = uart_getchar(); | |
22 | autoboot = 0; | |
23 | ||
24 | if(key == '1'){ | |
25 | len = rxmodem((unsigned char *)0x1000); | |
26 | uart_putstr("Received "); | |
27 | hexprint(len); | |
28 | uart_putstr(" bytes\r\n"); | |
29 | // jump(RAM_BASE); | |
30 | dispmenu = 1; | |
31 | } | |
32 | else{ | |
33 | uart_putstr("Invalid input\r\n"); | |
34 | dispmenu = 1; | |
35 | } | |
36 | } | |
37 | ||
38 | while(1){ asm("nop;"); } | |
39 | ||
40 | return (0); | |
41 | } |
lm32/logic/sakc/firmware/loader_cain/soc-hw.c | ||
---|---|---|
1 | #include "soc-hw.h" | |
2 | ||
3 | uart_t *uart0 = (uart_t *) 0xF0000000; | |
4 | timer_t *timer0 = (timer_t *) 0xF0010000; | |
5 | gpio_t *gpio0 = (gpio_t *) 0xF0020000; | |
6 | ||
7 | uint32_t msec = 0; | |
8 | ||
9 | /*************************************************************************** | |
10 | * General utility functions | |
11 | */ | |
12 | void sleep(int msec) | |
13 | { | |
14 | uint32_t tcr; | |
15 | ||
16 | // Use timer0.1 | |
17 | timer0->compare1 = (FCPU/1000)*msec; | |
18 | timer0->counter1 = 0; | |
19 | timer0->tcr1 = TIMER_EN | TIMER_IRQEN; | |
20 | ||
21 | do { | |
22 | //halt(); | |
23 | tcr = timer0->tcr1; | |
24 | } while ( ! (tcr & TIMER_TRIG) ); | |
25 | } | |
26 | ||
27 | void tic_init() | |
28 | { | |
29 | // Setup timer0.0 | |
30 | timer0->compare0 = (FCPU/1000); | |
31 | timer0->counter0 = 0; | |
32 | timer0->tcr0 = TIMER_EN | TIMER_AR | TIMER_IRQEN; | |
33 | } | |
34 | ||
35 | /*************************************************************************** | |
36 | * UART Functions | |
37 | */ | |
38 | void uart_init() | |
39 | { | |
40 | //uart0->ier = 0x00; // Interrupt Enable Register | |
41 | //uart0->lcr = 0x03; // Line Control Register: 8N1 | |
42 | //uart0->mcr = 0x00; // Modem Control Register | |
43 | ||
44 | // Setup Divisor register (Fclk / Baud) | |
45 | //uart0->div = (FCPU/(57600*16)); | |
46 | } | |
47 | ||
48 | char uart_getchar() | |
49 | { | |
50 | while (! (uart0->ucr & UART_DR)) ; | |
51 | return uart0->rxtx; | |
52 | } | |
53 | ||
54 | void uart_putchar(char c) | |
55 | { | |
56 | while (uart0->ucr & UART_BUSY) ; | |
57 | uart0->rxtx = c; | |
58 | } | |
59 | ||
60 | void uart_putstr(char *str) | |
61 | { | |
62 | char *c = str; | |
63 | while(*c) { | |
64 | uart_putchar(*c); | |
65 | c++; | |
66 | } | |
67 | } | |
68 | ||
69 | void hexprint(unsigned int hexval) | |
70 | { | |
71 | int digit[8], pos; | |
72 | uart_putstr("0x"); | |
73 | for(pos = 0; pos < 8; pos++) | |
74 | { | |
75 | digit[pos] = (hexval & 0xF); /* last hexit */ | |
76 | hexval = hexval >> 4; | |
77 | } | |
78 | for(pos = 7; pos > -1; pos--) | |
79 | { | |
80 | if(digit[pos] < 0xA) | |
81 | uart_putstr((char *)digit[pos] + '0'); | |
82 | else | |
83 | uart_putstr((char *)digit[pos] + 'A' - 10); | |
84 | } | |
85 | uart_putchar(' '); | |
86 | } | |
87 | ||
88 | ||
89 |
lm32/logic/sakc/firmware/loader_cain/soc-hw.h | ||
---|---|---|
1 | #ifndef SPIKEHW_H | |
2 | #define SPIKEHW_H | |
3 | ||
4 | #define PROMSTART 0x00000000 | |
5 | #define RAMSTART 0x00000800 | |
6 | #define RAMSIZE 0x400 | |
7 | #define RAMEND (RAMSTART + RAMSIZE) | |
8 | ||
9 | #define RAM_START 0x40000000 | |
10 | #define RAM_SIZE 0x04000000 | |
11 | ||
12 | #define FCPU 50000000 | |
13 | ||
14 | #define UART_RXBUFSIZE 32 | |
15 | ||
16 | /**************************************************************************** | |
17 | * Types | |
18 | */ | |
19 | typedef unsigned int uint32_t; // 32 Bit | |
20 | typedef signed int int32_t; // 32 Bit | |
21 | ||
22 | typedef unsigned char uint8_t; // 8 Bit | |
23 | typedef signed char int8_t; // 8 Bit | |
24 | ||
25 | /**************************************************************************** | |
26 | * Interrupt handling | |
27 | */ | |
28 | typedef void(*isr_ptr_t)(void); | |
29 | ||
30 | void irq_enable(); | |
31 | void irq_disable(); | |
32 | void irq_set_mask(uint32_t mask); | |
33 | uint32_t irq_get_mak(); | |
34 | ||
35 | void isr_init(); | |
36 | void isr_register(int irq, isr_ptr_t isr); | |
37 | void isr_unregister(int irq); | |
38 | ||
39 | /**************************************************************************** | |
40 | * General Stuff | |
41 | */ | |
42 | void halt(); | |
43 | void jump(uint32_t addr); | |
44 | ||
45 | ||
46 | /**************************************************************************** | |
47 | * Timer | |
48 | */ | |
49 | #define TIMER_EN 0x08 // Enable Timer | |
50 | #define TIMER_AR 0x04 // Auto-Reload | |
51 | #define TIMER_IRQEN 0x02 // IRQ Enable | |
52 | #define TIMER_TRIG 0x01 // Triggered (reset when writing to TCR) | |
53 | ||
54 | typedef struct { | |
55 | volatile uint32_t tcr0; | |
56 | volatile uint32_t compare0; | |
57 | volatile uint32_t counter0; | |
58 | volatile uint32_t tcr1; | |
59 | volatile uint32_t compare1; | |
60 | volatile uint32_t counter1; | |
61 | } timer_t; | |
62 | ||
63 | void msleep(uint32_t msec); | |
64 | void nsleep(uint32_t nsec); | |
65 | ||
66 | void tic_init(); | |
67 | ||
68 | ||
69 | /*************************************************************************** | |
70 | * GPIO0 | |
71 | */ | |
72 | typedef struct { | |
73 | volatile uint32_t ctrl; | |
74 | volatile uint32_t dummy1; | |
75 | volatile uint32_t dummy2; | |
76 | volatile uint32_t dummy3; | |
77 | volatile uint32_t in; | |
78 | volatile uint32_t out; | |
79 | volatile uint32_t oe; | |
80 | } gpio_t; | |
81 | ||
82 | /*************************************************************************** | |
83 | * UART0 | |
84 | */ | |
85 | #define UART_DR 0x01 // RX Data Ready | |
86 | #define UART_ERR 0x02 // RX Error | |
87 | #define UART_BUSY 0x10 // TX Busy | |
88 | ||
89 | typedef struct { | |
90 | volatile uint32_t ucr; | |
91 | volatile uint32_t rxtx; | |
92 | } uart_t; | |
93 | ||
94 | void uart_init(); | |
95 | void uart_putchar(char c); | |
96 | void uart_putstr(char *str); | |
97 | char uart_getchar(); | |
98 | ||
99 | ||
100 | /*************************************************************************** | |
101 | * Pointer to actual components | |
102 | */ | |
103 | extern timer_t *timer0; | |
104 | extern uart_t *uart0; | |
105 | extern gpio_t *gpio0; | |
106 | extern uint32_t *sram0; | |
107 | ||
108 | int rxmodem(unsigned char *dest); | |
109 | void hexprint(unsigned int hexval); | |
110 | ||
111 | #endif // SPIKEHW_H |
lm32/logic/sakc/firmware/loader_cain/xmodem.c | ||
---|---|---|
1 | /* | |
2 | Copyright 2001, 2002 Georges Menie (www.menie.org) | |
3 | Copyright 2004 Darrell Harmon modified to work in a bootloader | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU Lesser General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU Lesser General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU Lesser General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #include "soc-hw.h" | |
21 | ||
22 | #define SOH 0x01 | |
23 | #define EOT 0x04 | |
24 | #define ACK 0x06 | |
25 | #define NAK 0x15 | |
26 | ||
27 | ||
28 | /* CRC16 implementation acording to CCITT standards */ | |
29 | ||
30 | static const unsigned short crc16tab[256]= { | |
31 | 0x0000,0x1021,0x2042,0x3063,0x4084,0x50a5,0x60c6,0x70e7, | |
32 | 0x8108,0x9129,0xa14a,0xb16b,0xc18c,0xd1ad,0xe1ce,0xf1ef, | |
33 | 0x1231,0x0210,0x3273,0x2252,0x52b5,0x4294,0x72f7,0x62d6, | |
34 | 0x9339,0x8318,0xb37b,0xa35a,0xd3bd,0xc39c,0xf3ff,0xe3de, | |
35 | 0x2462,0x3443,0x0420,0x1401,0x64e6,0x74c7,0x44a4,0x5485, | |
36 | 0xa56a,0xb54b,0x8528,0x9509,0xe5ee,0xf5cf,0xc5ac,0xd58d, | |
37 | 0x3653,0x2672,0x1611,0x0630,0x76d7,0x66f6,0x5695,0x46b4, | |
38 | 0xb75b,0xa77a,0x9719,0x8738,0xf7df,0xe7fe,0xd79d,0xc7bc, | |
39 | 0x48c4,0x58e5,0x6886,0x78a7,0x0840,0x1861,0x2802,0x3823, | |
40 | 0xc9cc,0xd9ed,0xe98e,0xf9af,0x8948,0x9969,0xa90a,0xb92b, | |
41 | 0x5af5,0x4ad4,0x7ab7,0x6a96,0x1a71,0x0a50,0x3a33,0x2a12, | |
42 | 0xdbfd,0xcbdc,0xfbbf,0xeb9e,0x9b79,0x8b58,0xbb3b,0xab1a, | |
43 | 0x6ca6,0x7c87,0x4ce4,0x5cc5,0x2c22,0x3c03,0x0c60,0x1c41, | |
44 | 0xedae,0xfd8f,0xcdec,0xddcd,0xad2a,0xbd0b,0x8d68,0x9d49, | |
45 | 0x7e97,0x6eb6,0x5ed5,0x4ef4,0x3e13,0x2e32,0x1e51,0x0e70, | |
46 | 0xff9f,0xefbe,0xdfdd,0xcffc,0xbf1b,0xaf3a,0x9f59,0x8f78, | |
47 | 0x9188,0x81a9,0xb1ca,0xa1eb,0xd10c,0xc12d,0xf14e,0xe16f, | |
48 | 0x1080,0x00a1,0x30c2,0x20e3,0x5004,0x4025,0x7046,0x6067, | |
49 | 0x83b9,0x9398,0xa3fb,0xb3da,0xc33d,0xd31c,0xe37f,0xf35e, | |
50 | 0x02b1,0x1290,0x22f3,0x32d2,0x4235,0x5214,0x6277,0x7256, | |
51 | 0xb5ea,0xa5cb,0x95a8,0x8589,0xf56e,0xe54f,0xd52c,0xc50d, | |
52 | 0x34e2,0x24c3,0x14a0,0x0481,0x7466,0x6447,0x5424,0x4405, | |
53 | 0xa7db,0xb7fa,0x8799,0x97b8,0xe75f,0xf77e,0xc71d,0xd73c, | |
54 | 0x26d3,0x36f2,0x0691,0x16b0,0x6657,0x7676,0x4615,0x5634, | |
55 | 0xd94c,0xc96d,0xf90e,0xe92f,0x99c8,0x89e9,0xb98a,0xa9ab, | |
56 | 0x5844,0x4865,0x7806,0x6827,0x18c0,0x08e1,0x3882,0x28a3, | |
57 | 0xcb7d,0xdb5c,0xeb3f,0xfb1e,0x8bf9,0x9bd8,0xabbb,0xbb9a, | |
58 | 0x4a75,0x5a54,0x6a37,0x7a16,0x0af1,0x1ad0,0x2ab3,0x3a92, | |
59 | 0xfd2e,0xed0f,0xdd6c,0xcd4d,0xbdaa,0xad8b,0x9de8,0x8dc9, | |
60 | 0x7c26,0x6c07,0x5c64,0x4c45,0x3ca2,0x2c83,0x1ce0,0x0cc1, | |
61 | 0xef1f,0xff3e,0xcf5d,0xdf7c,0xaf9b,0xbfba,0x8fd9,0x9ff8, | |
62 | 0x6e17,0x7e36,0x4e55,0x5e74,0x2e93,0x3eb2,0x0ed1,0x1ef0 | |
63 | }; | |
64 | ||
65 | unsigned short crc16_ccitt(const void *buf, int len) | |
66 | { | |
67 | int counter; | |
68 | unsigned short crc = 0; | |
69 | for( counter = 0; counter < len; counter++) | |
70 | crc = (crc<<8) ^ crc16tab[((crc>>8) ^ *(char *)buf++)&0x00FF]; | |
71 | return crc; | |
72 | } | |
73 | ||
74 | int rxmodem(unsigned char *dest) | |
75 | { | |
76 | unsigned long *ptr = (unsigned long *) 0x0; | |
77 | unsigned short crc, tcrc; | |
78 | int i, pid = 1, len = 0; | |
79 | ||
80 | for (i = 0; i < 0x100000; i++) | |
81 | { | |
82 | *ptr = 0; | |
83 | ptr++; | |
84 | } | |
85 | ||
86 | ||
87 | uart_putstr("Receiving Xmodem transfer\n"); | |
88 | uart_getchar (); | |
89 | for(i = 0; i < 0x20000000; i++) { asm("nop;"); } | |
90 | uart_putchar ('C'); | |
91 | ||
92 | while(1) | |
93 | { | |
94 | int c, pid1, pid2; | |
95 | ||
96 | c = uart_getchar (); | |
97 | if (c != SOH) | |
98 | { | |
99 | if (c == EOT) | |
100 | { | |
101 | uart_putchar (ACK); | |
102 | return len; | |
103 | } | |
104 | else | |
105 | return 0; | |
106 | } | |
107 | ||
108 | pid1 = uart_getchar (); | |
109 | pid2 = uart_getchar (); | |
110 | ||
111 | if ((pid1 & 0xFF) != (~pid2 & 0xFF)) | |
112 | return 0; | |
113 | ||
114 | if (pid1 != pid) | |
115 | return 0; | |
116 | ||
117 | for (i = 0; i < 130; i++) | |
118 | *dest++ = uart_getchar (); | |
119 | ||
120 | crc = crc16_ccitt (dest - 130, 128); | |
121 | tcrc = (*(dest - 2)<<8) + *(dest - 1); | |
122 | if (crc != tcrc) | |
123 | return 0; | |
124 | else | |
125 | { | |
126 | pid = (pid + 1) & 0xFF; | |
127 | dest -= 2; | |
128 | len += 128; | |
129 | uart_putchar (ACK); | |
130 | } | |
131 | } | |
132 | } | |
133 |
lm32/logic/sakc/system.v | ||
---|---|---|
6 | 6 | |
7 | 7 | module system |
8 | 8 | #( |
9 | parameter bootram_file = "../firmware/loader_cain/image.ram", | |
9 | parameter bootram_file = "../firmware/cain_loader/image.ram", | |
10 | 10 | // parameter bootram_file = "../firmware/boot0-serial/image.ram", |
11 | 11 | parameter clk_freq = 50000000, |
12 | 12 | parameter uart_baud_rate = 57600 |
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