Date:2010-02-25 17:53:26 (9 years 10 months ago)
Author:Carlos Camargo
Commit:a8a55cfd90462d17267298f2a6cec70d4da75c28
Message:Compress u-boot patch

Files: u-boot_sakc/0003-add-sack-support.patch (1 diff)
u-boot_sakc/0003-add-sack-support.patch.gz (0 diffs)

Change Details

u-boot_sakc/0003-add-sack-support.patch
1diff -urN a/board/qi_lb60/config.mk b/board/qi_lb60/config.mk
2+++ b/board/qi_lb60/config.mk 2010-02-24 20:51:12.581795112 -0500
3@@ -19,7 +19,7 @@
4 #
5
6 #
7-# Qi Hardware, Inc. Ben NanoNote (QI_LB60)
8+# SACK Board
9 #
10
11 ifndef TEXT_BASE
12diff -urN a/board/sack/config.mk b/board/sack/config.mk
13+++ b/board/sack/config.mk 2010-02-24 20:51:04.189295427 -0500
14@@ -0,0 +1,31 @@
15+#
16+# (C) Copyright 2006 Qi Hardware, Inc.
17+# Author: Xiangfu Liu <xiangfu.z@gmail.com>
18+#
19+# This program is free software; you can redistribute it and/or
20+# modify it under the terms of the GNU General Public License as
21+# published by the Free Software Foundation; either version 2 of
22+# the License, or (at your option) any later version.
23+#
24+# This program is distributed in the hope that it will be useful,
25+# but WITHOUT ANY WARRANTY; without even the implied warranty of
26+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27+# GNU General Public License for more details.
28+#
29+# You should have received a copy of the GNU General Public License
30+# along with this program; if not, write to the Free Software
31+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32+# MA 02111-1307 USA
33+#
34+
35+#
36+# SACK Board
37+#
38+
39+ifndef TEXT_BASE
40+# ROM version
41+# TEXT_BASE = 0x88000000
42+
43+# RAM version
44+TEXT_BASE = 0x80100000
45+endif
46diff -urN a/board/sack/flash.c b/board/sack/flash.c
47+++ b/board/sack/flash.c 2010-02-24 20:51:55.173492988 -0500
48@@ -0,0 +1,50 @@
49+/*
50+ * (C) Copyright 2009 PI
51+ * xiangfu liu, <xiangfu@gmail.com>
52+ *
53+ * This program is free software; you can redistribute it and/or
54+ * modify it under the terms of the GNU General Public License as
55+ * published by the Free Software Foundation; either version 3 of
56+ * the License, or (at your option) any later version.
57+ *
58+ * This program is distributed in the hope that it will be useful,
59+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
60+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
61+ * GNU General Public License for more details.
62+ *
63+ * You should have received a copy of the GNU General Public License
64+ * along with this program; if not, write to the Free Software
65+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
66+ * MA 02111-1307 USA
67+ */
68+
69+#include <common.h>
70+
71+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
72+
73+/*
74+ * flash_init()
75+ *
76+ * sets up flash_info and returns size of FLASH (bytes)
77+ */
78+unsigned long flash_init (void)
79+{
80+ return (0);
81+}
82+
83+int flash_erase (flash_info_t * info, int s_first, int s_last)
84+{
85+ printf ("flash_erase not implemented\n");
86+ return 0;
87+}
88+
89+void flash_print_info (flash_info_t * info)
90+{
91+ printf ("flash_print_info not implemented\n");
92+}
93+
94+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
95+{
96+ printf ("write_buff not implemented\n");
97+ return (-1);
98+}
99diff -urN a/board/sack/Makefile b/board/sack/Makefile
100+++ b/board/sack/Makefile 2010-02-24 20:49:03.137972186 -0500
101@@ -0,0 +1,38 @@
102+#
103+# (C) Copyright 2006
104+# Ingenic Semiconductor, <jlwei@ingenic.cn>
105+#
106+# This program is free software; you can redistribute it and/or
107+# modify it under the terms of the GNU General Public License as
108+# published by the Free Software Foundation; either version 2 of
109+# the License, or (at your option) any later version.
110+#
111+# This program is distributed in the hope that it will be useful,
112+# but WITHOUT ANY WARRANTY; without even the implied warranty of
113+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
114+# GNU General Public License for more details.
115+#
116+# You should have received a copy of the GNU General Public License
117+# along with this program; if not, write to the Free Software
118+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
119+# MA 02111-1307 USA
120+#
121+
122+include $(TOPDIR)/config.mk
123+
124+LIB = lib$(BOARD).a
125+
126+OBJS = $(BOARD).o
127+SOBJS =
128+
129+$(LIB): .depend $(OBJS) $(SOBJS)
130+ $(AR) crv $@ $(OBJS) $(SOBJS)
131+
132+#########################################################################
133+
134+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
135+ $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
136+
137+sinclude .depend
138+
139+#########################################################################
140diff -urN a/board/sack/sack.c b/board/sack/sack.c
141+++ b/board/sack/sack.c 2010-02-24 23:14:37.029795516 -0500
142@@ -0,0 +1,128 @@
143+/*
144+ * Authors: Xiangfu Liu <xiangfu.z@gmail.com>
145+ *
146+ * This program is free software; you can redistribute it and/or
147+ * modify it under the terms of the GNU General Public License
148+ * as published by the Free Software Foundation; either version
149+ * 3 of the License, or (at your option) any later version.
150+ */
151+
152+#include <common.h>
153+#include <command.h>
154+#include <asm/mipsregs.h>
155+#include <asm/jz4740.h>
156+
157+DECLARE_GLOBAL_DATA_PTR;
158+
159+static void gpio_init(void)
160+{
161+ /*
162+ * Initialize NAND Flash Pins
163+ */
164+ __gpio_as_nand();
165+
166+ /*
167+ * Initialize SDRAM pins
168+ */
169+ __gpio_as_sdram_16bit_4725();
170+
171+ /*
172+ * Initialize UART0 pins
173+ */
174+ __gpio_as_uart0();
175+
176+ /*
177+ * Initialize LCD pins
178+ */
179+ __gpio_as_lcd_18bit();
180+
181+ /*
182+ * Initialize MSC pins
183+ */
184+ __gpio_as_msc();
185+
186+ /*
187+ * Initialize LCD pins
188+ */
189+ __gpio_as_lcd_18bit();
190+
191+ /*
192+ * Initialize SSI pins
193+ */
194+ __gpio_as_ssi();
195+
196+ /*
197+ * Initialize I2C pins
198+ */
199+ __gpio_as_i2c();
200+
201+ /*
202+ * Initialize MSC pins
203+ */
204+ __gpio_as_msc();
205+
206+ /*
207+ * Initialize Other pins
208+ */
209+ /* TODO SACK
210+ unsigned int i;
211+ for (i = 0; i < 7; i++){
212+ __gpio_as_input(GPIO_KEYIN_BASE + i);
213+ __gpio_enable_pull(GPIO_KEYIN_BASE + i);
214+ }
215+
216+ for (i = 0; i < 8; i++) {
217+ __gpio_as_output(GPIO_KEYOUT_BASE + i);
218+ __gpio_clear_pin(GPIO_KEYOUT_BASE + i);
219+ }
220+
221+ __gpio_as_output(GPIO_AUDIO_POP);
222+ __gpio_set_pin(GPIO_AUDIO_POP);
223+
224+ __gpio_as_output(GPIO_LCD_CS);
225+ __gpio_clear_pin(GPIO_LCD_CS);
226+
227+ __gpio_as_output(GPIO_AMP_EN);
228+ __gpio_clear_pin(GPIO_AMP_EN);
229+
230+ __gpio_as_output(GPIO_SDPW_EN);
231+ __gpio_disable_pull(GPIO_SDPW_EN);
232+ __gpio_clear_pin(GPIO_SDPW_EN);
233+
234+ __gpio_as_input(GPIO_SD_DETECT);
235+ __gpio_disable_pull(GPIO_SD_DETECT);
236+
237+ __gpio_as_input(GPIO_USB_DETECT);
238+ __gpio_enable_pull(GPIO_USB_DETECT);
239+ */
240+}
241+/* TODO SACK
242+static void cpm_init(void)
243+{
244+ __cpm_stop_ipu();
245+ __cpm_stop_cim();
246+ __cpm_stop_i2c();
247+ __cpm_stop_ssi();
248+ __cpm_stop_uart1();
249+ __cpm_stop_sadc();
250+ __cpm_stop_uhc();
251+ __cpm_stop_aic1();
252+ __cpm_stop_aic2();
253+}*/
254+
255+void board_early_init(void)
256+{
257+ gpio_init();
258+ //cpm_init(); //TODO SACK
259+}
260+
261+/* U-Boot common routines */
262+
263+int checkboard (void)
264+{
265+
266+ printf("Board: SACK (Ingenic XBurst Jz4725 SoC, Speed %d MHz)\n",
267+ gd->cpu_clk/1000000);
268+
269+ return 0; /* success */
270+}
271diff -urN a/board/sack/u-boot.lds b/board/sack/u-boot.lds
272+++ b/board/sack/u-boot.lds 2010-02-24 21:05:10.189795324 -0500
273@@ -0,0 +1,63 @@
274+/*
275+ * (C) Copyright 2006
276+ * Ingenic Semiconductor, <jlwei@ingenic.cn>
277+ *
278+ * This program is free software; you can redistribute it and/or
279+ * modify it under the terms of the GNU General Public License as
280+ * published by the Free Software Foundation; either version 2 of
281+ * the License, or (at your option) any later version.
282+ *
283+ * This program is distributed in the hope that it will be useful,
284+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
285+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
286+ * GNU General Public License for more details.
287+ *
288+ * You should have received a copy of the GNU General Public License
289+ * along with this program; if not, write to the Free Software
290+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
291+ * MA 02111-1307 USA
292+ */
293+
294+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
295+
296+OUTPUT_ARCH(mips)
297+ENTRY(_start)
298+SECTIONS
299+{
300+ . = 0x00000000;
301+
302+ . = ALIGN(4);
303+ .text :
304+ {
305+ *(.text)
306+ }
307+
308+ . = ALIGN(4);
309+ .rodata : { *(.rodata) }
310+
311+ . = ALIGN(4);
312+ .data : { *(.data) }
313+
314+ . = ALIGN(4);
315+ .sdata : { *(.sdata) }
316+
317+ _gp = ALIGN(16);
318+
319+ __got_start = .;
320+ .got : { *(.got) }
321+ __got_end = .;
322+
323+ .sdata : { *(.sdata) }
324+
325+ __u_boot_cmd_start = .;
326+ .u_boot_cmd : { *(.u_boot_cmd) }
327+ __u_boot_cmd_end = .;
328+
329+ uboot_end_data = .;
330+ num_got_entries = (__got_end - __got_start) >> 2;
331+
332+ . = ALIGN(4);
333+ .sbss : { *(.sbss) }
334+ .bss : { *(.bss) }
335+ uboot_end = .;
336+}
337diff -urN a/board/sack/u-boot-nand.lds b/board/sack/u-boot-nand.lds
338+++ b/board/sack/u-boot-nand.lds 2010-02-24 21:04:07.737295583 -0500
339@@ -0,0 +1,63 @@
340+/*
341+ * (C) Copyright 2006
342+ * Ingenic Semiconductor, <jlwei@ingenic.cn>
343+ *
344+ * This program is free software; you can redistribute it and/or
345+ * modify it under the terms of the GNU General Public License as
346+ * published by the Free Software Foundation; either version 2 of
347+ * the License, or (at your option) any later version.
348+ *
349+ * This program is distributed in the hope that it will be useful,
350+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
351+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
352+ * GNU General Public License for more details.
353+ *
354+ * You should have received a copy of the GNU General Public License
355+ * along with this program; if not, write to the Free Software
356+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
357+ * MA 02111-1307 USA
358+ */
359+
360+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
361+
362+OUTPUT_ARCH(mips)
363+ENTRY(_start)
364+SECTIONS
365+{
366+ . = 0x00000000;
367+
368+ . = ALIGN(4);
369+ .text :
370+ {
371+ *(.text)
372+ }
373+
374+ . = ALIGN(4);
375+ .rodata : { *(.rodata) }
376+
377+ . = ALIGN(4);
378+ .data : { *(.data) }
379+
380+ . = ALIGN(4);
381+ .sdata : { *(.sdata) }
382+
383+ _gp = ALIGN(16);
384+
385+ __got_start = .;
386+ .got : { *(.got) }
387+ __got_end = .;
388+
389+ .sdata : { *(.sdata) }
390+
391+ __u_boot_cmd_start = .;
392+ .u_boot_cmd : { *(.u_boot_cmd) }
393+ __u_boot_cmd_end = .;
394+
395+ uboot_end_data = .;
396+ num_got_entries = (__got_end - __got_start) >> 2;
397+
398+ . = ALIGN(4);
399+ .sbss : { *(.sbss) }
400+ .bss : { *(.bss) }
401+ uboot_end = .;
402+}
403diff -urN a/cpu/mips/jz_lcd.c b/cpu/mips/jz_lcd.c
404+++ b/cpu/mips/jz_lcd.c 2010-02-24 21:33:07.913295513 -0500
405@@ -109,7 +109,7 @@
406     #if defined(CONFIG_PAVO)
407         MODE_TFT_GEN | HSYNC_N | VSYNC_N | MODE_TFT_18BIT | PCLK_N,
408         320, 240, 18, 110, 1, 1, 10, 50, 10, 13
409- #elif defined(CONFIG_QI_LB60)
410+ #elif defined(CONFIG_QI_LB60||CONFIG_SACK)
411         MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
412         320, 240, 32, 70, 1, 1, 273, 140, 1, 20
413     #else /* defined(CONFIG_JZLCD_FOXCONN_PT035TN01) && (!defined(CONFIG_PAVO)) */
414diff -urN a/cpu/mips/jz_lcd.h b/cpu/mips/jz_lcd.h
415+++ b/cpu/mips/jz_lcd.h 2010-02-24 21:36:21.789795795 -0500
416@@ -59,7 +59,7 @@
417 #if defined(CONFIG_PAVO)
418 #define CONFIG_MIPS_JZ4740_PAVO 1
419 #endif
420-#if defined(CONFIG_QI_LB60)
421+#if defined(CONFIG_QI_LB60 || CONFIG_SACK)
422 #define CONFIG_MIPS_JZ4740_PI 1
423 #endif
424 #if defined(CONFIG_VIRGO)
425@@ -364,7 +364,7 @@
426         __gpio_as_output(LCD_RET);\
427     } while (0)
428
429-#if defined(CONFIG_QI_LB60)
430+#if defined(CONFIG_QI_LB60 || CONFIG_SACK)
431     #define __lcd_special_on() \
432         do { \
433         udelay(50);\
434diff -urN a/cpu/mips/Makefile b/cpu/mips/Makefile
435+++ b/cpu/mips/Makefile 2010-02-24 23:17:46.721295446 -0500
436@@ -36,7 +36,7 @@
437 COBJS-$(CONFIG_JZSOC) += jz4740.o jz_serial.o jz_i2c.o jz_mmc.o jz4740_nand.o
438 COBJS-$(CONFIG_DRIVER_CS8900) += jz_cs8900.o
439 COBJS-$(CONFIG_QI_LB60) += qi_lb60_gpm940b0.o
440-
441+COBJS-$(CONFIG_SACK) += qi_lb60_gpm940b0.o
442
443 SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
444 OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
445diff -urN a/include/configs/sack.h b/include/configs/sack.h
446+++ b/include/configs/sack.h 2010-02-24 23:22:24.425295521 -0500
447@@ -0,0 +1,216 @@
448+/*
449+ * Authors: Xiangfu Liu <xiangfu.z@gmail.com>
450+ *
451+ * This program is free software; you can redistribute it and/or
452+ * modify it under the terms of the GNU General Public License
453+ * as published by the Free Software Foundation; either version
454+ * 3 of the License, or (at your option) any later version.
455+ */
456+
457+/*
458+ * This file contains the configuration parameters for SACK.
459+ */
460+#ifndef __CONFIG_H
461+#define __CONFIG_H
462+
463+#define DEBUG
464+#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
465+#define CONFIG_JzRISC 1 /* JzRISC core */
466+#define CONFIG_JZSOC 1 /* Jz SoC */
467+#define CONFIG_JZ4725 1 /* Jz4725 SoC */
468+#define CONFIG_JZ4740 1 /* Jz4740 SoC */
469+#define CONFIG_SACK 1 /* SACK board */
470+
471+//#define CONFIG_LCD 1 /* LCD support */
472+//#define LCD_BPP LCD_COLOR32 /*5:18,24,32 bits per pixel */
473+//#define CONFIG_SYS_WHITE_ON_BLACK 1
474+
475+#define CONFIG_CPU_SPEED 336000000 /* CPU clock: 336 MHz */
476+#define CONFIG_EXTAL 12000000 /* EXTAL freq: 12 MHz */
477+#define CONFIG_SYS_HZ (CONFIG_EXTAL / 256) /* incrementer freq */
478+#define CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_CPU_SPEED
479+
480+#define CONFIG_SYS_UART_BASE UART0_BASE /* Base of the UART channel */
481+#define CONFIG_BAUDRATE 57600
482+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
483+
484+#define CONFIG_MMC 1
485+#define CONFIG_FAT 1
486+#define CONFIG_DOS_PARTITION 1
487+#define CONFIG_SKIP_LOWLEVEL_INIT 1
488+#define CONFIG_BOARD_EARLY_INIT_F 1
489+#define CONFIG_SYS_NO_FLASH 1
490+#define CONFIG_ENV_OVERWRITE 1
491+
492+#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAUL)
493+#define CONFIG_BOOTDELAY 3
494+#define CONFIG_BOOTFILE "uImage" /* file to load */
495+#define CONFIG_BOOTARGS "mem=32M console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"
496+#define CONFIG_EXTRA_ENV_SETTINGS 1
497+#define CONFIG_BOOTARGSFROMSD "mem=32M console=ttyS0,57600n8 rootfstype=ext2 root=/dev/mmcblk0p1 rw rootwait"
498+#define CONFIG_BOOTCOMMAND "nand read 0x80600000 0x400000 0x200000;bootm"
499+
500+/*
501+ * Command line configuration.
502+ */
503+#define CONFIG_CMD_BDI /* bdinfo */
504+#define CONFIG_CMD_BOOTD /* bootd */
505+#define CONFIG_CMD_CONSOLE /* coninfo */
506+#define CONFIG_CMD_ECHO /* echo arguments */
507+#define CONFIG_CMD_IMI /* iminfo */
508+#define CONFIG_CMD_ITEST /* Integer (and string) test */
509+
510+#define CONFIG_CMD_LOADB /* loadb */
511+#define CONFIG_CMD_LOADS /* loads */
512+#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
513+#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/
514+#define CONFIG_CMD_RUN /* run command in env variable */
515+#define CONFIG_CMD_SAVEENV /* saveenv */
516+#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
517+#define CONFIG_CMD_SOURCE /* "source" command support */
518+#define CONFIG_CMD_XIMG /* Load part of Multi Image */
519+
520+#define CONFIG_CMD_NAND
521+#define CONFIG_CMD_MMC
522+#define CONFIG_CMD_FAT
523+
524+/*
525+ * Serial download configuration
526+ */
527+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
528+#define CONFIG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
529+
530+/*
531+ * Miscellaneous configurable options
532+ */
533+#define CONFIG_SYS_LONGHELP /* undef to save memory */
534+#define CONFIG_SYS_PROMPT "SACK# " /* Monitor Command Prompt */
535+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
536+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
537+/* Print Buffer Size */
538+#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
539+
540+#define CONFIG_SYS_MALLOC_LEN 128 * 1024
541+#define CONFIG_SYS_BOOTPARAMS_LEN 128 * 1024
542+
543+#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
544+#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
545+#define CONFIG_SYS_LOAD_ADDR 0x80600000 /* default load address */
546+#define CONFIG_SYS_MEMTEST_START 0x80100000
547+#define CONFIG_SYS_MEMTEST_END 0x80800000
548+
549+/*
550+ * Environment
551+ */
552+#define CONFIG_ENV_IS_IN_NAND 1 /* use NAND for environment vars */
553+
554+/*
555+ * NAND FLASH configuration
556+ */
557+/* NAND Boot config code */
558+#define JZ4740_NANDBOOT_CFG JZ4740_NANDBOOT_B8R3
559+
560+#define SACK_NAND_SIZE 1 /* if board nand flash is 1GB, set to 1
561+ * if board nand flash is 2GB, set to 2
562+ * for change the PAGE_SIZE and BLOCK_SIZE
563+ * will delete when there is no 1GB flash
564+ */
565+
566+#define CONFIG_NAND_PAGE_SIZE (2048 * SACK_NAND_SIZE)
567+/* nand chip block size */
568+#define CONFIG_NAND_BLOCK_SIZE (256 * SACK_NAND_SIZE << 10)
569+/* nand bad block was marked at this page in a block, start from 0 */
570+#define CONFIG_NAND_BADBLOCK_PAGE 127
571+/* ECC offset position in oob area, default value is 6 if it isn't defined */
572+#define CONFIG_NAND_ECC_POS (6 * SACK_NAND_SIZE)
573+#define CONFIG_SYS_MAX_NAND_DEVICE 1
574+#define NAND_MAX_CHIPS 1
575+#define CONFIG_SYS_NAND_BASE 0xB8000000
576+#define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl.*/
577+#define CONFIG_SYS_ONENAND_BASE CONFIG_SYS_NAND_BASE
578+
579+/*
580+ * IPL (Initial Program Loader, integrated inside CPU)
581+ * Will load first 8k from NAND (SPL) into cache and execute it from there.
582+ *
583+ * SPL (Secondary Program Loader)
584+ * Will load special U-Boot version (NUB) from NAND and execute it. This SPL
585+ * has to fit into 8kByte. It sets up the CPU and configures the SDRAM
586+ * controller and the NAND controller so that the special U-Boot image can be
587+ * loaded from NAND to SDRAM.
588+ *
589+ * NUB (NAND U-Boot)
590+ * This NAND U-Boot (NUB) is a special U-Boot version which can be started
591+ * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
592+ *
593+ */
594+#define CONFIG_NAND_U_BOOT_DST 0x80100000 /* Load NUB to this addr */
595+#define CONFIG_NAND_U_BOOT_START CONFIG_NAND_U_BOOT_DST
596+/* Start NUB from this addr*/
597+
598+/*
599+ * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
600+ */
601+#define CONFIG_NAND_U_BOOT_OFFS (256 << 10) /* Offset to RAM U-Boot image */
602+#define CONFIG_NAND_U_BOOT_SIZE (512 << 10) /* Size of RAM U-Boot image */
603+
604+#define CONFIG_ENV_SIZE CONFIG_NAND_BLOCK_SIZE
605+#define CONFIG_ENV_OFFSET (CONFIG_NAND_BLOCK_SIZE + CONFIG_NAND_U_BOOT_SIZE + CONFIG_NAND_BLOCK_SIZE)
606+/* environment starts here */
607+#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
608+
609+/* in qi_lb60.h/config.mk TEXT_BAS = 0x88000000 */
610+#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
611+
612+/*
613+ * SDRAM Info.
614+ */
615+#define CONFIG_NR_DRAM_BANKS 1
616+
617+/* SDRAM paramters */
618+#define SDRAM_BW16 1 /* Data bus width: 0-32bit, 1-16bit */
619+#define SDRAM_BANK4 1 /* Banks each chip: 0-2bank, 1-4bank */
620+#define SDRAM_ROW 13 /* Row address: 11 to 13 */
621+#define SDRAM_COL 9 /* Column address: 8 to 12 */
622+#define SDRAM_CASL 2 /* CAS latency: 2 or 3 */
623+
624+/* SDRAM Timings, unit: ns */
625+#define SDRAM_TRAS 45 /* RAS# Active Time */
626+#define SDRAM_RCD 20 /* RAS# to CAS# Delay */
627+#define SDRAM_TPC 20 /* RAS# Precharge Time */
628+#define SDRAM_TRWL 7 /* Write Latency Time */
629+#define SDRAM_TREF 15625 /* Refresh period: 8192 cycles/64ms */
630+
631+/*
632+ * Cache Configuration
633+ */
634+#define CONFIG_SYS_DCACHE_SIZE 16384
635+#define CONFIG_SYS_ICACHE_SIZE 16384
636+#define CONFIG_SYS_CACHELINE_SIZE 32
637+
638+/*
639+ * GPIO definition
640+ */
641+#define GPIO_LCD_CS (2 * 32 + 21)
642+#define GPIO_DISP_OFF_N (3 * 32 + 21)
643+#define GPIO_PWM (3 * 32 + 27)
644+
645+#define GPIO_AMP_EN (3 * 32 + 4)
646+
647+#define GPIO_SDPW_EN (3 * 32 + 2)
648+#define GPIO_SD_DETECT (3 * 32 + 0)
649+
650+#define GPIO_USB_DETECT (3 * 32 + 27)
651+#define GPIO_BUZZ_PWM (3 * 32 + 28)
652+
653+#define GPIO_AUDIO_POP (1 * 32 + 29)
654+#define GPIO_COB_TEST (1 * 32 + 30)
655+
656+#define GPIO_KEYOUT_BASE (2 * 32 + 10)
657+#define GPIO_KEYIN_BASE (3 * 32 + 18)
658+#define GPIO_KEYIN_8 (3 * 32 + 26)
659+
660+#define GPIO_SD_CD_N GPIO_SD_DETECT /* SD Card insert detect */
661+#define GPIO_SD_VCC_EN_N GPIO_SDPW_EN /* SD Card Power Enable */
662+
663+#endif /* __CONFIG_H */
664diff -urN a/Makefile b/Makefile
665+++ b/Makefile 2010-02-24 22:01:28.269795702 -0500
666@@ -3448,6 +3448,13 @@
667     @echo "TEXT_BASE = 0x80100000" > $(obj)board/qi_lb60/config.tmp
668     @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
669
670+sack_config : unconfig
671+ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
672+ @echo "Compile NAND boot image for SACK"
673+ @$(MKCONFIG) -a sack mips mips sack
674+ @echo "TEXT_BASE = 0x80100000" > $(obj)board/sack/config.tmp
675+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
676+
677 #########################################################################
678 ## MIPS64 5Kc
679 #########################################################################
680diff -urN a/nand_spl/board/sack/config.mk b/nand_spl/board/sack/config.mk
681+++ b/nand_spl/board/sack/config.mk 2010-02-24 22:36:56.701295513 -0500
682@@ -0,0 +1,34 @@
683+#
684+# (C) Copyright 2006
685+# Stefan Roese, DENX Software Engineering, sr@denx.de.
686+#
687+# See file CREDITS for list of people who contributed to this
688+# project.
689+#
690+# This program is free software; you can redistribute it and/or
691+# modify it under the terms of the GNU General Public License as
692+# published by the Free Software Foundation; either version 2 of
693+# the License, or (at your option) any later version.
694+#
695+# This program is distributed in the hope that it will be useful,
696+# but WITHOUT ANY WARRANTY; without even the implied warranty of
697+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
698+# GNU General Public License for more details.
699+#
700+# You should have received a copy of the GNU General Public License
701+# along with this program; if not, write to the Free Software
702+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
703+# MA 02111-1307 USA
704+#
705+#
706+# Ingenic JZ4740 Reference Platform
707+#
708+
709+#
710+# TEXT_BASE for SPL:
711+#
712+# On JZ4730 platforms the SPL is located at 0x80000000...0x80001000,
713+# in the first 4kBytes of memory space in cache. So we set
714+# TEXT_BASE to starting address in internal cache here.
715+#
716+TEXT_BASE = 0x80000000
717diff -urN a/nand_spl/board/sack/Makefile b/nand_spl/board/sack/Makefile
718+++ b/nand_spl/board/sack/Makefile 2010-02-24 21:48:24.097295400 -0500
719@@ -0,0 +1,104 @@
720+#
721+# (C) Copyright 2006
722+# Stefan Roese, DENX Software Engineering, sr@denx.de.
723+#
724+# See file CREDITS for list of people who contributed to this
725+# project.
726+#
727+# This program is free software; you can redistribute it and/or
728+# modify it under the terms of the GNU General Public License as
729+# published by the Free Software Foundation; either version 2 of
730+# the License, or (at your option) any later version.
731+#
732+# This program is distributed in the hope that it will be useful,
733+# but WITHOUT ANY WARRANTY; without even the implied warranty of
734+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
735+# GNU General Public License for more details.
736+#
737+# You should have received a copy of the GNU General Public License
738+# along with this program; if not, write to the Free Software
739+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
740+# MA 02111-1307 USA
741+#
742+
743+include $(TOPDIR)/config.mk
744+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
745+
746+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
747+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE)
748+AFLAGS += -DCONFIG_NAND_SPL
749+CFLAGS += -DCONFIG_NAND_SPL
750+
751+SOBJS = start.o usb_boot.o
752+COBJS = nand_boot_jz4740.o cpu.o jz4740.o jz_serial.o
753+
754+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
755+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
756+__OBJS := $(SOBJS) $(COBJS)
757+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
758+
759+nandobj := $(OBJTREE)/nand_spl/
760+
761+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
762+all: $(obj).depend $(ALL)
763+
764+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl.bin
765+ dd bs=1024 count=8 if=/dev/zero of=$(nandobj)junk1
766+ cat $< $(nandobj)junk1 > $(nandobj)junk2
767+ dd bs=1024 count=8 if=$(nandobj)junk2 of=$(nandobj)junk3
768+ cat $(nandobj)junk3 $(nandobj)junk3 > $(nandobj)junk4
769+ dd bs=1024 count=256 if=/dev/zero of=$(nandobj)junk5
770+ cat $(nandobj)junk4 $(nandobj)junk5 > $(nandobj)junk6
771+ dd bs=1024 count=256 if=$(nandobj)junk6 of=$@
772+ rm -f $(nandobj)junk*
773+
774+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
775+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
776+
777+$(nandobj)u-boot-spl: $(OBJS)
778+ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
779+ -Map $(nandobj)u-boot-spl.map \
780+ -o $(nandobj)u-boot-spl
781+
782+# create symbolic links for common files
783+
784+# from cpu directory
785+$(obj)start.S:
786+ @rm -f $(obj)start.S
787+ ln -s $(SRCTREE)/cpu/mips/start.S $(obj)start.S
788+
789+$(obj)usb_boot.S:
790+ @rm -f $(obj)usb_boot.S
791+ ln -s $(SRCTREE)/cpu/mips/usb_boot.S $(obj)usb_boot.S
792+
793+$(obj)cpu.c:
794+ @rm -f $(obj)cpu.c
795+ ln -s $(SRCTREE)/cpu/mips/cpu.c $(obj)cpu.c
796+
797+$(obj)jz4740.c:
798+ @rm -f $(obj)jz4740.c
799+ ln -s $(SRCTREE)/cpu/mips/jz4740.c $(obj)jz4740.c
800+
801+$(obj)jz_serial.c:
802+ @rm -f $(obj)jz_serial.c
803+ ln -s $(SRCTREE)/cpu/mips/jz_serial.c $(obj)jz_serial.c
804+
805+# from nand_spl directory
806+$(obj)nand_boot_jz4740.c:
807+ @rm -f $(obj)nand_boot_jz4740.c
808+ ln -s $(SRCTREE)/nand_spl/nand_boot_jz4740.c $(obj)nand_boot_jz4740.c
809+
810+#########################################################################
811+
812+$(obj)%.o: $(obj)%.S
813+ $(CC) $(AFLAGS) -c -o $@ $<
814+
815+$(obj)%.o: $(obj)%.c
816+ $(CC) $(CFLAGS) -c -o $@ $<
817+
818+# defines $(obj).depend target
819+include $(SRCTREE)/rules.mk
820+
821+sinclude $(obj).depend
822+
823+#########################################################################
824diff -urN a/nand_spl/board/sack/u-boot.lds b/nand_spl/board/sack/u-boot.lds
825+++ b/nand_spl/board/sack/u-boot.lds 2010-02-24 22:40:05.585295492 -0500
826@@ -0,0 +1,63 @@
827+/*
828+ * (C) Copyright 2005
829+ * Ingenic Semiconductor, <jlwei@ingenic.cn>
830+ *
831+ * This program is free software; you can redistribute it and/or
832+ * modify it under the terms of the GNU General Public License as
833+ * published by the Free Software Foundation; either version 2 of
834+ * the License, or (at your option) any later version.
835+ *
836+ * This program is distributed in the hope that it will be useful,
837+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
838+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
839+ * GNU General Public License for more details.
840+ *
841+ * You should have received a copy of the GNU General Public License
842+ * along with this program; if not, write to the Free Software
843+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
844+ * MA 02111-1307 USA
845+ */
846+
847+OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
848+
849+OUTPUT_ARCH(mips)
850+ENTRY(_start)
851+SECTIONS
852+{
853+ . = 0x00000000;
854+
855+ . = ALIGN(4);
856+ .text :
857+ {
858+ *(.text)
859+ }
860+
861+ . = ALIGN(4);
862+ .rodata : { *(.rodata) }
863+
864+ . = ALIGN(4);
865+ .data : { *(.data) }
866+
867+ . = ALIGN(4);
868+ .sdata : { *(.sdata) }
869+
870+ _gp = ALIGN(16);
871+
872+ __got_start = .;
873+ .got : { *(.got) }
874+ __got_end = .;
875+
876+ .sdata : { *(.sdata) }
877+
878+ __u_boot_cmd_start = .;
879+ .u_boot_cmd : { *(.u_boot_cmd) }
880+ __u_boot_cmd_end = .;
881+
882+ uboot_end_data = .;
883+ num_got_entries = (__got_end - __got_start) >> 2;
884+
885+ . = ALIGN(4);
886+ .sbss : { *(.sbss) }
887+ .bss : { *(.bss) }
888+ uboot_end = .;
889+}
890diff -urN a/nand_spl/nand_boot_jz4740.c b/nand_spl/nand_boot_jz4740.c
891+++ b/nand_spl/nand_boot_jz4740.c 2010-02-24 22:20:09.801295367 -0500
892@@ -385,10 +385,12 @@
893     pll_init();
894     sdram_init();
895
896+#if defined(CONFIG_QI_LB60)
897     if(is_usb_boot()) {
898         serial_puts("enter USB BOOT mode\n");
899         usb_boot();
900     }
901+#endif
902
903 #if (JZ4740_NANDBOOT_CFG == JZ4740_NANDBOOT_B8R3)
904     bus_width = 8;
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