Date:2010-10-27 16:17:37 (12 years 10 months ago)
Author:Juan64Bits
Commit:b0be1219417554cc3215a4f4c0342d1a2192e522
Message:Adding RFM22b Example.
Files: Examples/UNFURO/RF/Makefile (1 diff)
Examples/UNFURO/RF/main.c (1 diff)
Examples/UNFURO/avrdude_5.10-1_i386.deb (0 diffs)

Change Details

Examples/UNFURO/RF/Makefile
1MCU = atmega168
2CC = avr-gcc
3OBJCOPY= avr-objcopy
4CFLAGS = -g -mmcu=$(MCU) -Wall -Wstrict-prototypes -O0 -mcall-prologues
5BINDIR = binary
6TARGET = prog
7
8OBJECTS = main.o
9
10.PHONY: all
11
12all: $(TARGET).hex
13
14prog.hex : main.out
15    $(OBJCOPY) -R .eeprom -O ihex main.out $(BINDIR)/$(TARGET).hex
16
17main.out : $(OBJECTS)
18    $(CC) $(CFLAGS) -o main.out -Wl,-Map,main.map $(OBJECTS) -lm
19    avr-size main.out
20
21main.o : main.c
22    $(CC) $(CFLAGS) -Os -c main.c
23
24clean:
25    rm -f *.o *.map *.out *.hex $(BINDIR)/$(TARGET).hex
Examples/UNFURO/RF/main.c
1//UNAL 2010
2//RFM22B Demo example by juan64bits, based on HOPE RF examples for PIC
3//and datasheet. http://www.hoperf.com/rf_fsk/rfm22b.htm
4//FIXME:
5// *¿?
6//TODO:
7// *In order to avoid using while() loops is necessary to
8// implement ISR (interrupt service routine) for RF_IRQ pin
9// *
10
11#include <avr/io.h>
12#include <util/delay.h>
13
14#define DEBUG 0 // Debug mode.
15#define DEMO_RX 0 // Rx demo mode.
16#define DEMO_TX 1 // Tx demo mode.
17
18#define F_CPU 1000000UL // 1 MHz
19#define SPI_PORT PORTB // SPI PORT
20#define SPI_DDR DDRB // PORT REGISTER
21#define SPI_CS PB0 // RF_nSEL
22
23#define RF_PORT PORTD // RF PORT
24#define RF_DDR DDRD // RF DDRD
25#define RF_PIN PIND // RF PIN
26#define RF_RXEN PD4 // Rx enable
27#define RF_TXEN PD3 // Tx enable
28#define RF_IRQ PD7 // IRQ
29
30#define RF22B_PWRSTATE_POWERDOWN 0x00
31#define RF22B_PWRSTATE_READY 0x01
32#define RF22B_Rx_packet_received_interrupt 0x02
33#define RF22B_PACKET_SENT_INTERRUPT 0x04
34#define RF22B_PWRSTATE_RX 0x05
35#define RF22B_PWRSTATE_TX 0x09
36
37void initUSART0(unsigned long baud)
38{
39    UBRR0 = F_CPU/16/baud-1; // Set Baudrate
40    UCSR0C = (3<<UCSZ00); // Character Size 8 bit
41    UCSR0B |= _BV(RXEN0) | _BV(TXEN0); // Receiver and Transmitter Enable
42}
43
44unsigned char receive1byteUSART0(void)
45{
46    loop_until_bit_is_set(UCSR0A, RXC0);
47    return UDR0;
48}
49
50void transmit1byteUSART0(unsigned char data)
51{
52    loop_until_bit_is_set(UCSR0A, UDRE0);
53    UDR0 = data;
54}
55
56void transmitStrUSART0(char *str)
57{
58    while (*str != 0) {
59        transmit1byteUSART0(*str);
60        *str++;
61    }
62}
63
64void sendByteToHexUart(unsigned char value)
65{
66    transmit1byteUSART0('0');
67    transmit1byteUSART0('x');
68    if((value>>4)<10)
69        transmit1byteUSART0('0'+(value>>4));
70    else
71        transmit1byteUSART0('A'+(value>>4)-10);
72    if((value&0x0F)<10)
73        transmit1byteUSART0('0'+(value&0x0F));
74    else
75        transmit1byteUSART0('A'+(value&0x0F)-10);
76    transmit1byteUSART0(' ');
77    transmit1byteUSART0(0);
78
79}
80
81unsigned char spiWriteRead(unsigned char dataout)
82{
83  unsigned char datain;
84  // Start transmission (MOSI)
85  SPDR = dataout;
86  // Wait for transmission complete
87  while(!(SPSR & (1<<SPIF))){}
88  // Get return Value;
89  datain = SPDR;
90  // Return Serial In Value (MISO)
91  return datain;
92}
93
94void initSPI(void)
95{
96    // Set MOSI and SCK as output, others as input
97    SPI_DDR = 0xFF;
98    SPI_DDR &= ~(1<<PB4);
99    // Enable SPI, Master, set clock rate fck/2 (maximum)
100    SPCR = (1<<SPE)|(0<<DORD)|(1<<MSTR)|(1<<SPR1)|(1<<SPR0);
101
102    SPI_PORT |= (1<<SPI_CS); // SPI SS set to high
103}
104
105unsigned char spiRead(unsigned char address)
106{
107    // nSEL= L
108    SPI_PORT &= ~(1<<SPI_CS);
109    //_delay_us(10); // Setup time : min 20 ns
110    unsigned char result;
111    spiWriteRead(address&0x7f); // D7 = 0 for read
112    result = spiWriteRead(0x00); // SDI don't care
113    // nSEL= H
114    //_delay_us(10); // High period min: 80ns
115    SPI_PORT |= (1<<SPI_CS);
116    return(result);
117}
118
119unsigned char spiWrite(unsigned char address,unsigned char data)
120{
121    // nSEL= L
122    SPI_PORT &= ~(1<<SPI_CS);
123    //_delay_us(10); // Setup time : min 20 ns
124    unsigned char result;
125    spiWriteRead(address|0x80); // Send address, D7 = 1 for write
126    result = spiWriteRead(data); // Send register value
127    // nSEL= H
128    //_delay_us(10); // High period min: 80ns
129    SPI_PORT |= (1<<SPI_CS);
130#if DEBUG==1
131    transmitStrUSART0("Setting REG[ ");
132    sendByteToHexUart(address);
133    transmitStrUSART0("]= ");
134    sendByteToHexUart(data);
135    transmitStrUSART0(" ( ");
136    sendByteToHexUart(spiRead(address));
137    transmitStrUSART0(")");
138    transmitStrUSART0("\r\n");
139#endif
140    return(result);
141}
142
143void rfm22bInit(void)
144{
145    RF_PORT |= (1<<RF_IRQ); // IRQ PULLUP
146
147    RF_DDR &= ~(1<<RF_IRQ); // Input
148    RF_DDR |= (1<<RF_TXEN); // Output
149    RF_DDR |= (1<<RF_RXEN); // Output
150
151    RF_PORT &= ~(1<<RF_RXEN); // RXEN Low
152    RF_PORT &= ~(1<<RF_TXEN); // TXEN Low
153
154    _delay_ms(100);
155
156    transmitStrUSART0("RFM22B Initialize Process (TX DEMO)\r\n");
157
158#if DEBUG==1
159    transmitStrUSART0(" Register 0x03:");
160    sendByteToHexUart(spiRead(0x03));
161
162    transmitStrUSART0(" Register 0x04:");
163    sendByteToHexUart(spiRead(0x04));
164
165    transmitStrUSART0("\r\n");
166#else
167    spiRead(0x03);
168    spiRead(0x04);
169#endif
170
171
172    spiWrite(0x06, 0x00); // no wakeup up, lbd,
173    // disable lbd, wakeup timer, use internal 32768,xton = 1; in ready mode
174    spiWrite(0x07, RF22B_PWRSTATE_READY);
175    spiWrite(0x09, 0x7f); // c = 12.5p
176    spiWrite(0x0a, 0x05);
177    spiWrite(0x0b, 0xf4); // gpio0 for received data output
178    spiWrite(0x0c, 0xef); // gpio 1 for clk output
179    spiWrite(0x0d, 0xfd); // gpio 2 micro-controller clk output
180    spiWrite(0x0e, 0x00); // gpio 0, 1,2 NO OTHER FUNCTION.
181    spiWrite(0x70, 0x20); // disable manchest
182
183    spiWrite(0x1d, 0x00); // enable afc
184    spiWrite(0x1c, 0x1d); // RATE_24K: // 2.4k
185    //0x20 calculate from the datasheet
186    //= 500*(1+2*down3_bypass)/(2^ndec*RB*(1+enmanch))
187    spiWrite(0x20,0x41);
188    // 0x21 , rxosr[10--8] = 0; stalltr = (default), ccoff[19:16] = 0;
189    spiWrite(0x21, 0x60);
190    spiWrite(0x22, 0x27); // 0x22 ncoff =5033 = 0x13a9
191    spiWrite(0x23, 0x52); // 0x23
192    spiWrite(0x24, 0x00); // 0x24
193    spiWrite(0x25, 0x06); // 0x25
194    spiWrite(0x2a, 0x1e);
195
196    //case RATE_24K: // 2.4k
197    spiWrite(0x6e, 0x13);
198    spiWrite(0x6f, 0xa9);
199    //PH+FIFO
200    spiWrite(0x30, 0x8c); // enable packet handler, msb first, enable crc,
201                           // 0x31 only readable
202    // 0x32address enable for headere byte 0, 1,2,3, receive
203    // header check for byte 0, 1,2,3
204    spiWrite(0x32, 0xff);
205    // header 3, 2, 1,0 used for head length, fixed packet length,
206    // synchronize word length 3, 2,
207    spiWrite(0x34, 64);
208    spiWrite(0x33, 0x42);
209    // 64 nibble = 32byte preamble
210    spiWrite(0x36, 0x2d); // synchronize word
211    spiWrite(0x37, 0xd4);
212    spiWrite(0x38, 0x00);
213    spiWrite(0x39, 0x00);
214    spiWrite(0x3a, 's'); // tx header
215    spiWrite(0x3b, 'o');
216    spiWrite(0x3c, 'n');
217    spiWrite(0x3d, 'g');
218    spiWrite(0x3e, 1); // total tx 1 byte 0x52, 53, 54, 55 H set to default;
219    // check hearder
220    spiWrite(0x3f, 's');
221    spiWrite(0x40, 'o');
222    spiWrite(0x41, 'n');
223    spiWrite(0x42, 'g');
224    spiWrite(0x43, 0xff); // all the bit to be checked
225    spiWrite(0x44, 0xff); // all the bit to be checked
226    spiWrite(0x45, 0xff); // all the bit to be checked
227    spiWrite(0x46, 0xff); // all the bit to be checked
228    // 0x56 ---------0x6c
229    spiWrite(0x6d, 0x0f); // set power max power
230    spiWrite(0x79, 0x0); // no hopping
231    spiWrite(0x7a, 0x0); // no hopping
232    // Gfsk, fd[8] =0, no invert for Tx/Rx data, fifo mode, txclk -->gpio
233    spiWrite(0x71, 0x22);
234    spiWrite(0x72, 0x38); // frequency deviation setting to 45k = 72*625
235    spiWrite(0x73, 0x0);
236    spiWrite(0x74, 0x0); // no offset
237    //band 434
238    spiWrite(0x75, 0x53); // hbsel = 0, sbsel =1 ???, fb = 19
239    spiWrite(0x76, 0x64); // 25600= 0x6400 for 434Mhz
240    spiWrite(0x77, 0x00);
241}
242
243void rfm22bSetReady(void)
244{
245#if DEBUG==1
246    transmitStrUSART0("RFM22B Setting Ready Mode\r\n");
247
248    transmitStrUSART0(" Register 0x03:");
249    sendByteToHexUart(spiRead(0x03));
250
251    transmitStrUSART0(" Register 0x04:");
252    sendByteToHexUart(spiRead(0x04));
253
254    transmitStrUSART0("\r\n");
255#else
256    spiRead(0x03);
257    spiRead(0x04);
258#endif
259
260    spiWrite(0x07, RF22B_PWRSTATE_READY);
261}
262
263void rfm22bSetSleep(void)
264{
265    spiWrite(0x07, RF22B_PWRSTATE_READY);
266
267#if DEBUG==1
268    transmitStrUSART0("RFM22B Setting Sleep Mode\r\n");
269
270    transmitStrUSART0(" Register 0x03:");
271    sendByteToHexUart(spiRead(0x03));
272
273    transmitStrUSART0(" Register 0x04:");
274    sendByteToHexUart(spiRead(0x04));
275
276    transmitStrUSART0("\r\n");
277#else
278    spiRead(0x03);
279    spiRead(0x04);
280#endif
281
282    spiWrite(0x07, RF22B_PWRSTATE_POWERDOWN);
283}
284
285void rfm22bSendByte(unsigned char value)
286{
287
288    transmitStrUSART0("RFM22B Sending Data:");
289    sendByteToHexUart(value);
290    transmitStrUSART0("\r\n");
291
292    rfm22bSetReady();
293
294    RF_PORT &= ~(1<<RF_RXEN); // RXEN low
295    RF_PORT |= (1<<RF_TXEN); // TXEN High
296
297    // disABLE AUTO TX MODE, enable multi packet clear fifo
298    spiWrite(0x08, 0x03);
299    // disABLE AUTO TX MODE, enable multi packet, clear fifo
300    spiWrite(0x08, 0x00);
301
302    // ph +fifo mode
303    spiWrite(0x34, 64); // 64 nibble = 32byte preamble
304    spiWrite(0x3e, 1); // total tx 1 byte
305    spiWrite(0x7f, value); // Insert to FIFO
306    spiWrite(0x05, RF22B_PACKET_SENT_INTERRUPT);
307
308#if DEBUG==1
309    transmitStrUSART0("RFM22B Clearing IRQ\r\n");
310
311    transmitStrUSART0(" Register 0x03:");
312    sendByteToHexUart(spiRead(0x03));
313
314    transmitStrUSART0(" Register 0x04:");
315    sendByteToHexUart(spiRead(0x04));
316
317    transmitStrUSART0("\r\n");
318#else
319    spiRead(0x03);
320    spiRead(0x04);
321#endif
322
323    spiWrite(0x07, RF22B_PWRSTATE_TX); // to tx mode
324
325    while(RF_PIN & (1<<RF_IRQ)); // wait for interruption
326
327    rfm22bSetReady();
328
329    RF_PORT &= ~(1<<RF_RXEN); // RXEN low
330    RF_PORT &= ~(1<<RF_TXEN); // TXEN low
331
332    _delay_ms(50);
333}
334
335#if DEMO_RX==1
336void rfm22bRxReset(void)
337{
338    spiWrite(0x07, RF22B_PWRSTATE_READY);
339    // threshold for rx almost full, interrupt when 1 byte received
340    spiWrite(0x7e, 1);
341    spiWrite(0x08, 0x03); //clear fifo disable multi packet
342    spiWrite(0x08, 0x00); // clear fifo, disable multi packet
343    spiWrite(0x07, RF22B_PWRSTATE_RX ); // to rx mode
344    spiWrite(0x05, RF22B_Rx_packet_received_interrupt);
345
346#if DEBUG==1
347    transmitStrUSART0(" Register 0x03:");
348    sendByteToHexUart(spiRead(0x03));
349
350    transmitStrUSART0(" Register 0x04:");
351    sendByteToHexUart(spiRead(0x04));
352
353    transmitStrUSART0("\r\n");
354#else
355    spiRead(0x03);
356    spiRead(0x04);
357#endif
358}
359
360void rfm22bSetRxMode(void)
361{
362    RF_PORT &= ~(1<<RF_RXEN); // RXEN low
363    RF_PORT &= ~(1<<RF_TXEN); // TXEN low
364
365 #if DEBUG==1
366    transmitStrUSART0("RFM22B Setting Rx Mode\r\n");
367 #endif
368
369    rfm22bSetReady();
370     _delay_ms(50);
371
372    RF_PORT |= (1<<RF_RXEN); // RXEN High
373    RF_PORT &= ~(1<<RF_TXEN); // TXEN low
374
375    rfm22bRxReset();
376}
377#endif
378#if DEBUG==1
379void rfm22bReadAllRegisters(void)
380{
381    //*** TEST: Read all registers ***//
382    unsigned char i;
383    transmitStrUSART0("Reading all registers:");
384    for(i=0; i<0x80; i++)
385    {
386        transmitStrUSART0("REG[ ");
387        sendByteToHexUart(i);
388        transmitStrUSART0("]= ");
389        sendByteToHexUart(spiRead(i));
390        transmitStrUSART0("\r\n");
391    }
392}
393#endif
394int main(void)
395{
396    initSPI(); // initialize SPI
397    initUSART0(4800); // initialize USART0
398
399    //POWER ON DELAY for RFM22B
400    _delay_ms(1000);
401
402#if DEBUG==1
403    rfm22bReadAllRegisters();
404#endif
405
406#if DEMO_TX==1
407    rfm22bInit();
408    //*** TRANSMIT ***//
409    unsigned char count=0;
410    while(1)
411    {
412        rfm22bSendByte(count++);
413        _delay_ms(1000);
414    }
415#elif DEMO_RX==1
416    rfm22bInit();
417    //*** RECEIVE ***//
418    rfm22bSetRxMode();
419
420    while(1)
421    {
422        while(RF_PIN & (1<<RF_IRQ)); // wait for interruption
423
424#if DEBUG==1
425        transmitStrUSART0("RFM22B Clearing IRQ\r\n");
426
427        transmitStrUSART0(" Register 0x03:");
428        sendByteToHexUart(spiRead(0x03));
429
430        transmitStrUSART0(" Register 0x04:");
431        sendByteToHexUart(spiRead(0x04));
432
433        transmitStrUSART0("\r\n");
434#else
435        spiRead(0x03);
436        spiRead(0x04);
437#endif
438
439        transmitStrUSART0("RFM22B Receiving Data: ");
440        sendByteToHexUart(spiRead(0x7f));
441
442        transmitStrUSART0("\r\n");
443
444        _delay_ms(1000);
445        rfm22bSetRxMode(); // rx reset
446    }
447#endif
448    return 0;
449}
Examples/UNFURO/avrdude_5.10-1_i386.deb

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