Hardware Design: SIE
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Hardware Design: SIE Git Source Tree
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Source at commit 717c35e2389243414c45cbefd3f3ed2162dda6cd created 13 years 10 months ago. By Carlos Camargo, Adding post route simulation to FPGA examples | |
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1 | vlib work |
2 | vlog -incr "../build/project.v" "../plasma_TB.v" "glbl.v" |
3 | vsim -t 1ps -L simprims_ver -L unisims_ver -L xilinxcorelib_ver plasma_TB_v glbl |
4 | view wave |
5 | do wave1.do |
6 | #add wave * |
7 | view structure |
8 | view signals |
9 | run 16us |
10 |
Branches:
master