Root/Examples/ADC/Test-QT-src/jz47xx_gpio.h

Source at commit 9d578912b727722b22319832985451a79ec35747 created 13 years 27 days ago.
By Juan64Bits, Updating prototype of SIE code generator.
1/*
2  JZ47xx GPIO at userspace
3
4  Copyright (C) 2010 Andres Calderon andres.calderon@emqbit.com
5                                 
6This program is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
10
11This program is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with this program; if not, write to the Free Software
18Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
19
20#ifndef __jz47xx_gpio_h__
21#define __jz47xx_gpio_h__
22
23#define JZ_GPIO_PORT_A 0
24#define JZ_GPIO_PORT_B 1
25#define JZ_GPIO_PORT_C 2
26#define JZ_GPIO_PORT_D 3
27
28typedef volatile unsigned int JZ_REG; /* Hardware register definition */
29
30typedef struct _JZ_PIO
31{
32  JZ_REG PXPIN; /* PIN Level Register */
33  JZ_REG Reserved0;
34  JZ_REG Reserved1;
35  JZ_REG Reserved2;
36  JZ_REG PXDAT; /* Port Data Register */
37  JZ_REG PXDATS; /* Port Data Set Register */
38  JZ_REG PXDATC; /* Port Data Clear Register */
39  JZ_REG Reserved3;
40  JZ_REG PXIM; /* Interrupt Mask Register */
41  JZ_REG PXIMS; /* Interrupt Mask Set Reg */
42  JZ_REG PXIMC; /* Interrupt Mask Clear Reg */
43  JZ_REG Reserved4;
44  JZ_REG PXPE; /* Pull Enable Register */
45  JZ_REG PXPES; /* Pull Enable Set Reg. */
46  JZ_REG PXPEC; /* Pull Enable Clear Reg. */
47  JZ_REG Reserved5;
48  JZ_REG PXFUN; /* Function Register */
49  JZ_REG PXFUNS; /* Function Set Register */
50  JZ_REG PXFUNC; /* Function Clear Register */
51  JZ_REG Reserved6;
52  JZ_REG PXSEL; /* Select Register */
53  JZ_REG PXSELS; /* Select Set Register */
54  JZ_REG PXSELC; /* Select Clear Register */
55  JZ_REG Reserved7;
56  JZ_REG PXDIR; /* Direction Register */
57  JZ_REG PXDIRS; /* Direction Set Register */
58  JZ_REG PXDIRC; /* Direction Clear Register */
59  JZ_REG Reserved8;
60  JZ_REG PXTRG; /* Trigger Register */
61  JZ_REG PXTRGS; /* Trigger Set Register */
62  JZ_REG PXTRGC; /* Trigger Set Register */
63  JZ_REG Reserved9;
64  JZ_REG PXFLG; /* Port Flag Register */
65  JZ_REG PXFLGC; /* Port Flag clear Register */
66} JZ_PIO, *PJZ_PIO;
67
68void jz_gpio_as_output (JZ_PIO * pio, unsigned int o);
69
70void jz_gpio_as_input (JZ_PIO * pio, unsigned int o);
71
72void jz_gpio_set_pin (JZ_PIO * pio, unsigned int o);
73
74void jz_gpio_clear_pin (JZ_PIO * pio, unsigned int o);
75
76void jz_gpio_out (JZ_PIO * pio, unsigned int o, unsigned int val);
77
78unsigned int jz_gpio_get_pin (JZ_PIO * pio, unsigned int o);
79
80int jz_gpio_as_func (JZ_PIO * pio, unsigned int o, int func);
81
82JZ_PIO *jz_gpio_map (int port);
83
84#endif
85

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