Hardware Design: SIE
Sign in or create your account | Project List | Help
Hardware Design: SIE Git Source Tree
Root/
Source at commit acf516e created 13 years 6 months ago. By Carlos Camargo, Fixing some examples, adding scripts for compiling xilinx libs with ghdl | |
---|---|
1 | vlib work |
2 | vlog -incr +libext+.v \ |
3 | "../sram_bus.v" \ |
4 | "../sram_bus_TB.v" \ |
5 | "glbl.v" |
6 | vsim -t 1ps -L simprims_ver -L unisims_ver -L xilinxcorelib_ver sram_bus_TB glbl |
7 | view wave |
8 | #do wave.do |
9 | add wave * |
10 | view structure |
11 | view signals |
12 | run 5us |
13 |
Branches:
master