Hardware Design: SIE
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| 1 | #include "ADCw.h" |
| 2 | |
| 3 | ADCw::ADCw() |
| 4 | { |
| 5 | BUFFER_OFFSET = 8; //Ignore first 16 samples |
| 6 | ADC_SPI_CLKDIV=ADC_SPI_CLKDIV_MAX; //Set clock to minimum speed |
| 7 | BUFFER_LEN=16; |
| 8 | MUX_CHANNELS =0; |
| 9 | |
| 10 | ADCBuffer = jz_adc_init(); |
| 11 | |
| 12 | //Clean FPGA RAM memory |
| 13 | for (int i = 0; i < 512; i++) //RAMB16_s9_s9 has 2048 bytes 8-bit |
| 14 | { |
| 15 | ADCBuffer[i] = 0x00000000; //Clean 4 register by cicle |
| 16 | } |
| 17 | |
| 18 | adcConfig(ADC_CMD_SET_SPI_CLKDIV); |
| 19 | adcConfig(ADC_CMD_SET_FAST_CONV); |
| 20 | printf("\nADC in Fast Convertion Mode (10us) and Fs=9.8KHz (Min)\n"); |
| 21 | } |
| 22 | |
| 23 | void ADCw::testADC() |
| 24 | { |
| 25 | int aggregate=0; float errorT=0; |
| 26 | /******************************* TEST 1 ***********************************/ |
| 27 | printf("\nINIT TEST1: Autoselft {(Vref+) - (Vref-)}/2 -> Return 0x0200 \n"); |
| 28 | adcConfig(ADC_CMD_SET_AUTOSELFT_1); |
| 29 | adcConfig(ADC_CMD_READ_AUTOSELFT_1); |
| 30 | for(int i=BUFFER_OFFSET; i< BUFFER_LEN/2+BUFFER_OFFSET; i++) |
| 31 | { |
| 32 | aggregate += (ADCBuffer[i]&0xFFFF + ((ADCBuffer[i]>>16)&0x0FFF)); |
| 33 | printf("[%08X]", ADCBuffer[i]); |
| 34 | } |
| 35 | errorT=(aggregate/16)*100/0x200; |
| 36 | if((errorT<95)||(errorT>105)) |
| 37 | printf("\n**WARNING** Test FAILED.\n\n"); |
| 38 | else |
| 39 | printf("\nTest OK\n\n"); |
| 40 | |
| 41 | aggregate=0; |
| 42 | fflush (stdout); |
| 43 | |
| 44 | /******************************* TEST 2 ***********************************/ |
| 45 | printf("\n\nINIT TEST2: Autoselft (Vref-) -> Return 0x0000 \n"); |
| 46 | adcConfig(ADC_CMD_SET_AUTOSELFT_2); |
| 47 | adcConfig(ADC_CMD_READ_AUTOSELFT_2); |
| 48 | for(int i=BUFFER_OFFSET; i< BUFFER_LEN/2+BUFFER_OFFSET; i++) |
| 49 | { |
| 50 | aggregate += (ADCBuffer[i]&0xFFFF + ((ADCBuffer[i]>>16)&0x0FFF)); |
| 51 | printf("[%08X]", ADCBuffer[i]); |
| 52 | } |
| 53 | if(aggregate!=0) |
| 54 | printf("\n**WARNING** Test FAILED. Expected value=0x0000.\n\n"); |
| 55 | else |
| 56 | printf("\nTest OK\n\n"); |
| 57 | |
| 58 | aggregate=0; |
| 59 | fflush (stdout); |
| 60 | |
| 61 | /******************************* TEST 3 ***********************************/ |
| 62 | printf("\n\nINIT TEST3: Autoselft (Vref+) -> Return 0x03FF \n"); |
| 63 | adcConfig(ADC_CMD_SET_AUTOSELFT_3); |
| 64 | adcConfig(ADC_CMD_READ_AUTOSELFT_3); |
| 65 | for(int i=BUFFER_OFFSET; i< BUFFER_LEN/2+BUFFER_OFFSET; i++) |
| 66 | { |
| 67 | aggregate += (ADCBuffer[i]&0xFFFF + ((ADCBuffer[i]>>16)&0x0FFF)); |
| 68 | printf("[%08X]", ADCBuffer[i]); |
| 69 | } |
| 70 | errorT=(aggregate/16)*100/0x3FF; |
| 71 | if((errorT<95)||(errorT>105)) |
| 72 | printf("\n**WARNING** Test FAILED.\n\n"); |
| 73 | else |
| 74 | printf("\nTest OK\n\n"); |
| 75 | |
| 76 | fflush (stdout); |
| 77 | } |
| 78 | |
| 79 | void ADCw::powerDownADC() |
| 80 | { |
| 81 | adcConfig(ADC_CMD_SET_POWER_DOWN); |
| 82 | printf("\nADC in Power Down Mode \n"); |
| 83 | } |
| 84 | |
| 85 | JZ_REG* ADCw::takeSamplesADC(int CHANNEL) |
| 86 | { |
| 87 | adcConfig(ADC_CMD_SET_CHANNEL0+CHANNEL); |
| 88 | adcConfig(ADC_CMD_READ_CHANNEL0+CHANNEL); |
| 89 | return (JZ_REG*)(ADCBuffer+BUFFER_OFFSET); |
| 90 | } |
| 91 | |
| 92 | void ADCw::adcConfig(uchar CMD) |
| 93 | { |
| 94 | ADCBuffer[0] = (((MUX_CHANNELS<<6) + CMD)<<24) + \ |
| 95 | ((BUFFER_LEN+BUFFER_OFFSET*2) << 8) + \ |
| 96 | (ADC_SPI_CLKDIV); |
| 97 | while(adcCheckBufferFull()) usleep (10); |
| 98 | } |
| 99 | |
| 100 | int ADCw::adcCheckBufferFull() |
| 101 | { |
| 102 | return ADCBuffer[0]&0x20000000; |
| 103 | } |
| 104 |
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