Root/Examples/blink/logic/blink.v

1`timescale 1ns / 1ps
2module blink(clk, reset, led);
3  input clk, reset;
4  output led;
5
6  reg [24:0] counter;
7  always @(posedge clk) begin
8    if (~reset)
9      counter <= {25{1'b0}};
10    else
11      counter <= counter + 1;
12  end
13  assign led = counter[24];
14
15endmodule
16
17

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