Hardware Design: SIE
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| 1 | /* SAKC FPGA/SRAM interface test |
| 2 | |
| 3 | Copyright (C) 2010 Carlos Camargo cicamargoba@unal.edu.co |
| 4 | Andres Calderon andres.calderon@emqbit.com |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ |
| 19 | |
| 20 | #include <stdio.h> |
| 21 | #include <unistd.h> |
| 22 | #include <stdlib.h> |
| 23 | |
| 24 | #include "jz47xx_gpio.h" |
| 25 | #include "jz47xx_mmap.h" |
| 26 | |
| 27 | #define CS2_PORT JZ_GPIO_PORT_B |
| 28 | #define CS2_PIN 26 |
| 29 | |
| 30 | int |
| 31 | main () |
| 32 | { |
| 33 | int i; |
| 34 | JZ_PIO *pio; |
| 35 | int *virt_addr; |
| 36 | |
| 37 | pio = jz_gpio_map (CS2_PORT); |
| 38 | jz_gpio_as_func (pio, CS2_PIN, 0); |
| 39 | |
| 40 | virt_addr = (int *) jz_mmap (0x13010000) + 0x18/sizeof(int); |
| 41 | |
| 42 | if (*virt_addr != 0xFFF7700) |
| 43 | { // 0 WS, 8 bits |
| 44 | *virt_addr = 0xFFF7700; |
| 45 | printf ("Configuring CS2 8 bits \n"); |
| 46 | } |
| 47 | else |
| 48 | printf ("CS3, already configured\n"); |
| 49 | |
| 50 | virt_addr = (int *) jz_fpga_map (0x15000000); |
| 51 | |
| 52 | printf ("Writing Memory..\n"); |
| 53 | |
| 54 | srand48(0x3c); |
| 55 | |
| 56 | for (i = 0; i < FPGA_SIZE/4; i++) |
| 57 | virt_addr[i] = (lrand48() & 0x00ff); |
| 58 | |
| 59 | printf ("Reading Memory..\n"); |
| 60 | |
| 61 | |
| 62 | srand48(0x3c); |
| 63 | |
| 64 | for (i = 0; i < FPGA_SIZE/4; i++){ |
| 65 | printf("%X\n", virt_addr[i]); |
| 66 | if (virt_addr[i] != (lrand48() & 0x00ff)){ |
| 67 | printf ("FPGA - Xburst connection test failed on Address:0x%x\n", i); |
| 68 | return 1; /* Error */ |
| 69 | } |
| 70 | } |
| 71 | printf ("%d\n", i); |
| 72 | printf ("FPGA - Xburst connection test passed\n"); |
| 73 | |
| 74 | return 0; |
| 75 | } |
| 76 |
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