Hardware Design: SIE
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Hardware Design: SIE Git Source Tree
Root/
| File | Age | Message | Size | |
|---|---|---|---|---|
| .. | ||||
 |
glbl.v | 13 years 7 months | Carlos Camargo: Adding post route simulation to FPGA examples | 1.18 kB |
|
sram_bus_TB.do | 13 years 7 months | Carlos Camargo: Adding iverilog simulation support | 271 bytes |
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sram_bus_TIMING_TB.do | 13 years 7 months | Carlos Camargo: Adding iverilog simulation support | 224 bytes |
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transcript | 13 years 7 months | Carlos Camargo: Fixing Makefile errors | 1.38 kB |
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vsim.wlf | 13 years 7 months | Carlos Camargo: Fixing Makefile errors | 32.77 kB |
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wave.do | 13 years 7 months | Carlos Camargo: Adding post route simulation to FPGA examples | 1.35 kB |
Download this version or git clone git://projects.qi-hardware.com/nn-usb-fpga.git 
Branches:
master
