Hardware Design: SIE

Hardware Design: SIE Git Source Tree

1	CC = mipsel-openwrt-linux-gcc
2
3	all: jz_init_sram jz_test_gpio enable_rx enable_irq
4
5	DEBUG = -O3 -g0
6
7	COMMON_SOURCES = jz47xx_gpio.c jz47xx_mmap.c
8
9	H_SOURCES = jz47xx_gpio.h jz47xx_mmap.h
10
11	INCLUDE = -I.
12
13	WARNINGS= -Wcast-align -Wpacked -Wpadded -Wall
14
15	CCFLAGS = ${INCLUDE} ${DEBUG} ${WARNINGS}
16
17	LDFLAGS =
18
19	COMMON_OBJECTS = $(COMMON_SOURCES:.c=.o)
20
21	NANO_IP = 192.168.254.101
22
23	jz_init_sram: $(COMMON_OBJECTS) jz_init_sram.o
24	$(CC) $(LDFLAGS) $(COMMON_OBJECTS) jz_init_sram.o -o jz_init_sram
25
26	jz_test_gpio: $(COMMON_OBJECTS) jz_test_gpio.o
27	$(CC) $(LDFLAGS) $(COMMON_OBJECTS) jz_test_gpio.o -o jz_test_gpio
28
29	enable_rx: $(COMMON_OBJECTS) enable_rx.o
30	$(CC) $(LDFLAGS) $(COMMON_OBJECTS) enable_rx.o -o enable_rx
31
32	enable_irq: $(COMMON_OBJECTS) enable_irq.o
33	$(CC) $(LDFLAGS) $(COMMON_OBJECTS) enable_irq.o -o enable_irq
34
35	.c.o:
36	$(CC) -c $(CCFLAGS) $< -o $@
37
38	upload: jz_init_sram jz_test_gpio
39	scp jz_test_gpio jz_init_sram root@$(NANO_IP):
40
41	clean:
42	rm -f .o jz_init_sram jz_test_gpio enable_rx ${EXEC} ~ enable_irq
43
44	indent:
45	indent -bad -bap -nbc -bl -nce -i2 --no-tabs --line-length120 $(COMMON_SOURCES) $(H_SOURCES)
46

Branches:
master