Hardware Design: SIE
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Hardware Design: SIE Git Source Tree
Root/
| 1 | PCBNEW-LibModule-V1 23/2/2010-02:49:41 |
| 2 | $INDEX |
| 3 | C18 |
| 4 | $EndINDEX |
| 5 | $MODULE C18 |
| 6 | Po 0 0 0 15 43C58C74 4B83423C ~~ |
| 7 | Li C18 |
| 8 | Sc 4B83423C |
| 9 | AR |
| 10 | Op 0 0 0 |
| 11 | T0 0 -79 157 157 -1800 20 N V 21 "C18" |
| 12 | T1 0 118 118 118 -1800 20 N I 21 "10uF" |
| 13 | DS -480 480 1780 480 10 24 |
| 14 | DS 1780 480 1780 -480 10 24 |
| 15 | DS 1780 -480 -480 -480 10 24 |
| 16 | DS -480 -480 -480 480 10 24 |
| 17 | DS 1750 450 1750 -450 60 21 |
| 18 | DS 1750 -450 1750 -450 60 21 |
| 19 | DS 1750 -450 -450 -450 60 21 |
| 20 | DS -450 -450 -450 450 60 21 |
| 21 | DS -450 450 1750 450 60 21 |
| 22 | DS 1750 450 1750 -450 60 26 |
| 23 | DS 1750 -450 1750 -450 60 26 |
| 24 | DS 1750 -450 -450 -450 60 26 |
| 25 | DS -450 -450 -450 450 60 26 |
| 26 | DS -450 450 1750 450 60 26 |
| 27 | $PAD |
| 28 | Sh "1" R 600 600 0 0 900 |
| 29 | Dr 0 0 0 |
| 30 | At SMD N 04888000 |
| 31 | Ne 1 "GND" |
| 32 | Po 0 0 |
| 33 | $EndPAD |
| 34 | $PAD |
| 35 | Sh "2" R 600 600 0 0 900 |
| 36 | Dr 0 0 0 |
| 37 | At SMD N 04888000 |
| 38 | Ne 15 "VDDIO" |
| 39 | Po 1300 0 |
| 40 | $EndPAD |
| 41 | $EndMODULE C18 |
| 42 | $EndLIBRARY |
| 43 |
Branches:
master
