Hardware Design: SIE
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Hardware Design: SIE Git Source Tree
Root/
| 1 | PCBNEW-LibModule-V1 23/2/2010-03:06:52 |
| 2 | $INDEX |
| 3 | J12 |
| 4 | $EndINDEX |
| 5 | $MODULE J12 |
| 6 | Po 0 0 0 15 43C58C74 4B83463E ~~ |
| 7 | Li J12 |
| 8 | Sc 4B83463E |
| 9 | AR |
| 10 | Op 0 0 0 |
| 11 | T0 0 -79 157 157 0 20 N V 21 "J12" |
| 12 | T1 0 118 118 118 0 20 N I 21 "HEADER 1" |
| 13 | DS -840 840 -840 -830 10 24 |
| 14 | DS -840 -830 830 -830 10 24 |
| 15 | DS 830 -830 830 840 10 24 |
| 16 | DS 830 840 -840 840 10 24 |
| 17 | $PAD |
| 18 | Sh "1" C 3140 3140 0 0 0 |
| 19 | Dr 1180 0 0 |
| 20 | At STD N 0CC08001 |
| 21 | Ne 0 "" |
| 22 | Po 15130 -7960 |
| 23 | $EndPAD |
| 24 | $EndMODULE J12 |
| 25 | $EndLIBRARY |
| 26 |
Branches:
master
