Hardware Design: SIE

Hardware Design: SIE Git Source Tree

1	#include "jz_adc_peripheral.h"
2	#include "jz_fpga_init.h"
3	#include <stdio.h>
4	#include <unistd.h>
5
6	extern "C"
7	{
8	#include "fbutils.h"
9	}
10
11
12	JZ_REG * FPGA_ADDR;
13	JZ_REG * ADCBuffer;
14	bool frameBufferOpened = 0;
15	bool firstLoop = 1;
16
17	/*![HEADER SECTION]*/
18
19	/*![BLOCK SECTION]*/
20
21	/*![EXTRA SECTION]*/
22
23	int main()
24	{
25	/* OPEN FRAME BUFFER */
26	printf("Opening framebuffer...\n\n");
27
28	if (open_framebuffer()) {
29	close_framebuffer();
30	printf("Could not open framebuffer!!\n\n");
31	}
32	else
33	{
34	setColorsFromDefaultPallet();
35	rect(0,0,xres,yres,0); //Extern Rect
36	}
37
38	/* MAPING FPGA MEMORY */
39	FPGA_ADDR=jz_cs2_init();
40	ADCBuffer = FPGA_ADDR;
41	ADCTest(ADCBuffer);
42
43
44	/*![INIT SECTION]*/
45
46	/*![IO SECTION]*/
47
48	/*![MAIN SECTION]*/
49
50	return 0;
51	}
52
53
54

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