Hardware Design: SIE
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| 1 | The IO routines that shift data out to the JTAG port start with the first byte of the buffer given. Each byte is is output LSB first. If the byte order was the same as the SVF file then the entire buffer would have to be stored and then reversed, causing problems for embedded JTAG servers with limited memory. |
| 2 | |
| 3 | |
| 4 | |
| 5 | The table below shows an example of the byte order reversal required for playing an SVF file. |
| 6 | |
| 7 | SVF IO buffer |
| 8 | .. ff |
| 9 | .. aa |
| 10 | .. 33 |
| 11 | .. 00 |
| 12 | 00 .. |
| 13 | 33 .. |
| 14 | aa .. |
| 15 | ff .. |
| 16 | |
| 17 | |
| 18 | |
| 19 | For a Xilinx bit file, which is MSB first, each byte is bit-reversed as shown below. |
| 20 | |
| 21 | BIT IO buffer |
| 22 | ff ff |
| 23 | 55 aa |
| 24 | cc 33 |
| 25 | 00 00 |
| 26 | .. .. |
| 27 | .. .. |
| 28 | .. .. |
| 29 | .. .. |
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