Hardware Design: SIE
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| 1 | /* |
| 2 | * JZ47xx GPIO lines |
| 3 | * |
| 4 | * Written 2010 by Andres Calderon andres.calderon@emqbit.com |
| 5 | */ |
| 6 | |
| 7 | #ifndef __jz47xx_gpio_h__ |
| 8 | #define __jz47xx_gpio_h__ |
| 9 | |
| 10 | #define JZ_GPIO_PORT_A 0 |
| 11 | #define JZ_GPIO_PORT_B 1 |
| 12 | #define JZ_GPIO_PORT_C 2 |
| 13 | #define JZ_GPIO_PORT_D 3 |
| 14 | |
| 15 | typedef volatile unsigned int JZ_REG; /* Hardware register definition */ |
| 16 | |
| 17 | typedef struct _JZ_PIO |
| 18 | { |
| 19 | JZ_REG PXPIN; /* PIN Level Register */ |
| 20 | JZ_REG Reserved0; |
| 21 | JZ_REG Reserved1; |
| 22 | JZ_REG Reserved2; |
| 23 | JZ_REG PXDAT; /* Port Data Register */ |
| 24 | JZ_REG PXDATS; /* Port Data Set Register */ |
| 25 | JZ_REG PXDATC; /* Port Data Clear Register */ |
| 26 | JZ_REG Reserved3; |
| 27 | JZ_REG PXIM; /* Interrupt Mask Register */ |
| 28 | JZ_REG PXIMS; /* Interrupt Mask Set Reg */ |
| 29 | JZ_REG PXIMC; /* Interrupt Mask Clear Reg */ |
| 30 | JZ_REG Reserved4; |
| 31 | JZ_REG PXPE; /* Pull Enable Register */ |
| 32 | JZ_REG PXPES; /* Pull Enable Set Reg. */ |
| 33 | JZ_REG PXPEC; /* Pull Enable Clear Reg. */ |
| 34 | JZ_REG Reserved5; |
| 35 | JZ_REG PXFUN; /* Function Register */ |
| 36 | JZ_REG PXFUNS; /* Function Set Register */ |
| 37 | JZ_REG PXFUNC; /* Function Clear Register */ |
| 38 | JZ_REG Reserved6; |
| 39 | JZ_REG PXSEL; /* Select Register */ |
| 40 | JZ_REG PXSELS; /* Select Set Register */ |
| 41 | JZ_REG PXSELC; /* Select Clear Register */ |
| 42 | JZ_REG Reserved7; |
| 43 | JZ_REG PXDIR; /* Direction Register */ |
| 44 | JZ_REG PXDIRS; /* Direction Set Register */ |
| 45 | JZ_REG PXDIRC; /* Direction Clear Register */ |
| 46 | JZ_REG Reserved8; |
| 47 | JZ_REG PXTRG; /* Trigger Register */ |
| 48 | JZ_REG PXTRGS; /* Trigger Set Register */ |
| 49 | JZ_REG PXTRGC; /* Trigger Set Register */ |
| 50 | JZ_REG Reserved9; |
| 51 | JZ_REG PXFLG; /* Port Flag Register */ |
| 52 | JZ_REG PXFLGC; /* Port Flag clear Register */ |
| 53 | } JZ_PIO, *PJZ_PIO; |
| 54 | |
| 55 | void jz_gpio_as_output (int port, unsigned int o); |
| 56 | |
| 57 | void jz_gpio_as_input (int port, unsigned int o); |
| 58 | |
| 59 | void jz_gpio_set_pin (int port, unsigned int o); |
| 60 | |
| 61 | void jz_gpio_clear_pin (int port, unsigned int o); |
| 62 | |
| 63 | void jz_gpio_out (int port, unsigned int o, unsigned int val); |
| 64 | |
| 65 | unsigned int jz_gpio_get_pin (int port, unsigned int o); |
| 66 | |
| 67 | JZ_PIO * jz_gpio_map (); |
| 68 | |
| 69 | #endif |
| 70 |
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