Hardware Design: SIE
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| 1 | /* Spartan3 JTAG programming algorithms |
| 2 | |
| 3 | Copyright (C) 2004 Andrew Rogers |
| 4 | |
| 5 | This program is free software; you can redistribute it and/or modify |
| 6 | it under the terms of the GNU General Public License as published by |
| 7 | the Free Software Foundation; either version 2 of the License, or |
| 8 | (at your option) any later version. |
| 9 | |
| 10 | This program is distributed in the hope that it will be useful, |
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | GNU General Public License for more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License |
| 16 | along with this program; if not, write to the Free Software |
| 17 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ |
| 18 | |
| 19 | |
| 20 | |
| 21 | |
| 22 | |
| 23 | #include "progalgxc3s.h" |
| 24 | |
| 25 | const byte ProgAlgXC3S::JPROGRAM=0x0b; |
| 26 | const byte ProgAlgXC3S::CFG_IN=0x05; |
| 27 | const byte ProgAlgXC3S::JSHUTDOWN=0x0d; |
| 28 | const byte ProgAlgXC3S::JSTART=0x0c; |
| 29 | const byte ProgAlgXC3S::BYPASS=0x3f; |
| 30 | |
| 31 | ProgAlgXC3S::ProgAlgXC3S(Jtag &j, IOBase &i) |
| 32 | { |
| 33 | jtag=&j; |
| 34 | io=&i; |
| 35 | } |
| 36 | |
| 37 | int ProgAlgXC3S::program(BitFile &file) |
| 38 | { |
| 39 | jtag->shiftIR(&JPROGRAM); |
| 40 | jtag->shiftIR(&CFG_IN); |
| 41 | |
| 42 | byte init[24]; |
| 43 | jtag->longToByteArray(0xffffffff,&init[0]); // Sync |
| 44 | jtag->longToByteArray(0x66aa9955,&init[4]); // Sync |
| 45 | jtag->longToByteArray(0x8001000c,&init[8]); // CMD |
| 46 | jtag->longToByteArray(0xe0000000,&init[12]); // Clear CRC |
| 47 | jtag->longToByteArray(0x00000000,&init[16]); // Flush |
| 48 | jtag->longToByteArray(0x00000000,&init[20]); // Flush |
| 49 | jtag->shiftDR(init,0,192,32); // Align to 32 bits. |
| 50 | jtag->shiftIR(&JSHUTDOWN); |
| 51 | io->cycleTCK(12); |
| 52 | jtag->shiftIR(&CFG_IN); |
| 53 | |
| 54 | byte hdr[12]; |
| 55 | jtag->longToByteArray(0x8001000c,&hdr[0]); // CMD |
| 56 | jtag->longToByteArray(0x10000000,&hdr[4]); // Assert GHIGH |
| 57 | jtag->longToByteArray(0x00000000,&hdr[8]); // Flush |
| 58 | jtag->shiftDR(hdr,0,96,32,false); // Align to 32 bits and do not goto EXIT1-DR |
| 59 | jtag->shiftDR(file.getData(),0,file.getLength()); |
| 60 | io->tapTestLogicReset(); |
| 61 | io->setTapState(IOBase::RUN_TEST_IDLE); |
| 62 | jtag->shiftIR(&JSTART); |
| 63 | io->cycleTCK(12); |
| 64 | jtag->shiftIR(&BYPASS); // Don't know why, but without this the FPGA will not reconfigure from Flash when PROG is asserted. |
| 65 | printf("Done\n"); |
| 66 | } |
| 67 |
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