Hardware Design: SIE
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Hardware Design: SIE Git Source Tree
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| 1 | Release 10.1.03 ngdbuild K.39 (lin) |
| 2 | Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. |
| 3 | |
| 4 | Command Line: /opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/ngdbuild -p |
| 5 | xc3s500e-VQ100-4 project.ngc -uc ../uart_peripheral.ucf |
| 6 | |
| 7 | Reading NGO file |
| 8 | "/home/cain/Embedded/ingenic/sakc/nn-usb-fpga/UART/logic/build/project.ngc" ... |
| 9 | Gathering constraint information from source properties... |
| 10 | Done. |
| 11 | |
| 12 | Applying constraints in "../uart_peripheral.ucf" to the design... |
| 13 | Resolving constraint associations... |
| 14 | Checking Constraint Associations... |
| 15 | Done... |
| 16 | Checking Partitions ... |
| 17 | |
| 18 | Checking expanded design ... |
| 19 | |
| 20 | Partition Implementation Status |
| 21 | ------------------------------- |
| 22 | |
| 23 | No Partitions were found in this design. |
| 24 | |
| 25 | ------------------------------- |
| 26 | |
| 27 | NGDBUILD Design Results Summary: |
| 28 | Number of errors: 0 |
| 29 | Number of warnings: 0 |
| 30 | |
| 31 | Total memory usage is 60312 kilobytes |
| 32 | |
| 33 | Writing NGD file "project.ngd" ... |
| 34 | |
| 35 | Writing NGDBUILD log file "project.bld"... |
| 36 |
Branches:
master
