Hardware Design: SIE
Sign in or create your account | Project List | Help
Hardware Design: SIE Git Source Tree
Root/
| 1 | Release 10.1.03 - Bitgen K.39 (lin) |
| 2 | Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved. |
| 3 | PMSPEC -- Overriding Xilinx file |
| 4 | </opt/cad/Xilinx/10.1/ISE/spartan3e/data/spartan3e.acd> with local file |
| 5 | </opt/cad/Xilinx/10.1/ISE/spartan3e/data/spartan3e.acd> |
| 6 | Loading device for application Rf_Device from file '3s500e.nph' in environment |
| 7 | /opt/cad/Xilinx/10.1/ISE:/opt/cad/Xilinx/10.1/ISE/. |
| 8 | "uart_peripheral" is an NCD, version 3.2, device xc3s500e, package vq100, |
| 9 | speed -4 |
| 10 | |
| 11 | Thu Nov 11 14:39:09 2010 |
| 12 | |
| 13 | /opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/bitgen -l -w -g TdoPin:PULLNONE -g DonePin:PULLUP -g CRC:enable -g StartUpClk:CCLK project_r.ncd |
| 14 | |
| 15 | INFO:Bitgen:275 - Spartan-3E devices do not support bitstream readback of the |
| 16 | Blockram resources in the -4C speedgrade. If Blockram readback functionality |
| 17 | is desired, it is suggested to target the -5C or -4I speedgrades. |
| 18 | Summary of Bitgen Options: |
| 19 | +----------------------+----------------------+ |
| 20 | | Option Name | Current Setting | |
| 21 | +----------------------+----------------------+ |
| 22 | | Compress | (Not Specified)* | |
| 23 | +----------------------+----------------------+ |
| 24 | | Readback | (Not Specified)* | |
| 25 | +----------------------+----------------------+ |
| 26 | | CRC | Enable** | |
| 27 | +----------------------+----------------------+ |
| 28 | | DebugBitstream | No* | |
| 29 | +----------------------+----------------------+ |
| 30 | | ConfigRate | 1* | |
| 31 | +----------------------+----------------------+ |
| 32 | | StartupClk | Cclk** | |
| 33 | +----------------------+----------------------+ |
| 34 | | DCMShutdown | Disable* | |
| 35 | +----------------------+----------------------+ |
| 36 | | DonePin | Pullup** | |
| 37 | +----------------------+----------------------+ |
| 38 | | ProgPin | Pullup* | |
| 39 | +----------------------+----------------------+ |
| 40 | | TckPin | Pullup* | |
| 41 | +----------------------+----------------------+ |
| 42 | | TdiPin | Pullup* | |
| 43 | +----------------------+----------------------+ |
| 44 | | TdoPin | Pullnone | |
| 45 | +----------------------+----------------------+ |
| 46 | | TmsPin | Pullup* | |
| 47 | +----------------------+----------------------+ |
| 48 | | UnusedPin | Pulldown* | |
| 49 | +----------------------+----------------------+ |
| 50 | | GWE_cycle | 6* | |
| 51 | +----------------------+----------------------+ |
| 52 | | GTS_cycle | 5* | |
| 53 | +----------------------+----------------------+ |
| 54 | | LCK_cycle | NoWait* | |
| 55 | +----------------------+----------------------+ |
| 56 | | DONE_cycle | 4* | |
| 57 | +----------------------+----------------------+ |
| 58 | | Persist | No* | |
| 59 | +----------------------+----------------------+ |
| 60 | | DriveDone | No* | |
| 61 | +----------------------+----------------------+ |
| 62 | | DonePipe | No* | |
| 63 | +----------------------+----------------------+ |
| 64 | | Security | None* | |
| 65 | +----------------------+----------------------+ |
| 66 | | UserID | 0xFFFFFFFF* | |
| 67 | +----------------------+----------------------+ |
| 68 | | MultiBootMode | No* | |
| 69 | +----------------------+----------------------+ |
| 70 | | ActivateGclk | No* | |
| 71 | +----------------------+----------------------+ |
| 72 | | ActiveReconfig | No* | |
| 73 | +----------------------+----------------------+ |
| 74 | | PartialMask0 | (Not Specified)* | |
| 75 | +----------------------+----------------------+ |
| 76 | | PartialMask1 | (Not Specified)* | |
| 77 | +----------------------+----------------------+ |
| 78 | | PartialMask2 | (Not Specified)* | |
| 79 | +----------------------+----------------------+ |
| 80 | | PartialGclk | (Not Specified)* | |
| 81 | +----------------------+----------------------+ |
| 82 | | PartialLeft | (Not Specified)* | |
| 83 | +----------------------+----------------------+ |
| 84 | | PartialRight | (Not Specified)* | |
| 85 | +----------------------+----------------------+ |
| 86 | | IEEE1532 | No* | |
| 87 | +----------------------+----------------------+ |
| 88 | | Binary | No* | |
| 89 | +----------------------+----------------------+ |
| 90 | * Default setting. |
| 91 | ** The specified setting matches the default setting. |
| 92 | |
| 93 | Running DRC. |
| 94 | DRC detected 0 errors and 0 warnings. Please see the previously displayed |
| 95 | individual error or warning messages for more details. |
| 96 | Saving ll file in "project_r.ll". |
| 97 | Creating bit map... |
| 98 | Saving bit stream in "project_r.bit". |
| 99 | Bitstream generation is complete. |
| 100 |
Branches:
master
