Hardware Design: SIE
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Hardware Design: SIE Git Source Tree
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| 1 | CommandLine |
| 2 | /opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/bitgen project_r.ncd -l -w -g TdoPin:PULLNONE -g DonePin:PULLUP -g CRC:enable -g StartUpClk:CCLK |
| 3 | s |
| 4 | FormatString |
| 5 | bitgen [-d] [-j] [-b] [-w] [-l] [-m] [-t] [-n] [-u] [-a] [--p] [-r <bitFile>] [-intstyle ise|xflow|silent] [-ise <projectrepositoryfile>] {-bd <BRAM_data_file> [tag <tagname>]} {-g <setting_value>} <infile[.ncd]> [<outfile>] [<pcffile[.pcf]>] |
| 6 | s |
| 7 |
Branches:
master
