Hardware Design: SIE
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Hardware Design: SIE Git Source Tree
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| 1 | CommandLine |
| 2 | /opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/ngdbuild -p xc3s500e-VQ100-4 project.ngc -uc ../uart_peripheral.ucf |
| 3 | s |
| 4 | FormatString |
| 5 | ngdbuild [-p <partname>] {-sd <source_dir>} {-l <library>} [-ur <rules_file[.urf]>] [-dd <output_dir>] [-r] [-a] [-u] [-nt timestamp|on|off] [-uc <ucf_file[.ucf]>] [-aul] [-bm <bmm_file[.bmm]>] [-i] [-modular initial|module|assemble] [-intstyle ise|xflow|silent] [-quiet] [-verbose] [-active <active_module_name>] [-pimpath <pimpath>] {-use_pim <pim_module_name>} [-insert_keep_hierarchy] [--forcengd] {--n <ngl_file>} {--sl <library>} [--global_opt] [--script <tcl_file>] [--incremental] [--csttrans] <design_name> [<ngd_file[.ngd]>] |
| 6 | s |
| 7 |
Branches:
master
