Hardware Design: SIE
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Hardware Design: SIE Git Source Tree
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| 1 | CommandLine |
| 2 | /opt/cad/Xilinx/10.1/ISE/bin/lin/unwrapped/par -w project project_r.ncd |
| 3 | s |
| 4 | FormatString |
| 5 | par [-ol std|med|high] [-pl std|med|high] [-rl std|med|high] [-xe n|c] [-t <costtable:1,100>] [-p] [-k] [-r] [-w] [-smartguide <guidefile[.ncd]>] [-n <iterations:0,100>] [-s <savebest:1,100>] [-m <nodelistfile>] [-x] [-ub] [-nopad] [-power on|off] [-activityfile <activityfile[.vcd|.saif]>] [-ntd] [-intstyle ise|xflow|silent] [-ise <projectrepositoryfile>] [--strategy use_placement|keep_placement|ignore_placement]<infile[.ncd]> <outfile> [<constraintsfile[.pcf]>] |
| 6 | s |
| 7 |
Branches:
master
