Hardware Design: SIE

Hardware Design: SIE Git Source Tree

1	#include <stdio.h>
2	#include <unistd.h>
3
4	#include "jz47xx_gpio.h"
5	#include "jz47xx_mmap.h"
6
7	#define CS2_PORT JZ_GPIO_PORT_B
8	#define CS2_PIN 26
9	#define RHR 0x00 /* Receive Holding Register */
10	#define THR 0x00 /* Receive Holding Register */
11	#define IER 0x01 /* Interrupt Enable Register */
12	#define FCR 0x02 /* FIFO control Register */
13	#define ISR 0x02 /* Interrupt Status Register */
14	#define LCR 0x03 /* Line control register */
15	#define MCR 0x04 /* Modem Control Register */
16	#define LSR 0x05 /* Line Status Register */
17	#define MSR 0x06 /* Modem Status Register */
18	#define SCR 0x07 /* Scratch pad Register */
19	/* This two offsets are used for defining the baud rate */
20	#define DIVLSB 0x00 /* Divisor LSB latch address */
21	#define DIVMSB 0x01 /* Divisor MSB Latch address */
22
23
24	int main () {
25
26	JZ_PIO *pio;
27	unsigned char *virt_addr, get_tecla, in, in2=0, in1=0;
28	int i;
29	pio = jz_gpio_map (CS2_PORT);
30	jz_gpio_as_func (pio, CS2_PIN, 0);
31
32	virt_addr = (int *) jz_mmap (0x13010000) + 0x18;
33	if (*virt_addr != 0xFFF7700)
34	{ // 0 WS, 8 bits
35	*virt_addr = 0xFFF7700;
36	// printf ("Configuring CS2 8 bits \n");
37	}
38	else
39	printf ("CS3, already configured\n");
40
41	virt_addr = (JZ_REG *) jz_mmap (0x15000000);
42
43	virt_addr[LCR]=0x80;//registros de configuracion de UART
44	virt_addr[DIVMSB]=0x00;
45	virt_addr[DIVLSB]=0x0C;
46	virt_addr[LCR]=0x03;
47	virt_addr[IER]= 0x01;
48
49	while (1){
50	virt_addr[THR]=0x06;
51	usleep(60000);
52	//printf("%d\n",virt_addr[RHR]);
53	usleep(60000);
54	}
55	}
56

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