Root/lm32/logic/sakc/firmware/hw-test/crt0ram.S

1/*
2 * LatticeMico32 C startup code.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26/* Exception handlers - Must be 32 bytes long. */
27    .section .text, "ax", @progbits
28    .global _start
29    .global irq_enable, irq_disable, irq_set_mask, irq_get_mask
30    .global jump, halt
31    .global get_sp, get_gp
32
33_start:
34_reset_handler:
35    xor r0, r0, r0
36    wcsr IE, r0
37    mvhi r1, hi(_reset_handler)
38    ori r1, r1, lo(_reset_handler)
39    wcsr EBA, r1
40    calli _crt0
41    nop
42    nop
43
44_breakpoint_handler:
45    nop
46    nop
47    nop
48    nop
49    nop
50    nop
51    nop
52    nop
53
54_ibuserror_handler:
55    nop
56    nop
57    nop
58    nop
59    nop
60    nop
61    nop
62    nop
63
64_watchpoint_handler:
65    nop
66    nop
67    nop
68    nop
69    nop
70    nop
71    nop
72    nop
73
74_dbuserror_handler:
75    nop
76    nop
77    nop
78    nop
79    nop
80    nop
81    nop
82    nop
83
84_divzero_handler:
85    nop
86    nop
87    nop
88    nop
89    nop
90    nop
91    nop
92    nop
93
94_interrupt_handler:
95    sw (sp+0), ra
96    calli _save_all
97    rcsr r1, IP
98    calli irq_handler
99    mvhi r1, 0xffff
100    ori r1, r1, 0xffff
101    wcsr IP, r1
102    bi _restore_all_and_eret
103
104_scall_handler:
105    nop
106    nop
107    nop
108    nop
109    nop
110    nop
111    nop
112    nop
113
114_crt0:
115    /* Setup stack and global pointer */
116    mvhi sp, hi(_fstack)
117    ori sp, sp, lo(_fstack)
118    mvhi gp, hi(_gp)
119    ori gp, gp, lo(_gp)
120
121    /* Clear BSS */
122    mvhi r1, hi(_fbss)
123    ori r1, r1, lo(_fbss)
124    mvhi r3, hi(_ebss)
125    ori r3, r3, lo(_ebss)
126.clearBSS:
127    be r1, r3, .callMain
128    sw (r1+0), r0
129    addi r1, r1, 4
130    bi .clearBSS
131    
132.callMain:
133    mvi r1, 0
134    mvi r2, 0
135    mvi r3, 0
136    calli main
137
138irq_enable:
139    mvi r1, 1
140    wcsr IE, r1
141    ret
142
143irq_disable:
144    mvi r1, 0
145    wcsr IE, r1
146    ret
147
148irq_set_mask:
149    wcsr IM, r1
150    ret
151
152irq_get_mask:
153    rcsr r1, IM
154    ret
155    
156jump:
157    b r1
158
159halt:
160    bi halt
161
162    /* Save all registers onto the stack */
163_save_all:
164    addi sp, sp, -128
165    sw (sp+4), r1
166    sw (sp+8), r2
167    sw (sp+12), r3
168    sw (sp+16), r4
169    sw (sp+20), r5
170    sw (sp+24), r6
171    sw (sp+28), r7
172    sw (sp+32), r8
173    sw (sp+36), r9
174    sw (sp+40), r10
175#ifdef MICO32_FULL_CONTEXT_SAVE_RESTORE
176    sw (sp+44), r11
177    sw (sp+48), r12
178    sw (sp+52), r13
179    sw (sp+56), r14
180    sw (sp+60), r15
181    sw (sp+64), r16
182    sw (sp+68), r17
183    sw (sp+72), r18
184    sw (sp+76), r19
185    sw (sp+80), r20
186    sw (sp+84), r21
187    sw (sp+88), r22
188    sw (sp+92), r23
189    sw (sp+96), r24
190    sw (sp+100), r25
191    sw (sp+104), r26
192    sw (sp+108), r27
193#endif
194    sw (sp+120), ea
195    sw (sp+124), ba
196    /* ra and sp need special handling, as they have been modified */
197    lw r1, (sp+128)
198    sw (sp+116), r1
199    mv r1, sp
200    addi r1, r1, 128
201    sw (sp+112), r1
202    ret
203
204        /* Restore all registers and return from exception */
205_restore_all_and_eret:
206        lw r1, (sp+4)
207        lw r2, (sp+8)
208        lw r3, (sp+12)
209        lw r4, (sp+16)
210        lw r5, (sp+20)
211        lw r6, (sp+24)
212        lw r7, (sp+28)
213        lw r8, (sp+32)
214        lw r9, (sp+36)
215        lw r10, (sp+40)
216#ifdef MICO32_FULL_CONTEXT_SAVE_RESTORE
217        lw r11, (sp+44)
218        lw r12, (sp+48)
219        lw r13, (sp+52)
220        lw r14, (sp+56)
221        lw r15, (sp+60)
222        lw r16, (sp+64)
223        lw r17, (sp+68)
224        lw r18, (sp+72)
225        lw r19, (sp+76)
226        lw r20, (sp+80)
227        lw r21, (sp+84)
228        lw r22, (sp+88)
229        lw r23, (sp+92)
230        lw r24, (sp+96)
231        lw r25, (sp+100)
232        lw r26, (sp+104)
233        lw r27, (sp+108)
234#endif
235        lw ra, (sp+116)
236        lw ea, (sp+120)
237        lw ba, (sp+124)
238        /* Stack pointer must be restored last, in case it has been updated */
239        lw sp, (sp+112)
240        eret
241
242get_sp:
243    mv r1, sp
244    ret
245
246get_gp:
247    mv r1, gp
248    ret
249
250

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