Root/lm32/logic/sakc/firmware/hw-test/soc-hw.c

1#include "soc-hw.h"
2
3uart_t *uart0 = (uart_t *) 0xf0000000;
4timer_t *timer0 = (timer_t *) 0xf0010000;
5gpio_t *gpio0 = (gpio_t *) 0xF0020000;
6
7isr_ptr_t isr_table[32];
8
9
10void tic_isr();
11/***************************************************************************
12 * IRQ handling
13 */
14void isr_null()
15{
16}
17
18void irq_handler(uint32_t pending)
19{
20    int i;
21
22    for(i=0; i<32; i++) {
23        if (pending & 0x01) (*isr_table[i])();
24        pending >>= 1;
25    }
26}
27
28void isr_init()
29{
30    int i;
31    for(i=0; i<32; i++)
32        isr_table[i] = &isr_null;
33}
34
35void isr_register(int irq, isr_ptr_t isr)
36{
37    isr_table[irq] = isr;
38}
39
40void isr_unregister(int irq)
41{
42    isr_table[irq] = &isr_null;
43}
44
45/***************************************************************************
46 * TIMER Functions
47 */
48void msleep(uint32_t msec)
49{
50    uint32_t tcr;
51
52    // Use timer0.1
53    timer0->compare1 = (FCPU/1000)*msec;
54    timer0->counter1 = 0;
55    timer0->tcr1 = TIMER_EN;
56
57    do {
58        //halt();
59         tcr = timer0->tcr1;
60     } while ( ! (tcr & TIMER_TRIG) );
61}
62
63void nsleep(uint32_t nsec)
64{
65    uint32_t tcr;
66
67    // Use timer0.1
68    timer0->compare1 = (FCPU/1000000)*nsec;
69    timer0->counter1 = 0;
70    timer0->tcr1 = TIMER_EN;
71
72    do {
73        //halt();
74         tcr = timer0->tcr1;
75     } while ( ! (tcr & TIMER_TRIG) );
76}
77
78
79uint32_t tic_msec;
80
81void tic_isr()
82{
83    tic_msec++;
84    timer0->tcr0 = TIMER_EN | TIMER_AR | TIMER_IRQEN;
85}
86
87void tic_init()
88{
89    tic_msec = 0;
90
91    // Setup timer0.0
92    timer0->compare0 = (FCPU/10000);
93    timer0->counter0 = 0;
94    timer0->tcr0 = TIMER_EN | TIMER_AR | TIMER_IRQEN;
95
96    isr_register(1, &tic_isr);
97}
98
99
100/***************************************************************************
101 * UART Functions
102 */
103void uart_init()
104{
105    //uart0->ier = 0x00; // Interrupt Enable Register
106    //uart0->lcr = 0x03; // Line Control Register: 8N1
107    //uart0->mcr = 0x00; // Modem Control Register
108
109    // Setup Divisor register (Fclk / Baud)
110    //uart0->div = (FCPU/(57600*16));
111}
112
113char uart_getchar()
114{
115    while (! (uart0->ucr & UART_DR)) ;
116    return uart0->rxtx;
117}
118
119void uart_putchar(char c)
120{
121    while (uart0->ucr & UART_BUSY) ;
122    uart0->rxtx = c;
123}
124
125void uart_putstr(char *str)
126{
127    char *c = str;
128    while(*c) {
129        uart_putchar(*c);
130        c++;
131    }
132}
133
134

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